TI INA206AID High-side measurement current-shunt monitor with dual comparator Datasheet

INA206
INA207
INA208
INA20
x
IN A
2
IN A
0x
20 x
SBOS360 − JULY 2006
High-Side Measurement
Current-Shunt Monitor with Dual Comparators
FEATURES
DESCRIPTION
D COMPLETE CURRENT SENSE SOLUTION
D DUAL COMPARATORS:
D
D
D
D
D
− Comparator 1 with Latch
− Comparator 2 with Optional Delay
COMMON-MODE RANGE: −16V to +80V
HIGH ACCURACY: 3.5% (max) OVER TEMP
BANDWIDTH: 500kHz
QUIESCENT CURRENT: 1.8mA
PACKAGES: SO-14, TSSOP-14, MSOP-10
APPLICATIONS
D
D
D
D
D
D
D
NOTEBOOK COMPUTERS
CELL PHONES
TELECOM EQUIPMENT
AUTOMOTIVE
POWER MANAGEMENT
BATTERY CHARGERS
WELDING EQUIPMENT
The INA206, INA207, and INA208 are a family of
high-side, current-shunt monitors with voltage output, dual
comparators, and voltage reference. The INA206,
INA207, and INA208 can sense drops across shunts at
common-mode voltages from −16V to +80V. The INA206,
INA207, and INA208 are available with three output
voltage scales: 20V/V, 50V/V, and 100V/V, with up to
500kHz bandwidth.
The INA206, INA207, and INA208 also incorporate two
open-drain comparators with internal 0.6V references. On
14-pin versions, the comparator references can be
overridden by external inputs. Comparator 1 includes a
latching capability, and Comparator 2 has a
user-programmable delay on 14-pin versions. 14-pin
versions also provide a 1.2V reference output.
The INA206, INA207, and INA208 operate from a single
+2.7V to +18V supply. They are specified over the
extended operating temperature range of −40°C to
+125°C.
INA206− INA208
INA206− INA208
VS
10 VIN+
1
1
OUT
2
14 VIN+
13 VIN−
1.2V REF
12 1.2V REF OUT
CMP1 IN−/0.6V REF
3
CMP1 OUT
CMP1 IN+
4
11 CMP1 OUT
7
CMP2 OUT
CMP2 IN−
5
10 CMP2 OUT
6
CMP1 RESET
CMP2 IN+/0.6V REF
6
9
CMP2 DELAY
GND
7
8
CMP1 RESET
OUT
2
9
VIN−
CMP1 IN+
3
8
CMP2 IN−
4
GND
5
0.6V REF
VS
MSOP−10
SO−14, TSSOP−14
DEVICE
GAIN
INA206
20V/V
INA207
50V/V
INA208
100V/V
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright  2006, Texas Instruments Incorporated
! ! www.ti.com
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SBOS360 − JULY 2006
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V
Current-Shunt Monitor Analog Inputs, VIN+ and VIN−:
Differential (VIN+) − (VIN−) . . . . . . . . . . . . . . . . . . −18V to +18V
Common-Mode(2) . . . . . . . . . . . . . . . . . . . . . . . . −16V to +80V
Comparator Analog Input and Reset Pins(2):
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND − 0.3V to (V+) + 0.3V
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
Analog Output, Out Pin(2) . . . . . . . . . . GND − 0.3V to (V+) + 0.3V
Comparator Output, Out Pin(2) . . . . . . . . . . . . . GND − 0.3V to 18V
VREF and CMP2 Delay Pin . . . . . . . . . . . . . . . . GND − 0.3V to 10V
Input Current Into Any Pin(2) . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Operating Temperature . . . . . . . . . . . . . . . . . . . . . −55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to −150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
ESD Ratings:
Human Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . 4000V
Charged Device Model (CDM) . . . . . . . . . . . . . . . . . . . . 1000V
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) This voltage may exceed the ratings shown if the current at that
pin is limited to 5mA.
ORDERING INFORMATION(1)
PRODUCT
GAIN
INA206
20V/V
INA206
INA207
INA208
20V/V
50V/V
100V/V
PACKAGELEAD
PACKAGE
DESIGNATOR
PACKAGE
MARKING
1.2V
REF OUT
EXTERNAL
COMP1 AND
COMP2
REF INPUTS
INTERNAL
COMP1 AND
COMP2
0.6V REF
COMP2
DELAY PIN
SO-14
D
INA206A
X
X
X
X
TSSOP-14(3)
PW
INA206A
X
X
X
X
MSOP-10(3)
DGS
BQQ
SO-14(2)
D
INA207A
X
X
X
X
TSSOP-14(3)
PW
INA207A
X
X
X
X
MSOP-10(3)
DGS
BQR
SO-14(2)
D
INA208A
X
X
X
X
TSSOP-14(3)
PW
INA208A
X
X
X
X
MSOP-10(3)
X
X
DGS
BQS
X
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
(2) Available Q4 ’06.
(3) Available Q2 ’07.
2
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SBOS360 − JULY 2006
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, VS = +12V, VIN+ = 12V, VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ each connected from CMP1 OUT and
CMP2 OUT to VS, and CMP1 IN+ = 1V and CMP2 IN− = GND, unless otherwise noted.
INA206, INA207, INA208
CURRENT-SHUNT MONITOR
PARAMETERS
INPUT
Full-Scale Sense Input
Voltage
Common-Mode Input Range
Common-Mode Rejection
over Temperature
Offset Voltage RTI(1)
+25°C to +125°C
−40°C to +25°C
vs Temperature
vs Power-Supply
Input Bias Current, VIN− Pin
CONDITIONS
VSENSE
VCM
CMR
VSENSE = VIN+ − VIN−
VIN+ = −16V to +80V
VIN+ = +12V to +80V
VOS
dVOS/dT
PSR
IB
OUTPUT (VSENSE . 20mV)
Gain: INA206
Gain: INA207
Gain: INA208
Gain Error
over Temperature
Total Output Error(2)
over Temperature
Nonlinearity Error(3)
Output Impedance
Maximum Capacitive Load
MIN
TMIN to TMAX
VOUT = 2V, VIN+ = 18V, 2.7V
G
VSENSE = 20mV to 100mV
VSENSE = 20mV to 100mV
VSENSE = 120mV, VS = +16V
VSENSE = 120mV, VS = +16V
VSENSE = 20mV to 100mV
RO
No Sustained Oscillation
−16
80
100
TYP
MAX
UNIT
0.15
(VS − 0.25)/Gain
V
80
V
dB
dB
mV
mV
mV
µV/°C
µV/V
µA
100
123
±0.5
5
2.5
±9
20
50
100
±0.2
±0.75
±2.5
±3
±3.5
100
±16
±1
±2
±2.2
±3.5
V/V
V/V
V/V
%
%
%
%
%
Ω
nF
0.4
1
2
mV
V
V
V
mV
(V+) − 0.25
(VGND) + 0.05
V
V
±0.002
1.5
10
< 20mV)(4)
OUTPUT (VSENSE
INA206, INA207, INA208
INA206
INA207
INA208
INA206, INA207, INA208
−16V ≤ VCM < 0V
0V ≤ VCM ≤ VS, VS = 5V
0V ≤ VCM ≤ VS, VS = 5V
0V ≤ VCM ≤ VS, VS = 5V
VS < VCM ≤ 80V
300
VOLTAGE OUTPUT(5)
Output Swing to the Positive Rail
Output Swing to GND(6)
VIN− = 11V, VIN+ = 12V
VIN− = 0V, VIN+ = −0.5V
(V+) − 0.15
(VGND) + 0.004
CLOAD = 5pF
CLOAD = 5pF
CLOAD = 5pF
CLOAD < 10nF
500
300
200
40
1
kHz
kHz
kHz
Degrees
V/µs
2
µs
40
nV/√Hz
FREQUENCY RESPONSE
Bandwidth: INA206
Bandwidth: INA207
Bandwidth: INA208
Phase Margin
Slew Rate
Settling Time (1%)
NOISE, RTI
Output Voltage Noise Density
BW
VSENSE = 10mVPP to 100mVPP,
CLOAD = 5pF
300
(1) Offset is extrapolated from measurements of the output at 20mV and 100mV VSENSE.
(2) Total output error includes effects of gain error and VOS.
(3) Linearity is best fit to a straight line.
(4) For details on this region of operation, see the Accuracy Variations as a Result of VSENSE and Common-Mode Voltage section in the Applications
Information.
(5) See Typical Characteristics curve Output Swing vs Output Current.
(6) Specified by design.
3
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SBOS360 − JULY 2006
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, VS = +12V, VIN+ = 12V, VSENSE = 100mV, RL = 10kΩ to GND, and RPULL-UP = 5.1kΩ each connected from CMP1 OUT and CMP2 OUT to VS,
unless otherwise noted.
INA206, INA207, INA208
COMPARATOR PARAMETERS
CONDITIONS
OFFSET VOLTAGE
Offset Voltage
Offset Voltage Drift, Comparator 1
Offset Voltage Drift, Comparator 2
Threshold
over Temperature
Hysteresis (1), CMP1
Hysteresis (1), CMP2
MIN
TYP
Comparator Common-Mode Voltage = Threshold Voltage
TA = +25°C
2
±2
+5.4
600
590
586
TA = −40°C to +85°C
TA = −40°C to +85°C
610
614
−8
8
INPUT BIAS CURRENT(2)
CMP1 IN+, CMP2 IN−
vs Temperature
0.005
INPUT IMPEDANCE
Pins 3 and 6 (14-pin packages only)
INPUT RANGE
CMP1 IN+ and CMP2 IN−
Pins 3 and 6 (14-pin packages only)(3)
OUTPUT
Large-Signal Differential Voltage Gain
High-Level Output Current
Low-Level Output Voltage
MAX
10
15
UNIT
mV
µV/°C
µV/°C
mV
mV
mV
mV
nA
nA
10
kΩ
0V to VS − 1.5V
0V to VS − 1.5V
V
V
CMP VOUT 1V to 4V, RL ≥ 15kΩ connected to 5V
VID = 0.4V, VOH = VS
VID = −0.6V, IOL = 2.35mA
200
0.0001
220
1
300
V/mV
µA
mV
RESPONSE TIME(4)
RL to 5V, CL = 15 pF, 100mV Input Step
with 5mV Overdrive
RL to 5V, CL = 15 pF, 100mV Input Step
with 5mV Overdrive, CDELAY Pin Open
Comparator 1
Comparator 2
RESET
RESET Threshold(5)
Logic Input Impedance
Minimum RESET Pulse Width
RESET Propagation Delay
Comparator 2 Delay Equation(6)
Comparator 2 Delay
tD
CDELAY = 0.1µF
1.3
µs
1.3
µs
1.1
2
1.5
3
CDELAY = tD/5
0.5
V
MΩ
µs
µs
µF
s
(1) Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the noninverting input of the
comparator. Refer to Figure 1.
(2) Specified by design.
(3) See the Comparator Maximum Input Voltage Range section in the Applications Information.
(4) The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4V.
(5) RESET input has an internal 2MΩ (typical) pull-down. Leaving RESET open results in a LOW state, with transparent comparator operation.
(6) The Comparator 2 delay applies to both rising and falling edges of the comparator output.
VTHRESHOLD
0.592
VTHRESHOLD
0.6
0.6
0.608
Input Voltage
Input Voltage
Hysteresis = VTHRESHOLD − 8mV
Hysteresis = VTHRESHOLD − 8mV
a) CMP1
b) CMP2
Figure 1. Comparator Hysteresis
4
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SBOS360 − JULY 2006
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, VS = +12V, VIN+ = 12V, VSENSE = 100mV, RL = 10kΩ to GND, and RPULL-UP = 5.1kΩ each connected from CMP1 OUT and
CMP2 OUT to VS, unless otherwise noted.
INA206, INA207, INA208
REFERENCE PARAMETERS
CONDITIONS
REFERENCE VOLTAGE
1.2VREFOUT Output Voltage
Reference Drift
dVOUT/dT
0.6VREF Output Voltage
(Pins 3 and 6 of 14-pin packages only)
Reference Drift
dVOUT/dT
LOAD REGULATION
Sourcing
Sinking
TYP
MAX
UNIT
1.188
1.2
40
1.212
100
V
ppm/°C
TA = −40°C to +85°C
0.6
V
TA = −40°C to +85°C
40
100
ppm/°C
0mA < ISOURCE < 0.5mA
0mA < ISINK < 0.5mA
0.4
0.4
2
mV/mA
mV/mA
1
mA
2.7V < VS < 18V
30
µV/V
No Sustained Oscillations
10
nF
10
kΩ
dVOUT/dILOAD
LOAD CURRENT
LINE REGULATION
MIN
ILOAD
dVOUT/dVS
CAPACITIVE LOAD
Reference Output Max. Capacitive Load
OUTPUT IMPEDANCE
Pins 3 and 6 of 14-Pin Packages Only
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, VS = +12V, VIN+ = 12V, VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ each connected from CMP1 OUT and
CMP2 OUT to VS, and CMP1 IN+ = 1V and CMP2 IN− = GND, unless otherwise noted.
INA206, INA207, INA208
CONDITIONS
GENERAL PARAMETERS
POWER SUPPLY
Operating Power Supply
VS
Quiescent Current
IQ
over Temperature
Comparator Power-On Reset Threshold(1)
TEMPERATURE
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Resistance
MSOP-10 Surface-Mount
SO-14, TSSOP-14 Surface-Mount
MIN
TYP
MAX
UNIT
1.8
+18
2.2
2.8
V
mA
mA
V
+125
+150
+150
°C
°C
°C
+2.7
VOUT = 2V
VSENSE = 0mV
1.5
−40
−55
−65
qJA
200
150
°C/W
°C/W
(1) The INA206, INA207, and INA208 are designed to power-up with the comparator in a defined reset state as long as CMP1 RESET is open or
grounded. The comparator will be in reset as long as the power supply is below the voltage shown here. The comparator will assume a state
based on the comparator input above this supply voltage. If CMP1 RESET is high at power-up, the comparator output comes up high and
requires a reset to assume a low state, if appropriate.
5
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SBOS360 − JULY 2006
TYPICAL CHARACTERISTICS
All specifications at TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
GAIN vs FREQUENCY
GAIN vs FREQUENCY
45
45
CLOAD = 1000pF
G = 100
G = 50
30
G = 50
35
Gain (dB)
35
Gain (dB)
G = 100
40
40
G = 20
25
20
30
G = 20
25
20
15
15
10
10
5
5
10k
10k
1M
100k
100k
Frequency (Hz)
COMMON−MODE AND POWER−SUPPLY REJECTION
vs FREQUENCY
GAIN PLOT
20
140
18
130
Common−Mode and
Power−Supply Rejection (dB)
100V/V
16
VOUT (V)
14
50V/V
12
10
8
20V/V
6
4
2
120
CMR
110
100
90
PSR
80
70
60
50
40
0
20
100
200
300
400
500
600
700
800
900
10
100
1k
VDIFFERENTIAL (mV)
OUTPUT ERROR vs COMMON−MODE VOLTAGE
4.0
0.1
3.5
0.09
0.08
3.0
Output Error (% )
Output Error
(% error of the ideal output value)
100k
10k
Frequency (Hz)
OUTPUT ERROR vs VSENSE
2.5
2.0
1.5
1.0
0.07
0.06
0.05
0.04
0.03
0.02
0.5
0.01
0
0
0
50
100 150
200
250 300
VSENSE (mV)
6
1M
Frequency (Hz)
350 400 450 500
−16 −12 −8 −4
0
4
8
12 16 20
Common−Mode Voltage (V)
...
76 80
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SBOS360 − JULY 2006
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
POSITIVE OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
QUIESCENT CURRENT vs OUTPUT VOLTAGE
3.5
12
VS = 12V
10
9
3.0
Sourcing Current
2.5
+25_C
8
−40_C
+125_ C
7
6
I Q (mA)
Output Voltage (V)
11
VS = 3V
5
Sourcing Current
+25_C
4
−40_C
Output stage is designed
to source current. Current
sinking
capability
is
approximately 400µA.
3
2
1
+125_ C
0
0
2.0
1.5
1.0
0.5
0
5
10
20
15
25
0
30
1
2
Output Current (mA)
6
7
34
Output Short−Circuit Current (mA)
2.25
VS = 2.7V
VS = 12V
2.00
1.75
VS = 12V
1.50
VS = 2.7V
VSENSE = 0mV:
1.25
8
9
10
−40_C
30
+25_ C
26
+125_ C
22
18
14
10
6
0
4
8
12 16 20 24 28 32 36
2.5 3.5
VCM (V)
4.5
5.5 6.5
7.5
8.5
9.5 10.5 11.5 17
18
Supply Voltage (V)
STEP RESPONSE
STEP RESPONSE
G = 20
G = 20
Output Voltage (500mV/div)
Output Voltage (50mV/div)
IQ (mA)
5
OUTPUT SHORT−CIRCUIT CURRENT
vs SUPPLY VOLTAGE
VSENSE = 100mV:
1.00
−16 −12 −8 −4
4
Output Voltage (V)
QUIESCENT CURRENT
vs COMMON−MODE VOLTAGE
2.50
3
VSENSE = 10mV to 20mV
Time (2µs/div)
VSENSE = 10mV to 100mV
Time (2µs/div)
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
STEP RESPONSE
STEP RESPONSE
G = 20
Output Voltage (50mV/div)
Output Voltage (100mV/div)
G = 50
VSENSE = 90mV to 100mV
VSENSE = 10mV to 20mV
Time (2µs/div)
Time (5µs/div)
STEP RESPONSE
STEP RESPONSE
G = 50
Output Voltage (1V/div)
Output Voltage (100mV/div)
G = 50
VSENSE = 10mV to 100mV
VSENSE = 90mV to 100mV
Time (5µs/div)
Time (5µs/div)
COMPARATOR VOL vs ISINK
STEP RESPONSE
600
G = 100
Output Voltage (2V/div)
500
VOL (mV)
400
300
200
100
VSENSE = 10mV to 100mV
Time (10µs/div)
0
0
1
2
3
ISINK (mA)
8
4
5
6
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
COMPARATOR TRIP POINT vs SUPPLY VOLTAGE
COMPARATOR TRIP POINT vs TEMPERATURE
602
600
Comparator Trip Point (mV)
599
Reset Voltage (mV)
598
597
596
595
594
593
592
601
600
599
598
597
591
596
590
2
4
6
8
10
12
14
16
−25
−50
18
0
25
50
75
100
Supply Voltage (V)
Temperature (_ C)
COMPARATOR 1 PROPAGATION DELAY
vs OVERDRIVE VOLTAGE
COMPARATOR 2 PROPAGATION DELAY
vs OVERDRIVE VOLTAGE
125
14
200
Propagation Delay (µs)
Propagation Delay (ns)
175
150
125
100
13
12
11
75
10
50
0
20
40
60
80
100 120 140 160 180
0
200
20
40
80
100 120 140 160 180
200
Overdrive Voltage (mV)
Overdrive Voltage (mV)
COMPARATOR 1 PROPAGATION DELAY vs
TEMPERATURE
COMPARATOR RESET VOLTAGE vs
SUPPLY VOLTAGE
1.2
300
1.0
275
Propagation Delay (ns)
Reset Voltage (V)
60
0.8
0.6
0.4
0.2
250
225
200
175
150
0
2
4
6
8
10
12
Supply Voltage (V)
14
16
18
125
−50
−25
0
25
50
75
100
125
Temperature (_C)
9
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SBOS360 − JULY 2006
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
COMPARATOR 2 PROPAGATION DELAY
vs CAPACITANCE
COMPARATOR 1 PROPAGATION DELAY
Propagation Delay (ms)
1000
100
Input
200mV/div
10
1
Output
2V/div
0.1
VOD = 5mV
0.01
0.001
0.01
0.1
1
10
100
2µs/div
Delay Capacitance (nF)
COMPARATOR 2 PROPAGATION DELAY
REFERENCE VOLTAGE vs TEMPERATURE
1.22
Input
200mV/div
VREF (V)
1.21
Output
2V/div
1.20
1.19
VOD = 5mV
5µs/div
1.18
−50
−25
0
25
50
Temperature (_C)
10
75
100
125
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SBOS360 − JULY 2006
This section addresses the accuracy of these specific
operating regions:
APPLICATIONS INFORMATION
BASIC CONNECTION
Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS
Normal Case 2: VSENSE ≥ 20mV, VCM < VS
Low VSENSE Case 1: VSENSE < 20mV, −16V ≤ VCM < 0
Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS
Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V
Figure 2 shows the basic connection of the INA206,
INA207, and INA208. The input pins, VIN+ and VIN−, should
be connected as closely as possible to the shunt resistor
to minimize any resistance in series with the shunt
resistance.
Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS
Power-supply bypass capacitors are required for stability.
Applications with noisy or high impedance power supplies
may require additional decoupling capacitors to reject
power-supply noise. Connect bypass capacitors close to
the device pins.
This region of operation provides the highest accuracy.
Here, the input offset voltage is characterized and
measured using a two-step method. First, the gain is
determined by Equation (1).
POWER SUPPLY
G+
The input circuitry of the INA206, INA207, and INA208 can
accurately measure beyond the power-supply voltage, V+.
For example, the V+ power supply can be 5V, whereas the
load power-supply voltage is up to +80V. The output
voltage range of the OUT terminal, however, is limited by
the voltages on the power-supply pin.
V OUT1 * V OUT2
100mV * 20mV
(1)
where:
VOUT1 = Output Voltage with VSENSE = 100mV
VOUT2 = Output Voltage with VSENSE = 20mV
Then the offset voltage is measured at VSENSE = 100mV
and referred to the input (RTI) of the current shunt monitor,
as shown in Equation (2).
ACCURACY VARIATIONS AS A RESULT OF
VSENSE AND COMMON-MODE VOLTAGE
The accuracy of the INA206, INA207, and INA208 current
shunt monitors is a function of two main variables: VSENSE
(VIN+ − VIN−) and common-mode voltage, VCM, relative to
the supply voltage, VS. VCM is expressed as (VIN+ + VIN−)/2;
however, in practice, VCM is seen as the voltage at VIN+
because the voltage drop across VSENSE is usually small.
VOSRTI (Referred−To−Input) +
ǒV G Ǔ * 100mV
OUT1
(2)
In the Typical Characteristics, the Output Error vs
Common-Mode Voltage curve shows the highest
accuracy for the this region of operation. In this plot,
VS = 12V; for VCM ≥ 12V, the output error is at its minimum.
This case is also used to create the VSENSE ≥ 20mV output
specifications in the Electrical Characteristics table.
RSHUNT
3mΩ
Load Supply
−18V to +80V
Load
5V Supply
VS
Current Shunt
Monitor Output
CBYPASS
0.01µF
INA206
x20
OUT
CMP1 IN−/0.6 REF
CMP1 IN+
1.2V REF
VIN+
VIN−
RPULL−UP
4.7kΩ
RPULL−UP
4.7kΩ
1.2V REF OUT
CMP1 OUT
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
Transparent/Reset
Optional Delay
Capacitor
0.2µF/s
Latch
Figure 2. INA20x Basic Connection
11
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This region of operation has slightly less accuracy than
Normal Case 1 as a result of the common-mode operating
area in which the part functions, as seen in the Output Error
vs Common-Mode Voltage curve. As noted, for this graph
VS = 12V; for VCM < 12V, the Output Error increases as VCM
becomes less than 12V, with a typical maximum error of
0.005% at the most negative VCM = −16V.
Low VSENSE Case 1:
VSENSE < 20mV, −16V ≤ VCM < 0;
and Low VSENSE Case 3:
VSENSE < 20mV, VS < VCM ≤ 80V
Although the INA206 family of devices are not designed for
accurate operation in either of these regions, some
applications are exposed to these conditions; for example,
when monitoring power supplies that are switched on and
off while VS is still applied to the INA206, INA207, or
INA208. It is important to know what the behavior of the
devices will be in these regions.
As VSENSE approaches 0mV, in these VCM regions, the
device output accuracy degrades. A larger-than-normal
offset can appear at the current shunt monitor output with
a typical maximum value of VOUT = 300mV for
VSENSE = 0mV. As VSENSE approaches 20mV, VOUT returns
to the expected output value with accuracy as specified in
the Electrical Characteristics. Figure 3 illustrates this
effect using the INA208 (Gain = 100).
2.0
1.8
parallel. One op amp front end operates in the positive
input common-mode voltage range, and the other in the
negative input region. For this case, neither of these two
internal amplifiers dominates and overall loop gain is very
low. Within this region, VOUT approaches voltages close to
linear operation levels for Normal Case 2. This deviation
from linear operation becomes greatest the closer VSENSE
approaches 0V. Within this region, as VSENSE approaches
20mV, device operation is closer to that described by
Normal Case 2. Figure 4 illustrates this behavior for the
INA208. The VOUT maximum peak for this case is tested
by maintaining a constant VS, setting VSENSE = 0mV and
sweeping VCM from 0V to VS. The exact VCM at which VOUT
peaks during this test varies from part to part, but the VOUT
maximum peak is tested to be less than the specified VOUT
Tested Limit.
VOUT (V)
Normal Case 2: VSENSE ≥ 20mV, VCM < VS
2.4
INA208 VOUT Tested Limit(1)
2.2
VCM1
2.0
Ideal
1.8
VCM2
1.6
1.4
VCM3
1.2
1.0
VOUT Tested Limit at
0.8
VCM4
VSENSE = 0mV, 0 ≤ VCM1 ≤ VS.
0.6
VCM2, VCM3, and VCM4 illustrate the variance
0.4
from part to part of the VCM that can cause
0.2
maximum VOUT with VSENSE < 20mV.
0
0
2
4
6
8 10 12 14 16 18 20 22 24
1.6
VSENSE (mV)
VOUT (V)
1.4
NOTE: (1) INA206 VOUT Tested Limit = 0.4V. INA207 VOUT Tested Limit = 1V.
1.2
Actual
1.0
0.8
Ideal
Figure 4. Example for Low VSENSE Case 2 (INA208,
Gain = 100)
0.6
0.4
0.2
0
0
2
4
6
8
10
12
14
16
18
20
VSENSE (mV)
Figure 3. Example for Low VSENSE Cases 1 and 3
(INA208, Gain = 100)
Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS
This region of operation is the least accurate for the
INA206 family. To achieve the wide input common-mode
voltage range, these devices use two op amp front ends in
12
SELECTING RS
The value chosen for the shunt resistor, RS, depends on
the application and is a compromise between small-signal
accuracy and maximum permissible voltage loss in the
measurement line. High values of RS provide better
accuracy at lower currents by minimizing the effects of
offset, while low values of RS minimize voltage loss in the
supply line. For most applications, best performance is
attained with an RS value that provides a full-scale shunt
voltage range of 50mV to 100mV. Maximum input voltage
for accurate measurements is 500mV.
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TRANSIENT PROTECTION
INPUT FILTERING
The −16V to +80V common-mode range of the INA206,
INA207, and INA208 is ideal for withstanding automotive
fault conditions ranging from 12V battery reversal up to
+80V transients, since no additional protective
components are needed up to those levels. In the event
that the INA206, INA207, and INA208 are exposed to
transients on the inputs in excess of their ratings, then
external transient absorption with semiconductor transient
absorbers (zeners or Transzorbs) will be necessary. Use
of MOVs or VDRs is not recommended except when they
are used in addition to a semiconductor transient absorber.
Select the transient absorber such that it will never allow
the INA206, INA207, and INA208 to be exposed to
transients greater than +80V (that is, allow for transient
absorber tolerance, as well as additional voltage due to
transient absorber dynamic impedance). Despite the use
of internal zener-type ESD protection, the INA206,
INA207, and INA208 do not lend themselves to using
external resistors in series with the inputs since the internal
gain resistors can vary up to ±30%. (If gain accuracy is not
important, then resistors can be added in series with the
INA206, INA207, and INA208 inputs with two equal
resistors on each input.)
An obvious and straightforward location for filtering is at
the output of the INA206, INA207, and INA208 series;
however, this location negates the advantage of the low
output impedance of the internal buffer. The only other
option for filtering is at the input pins of the INA206,
INA207, and INA208, which is complicated by the internal
5kΩ + 30% input impedance; this is shown in Figure 5.
Using the lowest possible resistor values minimizes both
the initial shift in gain and effects of tolerance. The effect
on initial gain is given by Equation (3):
ǒ
Ǔ
5kW
5kW ) R FILT
Gain Error% + 100 * 100
(3)
Total effect on gain error can be calculated by replacing the
5kΩ term with 5kΩ − 30%, (or 3.5kΩ) or 5kΩ + 30% (or
6.5kΩ). The tolerance extremes of RFILT can also be
inserted into the equation. If a pair of 100Ω 1% resistors
are used on the inputs, the initial gain error will be 1.96%.
Worst-case tolerance conditions will always occur at the
lower excursion of the internal 5kΩ resistor (3.5kΩ), and
the higher excursion of RFILT − 3% in this case.
OUTPUT VOLTAGE RANGE
Note that the specified accuracy of the INA206, INA207,
and INA208 must then be combined in addition to these
tolerances. While this discussion treated accuracy
worst-case conditions by combining the extremes of the
resistor values, it is appropriate to use geometric mean or
root sum square calculations to total the effects of
accuracy variations.
The output of the INA206, INA207, and INA208 is accurate
within the output voltage swing range set by the power
supply pin, V+. This performance is best illustrated when
using the INA208 (a gain of 100 version), where a 100mV
full-scale input from the shunt resistor requires an output
voltage swing of +10V, and a power-supply voltage
sufficient to achieve +10V on the output.
RSHUNT << RFILTER
3mΩ
VSUPPLY
Load
RFILTER < 100Ω
RFILTER <100Ω
CFILTER
INA206− INA208
VIN+
VS
1
14
OUT
2
13
CMP1 IN−/0.6V REF
3
CMP1 IN+
4
11 CMP1 OUT
CMP2 IN−
5
10 CMP2 OUT
CMP2 IN+/0.6V REF
6
9
CMP2 DELAY
GND
7
8
CMP1 RESET
1.2V REF
VIN−
12 1.2V REF OUT
f−3dB
f −3dB =
1
2π(2RFILTER)CFILTER
SO−14, TSSOP−14
Figure 5. Input Filter (Gain Error − 1.5% to −2.2%)
13
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REFERENCE
The INA206, INA207, and INA208 include an internal
voltage reference that has a load regulation of 0.4mV/mA
(typical), and not more than 100ppm/°C of drift. Only the
14-pin package allows external access to reference
voltages, where voltages of 1.2V and 0.6V are both
available. Output current versus output voltage is
illustrated in the Typical Characteristics section.
COMPARATOR
The INA206, INA207, and INA208 devices incorporate two
open-drain comparators. These comparators typically
have 2mV of offset and a 1.3µs (typical) response time.
The output of Comparator 1 latches and is reset through
the CMP1 RESET pin, as shown in Figure 7. This
configuration applies to both the 10- and 14-pin versions.
Figure 6 illustrates the comparator delay.
The 14-pin versions of the INA206, INA207, and INA208
include additional features for comparator functions. The
comparator reference voltage of both Comparator 1 and
Comparator 2 can be overridden by external inputs for
increased design flexibility. Comparator 2 has a
programmable delay.
high output. Using an initial assumption that the U1 output
is low, I1 is on, then U2 +IN is zero. If U1 goes high, I2
supplies 120nA to CDELAY. The voltage at U2 +IN begins to
ramp toward a 0.6V threshold. When the voltage crosses
this threshold, the U2 output goes high while the voltage
at U2 +IN continues to ramp up to a maximum of 1.2V
when given sufficient time (twice the value of the delay
specified for CDELAY). This entire sequence is reversed
when the comparator outputs go low, so that returning to
low exhibits the same delay.
It is important to note what will happen if events occur more
rapidly that the delay timeout; for example, when the U1
output goes high (turning on I2), but returns low (turning I1
back on) prior to reaching the 0.6V transition for U2. The
voltage at U2 +IN ramps back down at a rate determined
by the value of CDELAY, and only returns to zero if given
sufficient time.
In essence, when analyzing Comparator 2 for behavior
with events more rapid than its delay setting, use the
model shown in Figure 6.
1.2V
COMPARATOR DELAY (14-Pin Version Only)
The Comparator 2 programmable delay is controlled by a
capacitor connected to the CMP2 Delay Pin; see Figure 2.
The capacitor value (in µF) is selected by using
Equation (4):
C DELAY (in mF) +
tD
5
I2
120nA
U1
U2
I1
120nA
0.6V
(4)
A simplified version of the delay circuit for Comparator 2
is shown in Figure 6. The delay comparator consists of two
comparator stages with the delay between them. Note that
I1 and I2 cannot be turned on simultaneously; I1
corresponds to a U1 low output and I2 corresponds to a U1
CDELAY
Figure 6. Simplified Model of the Comparator 2
Delay Circuit
0.6V
VIN
0V
CMP Out
RESET
Figure 7. Comparator 1 Latching Capability
14
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RSHUNT
3mΩ
12V Supply
12V Load
3.3V Supply
VS
INA206
x20
OUT
1.2V REF
CMP1 IN−/0.6 REF
CMP1 IN+
2.5V Reference
VIN+
VIN−
1.2V REF OUT
CMP1 OUT
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
Shutdown
Warning
CDELAY
0.1µF
(0.5s)
Figure 8. Server 12V Supply Current Monitor
COMPARATOR MAXIMUM INPUT VOLTAGE
RANGE
i ≤ 1mA
The maximum voltage at the comparator input for normal
operation is up to (V+) − 1.5V. There are special
considerations when overdriving the reference inputs
(pins 3 and 6). Driving either or both inputs high enough to
drive 1mA back into the reference introduces errors into
the reference. Figure 9 shows the basic input structure. A
general guideline is to limit the voltage on both inputs to a
total of 20V. The exact limit depends on the available
voltage and whether either or both inputs are subject to the
large voltage. When making this determination, consider
the 20kΩ from each input back to the comparator.
Figure 10 shows the maximum input voltage that avoids
creating a reference error when driving both inputs (an
equivalent resistance back into the reference of 10kΩ).
1.2V
20kΩ
20kΩ
CMP1 IN−
CMP2 IN+
Figure 9. Limit Current Into Reference 3 1mA
RSHUNT
Load Supply
−18V to +80V
Load
5V Supply
VS
Current Shunt
Monitor Output
V < 11.2V
INA206
x20
OUT
CMP1 IN−/0.6 REF
CBYPASS
0.01µF
CMP1 IN+
1.2V REF
VIN+
VIN−
RPULL−UP
4.7kΩ
RPULL−UP
4.7kΩ
1.2V REF OUT
CMP1 OUT
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
Transparent/Reset
Optional Delay
Capacitor
0.2µF/s
Latch
Figure 10. Overdriving Comparator Inputs Without Generating a Reference Error
15
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RSHUNT
3mΩ
Supply
Load
5V Supply
Q1A, Q1B
MMDT2907A
VS
INA206
x20
OUT
R1
1kΩ
1.2V REF
CMP1 IN−/0.6 REF
CMP1 IN+
RRAMP
4.99kΩ
VIN+
VIN−
1.2V REF OUT
CMP1 OUT
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
RPULL−UP
1kΩ
PWM OUT
D1
1N5711
CRAMP
0.27µF
R2
4.02kΩ
D1
1N5711
Figure 11. PWM Output Current-Shunt Monitor
RSHUNT
Load
Load Supply
Supply
VIN+
5kΩ
+5V
Supply
VS+
VIN−
5kΩ
RPULL−UP
1kΩ
A1
VS
CMP1 IN−/0.6 REF
A2
INA193
VIN+
INA206
x20
OUT
1.2V REF
CMP1 IN+
RL
OUT
1.2V REF OUT
CMP1 OUT
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
GND
Figure 12. Bi-Directional Current Comparator
16
VIN−
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R SHUNT
Load
Supply
+5V Supply
VS
x20
1.2V REF
CMP1 IN−/0.6 REF
Lower Window
Voltage
VIN+
INA206
OUT
1.2V REF OUT
CMP1 OUT
CMP1 IN+
Upper Window
Voltage
RPULL−UP
1kΩ
VIN−
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
a) Generic Window Comparator
R SHUNT
Load
Supply
+5V Supply
VS
CMP1 IN−/0.6 REF
VIN+
INA206
x20
OUT
1.2V REF
VIN−
RPULL−UP
1kΩ
1.2V REF OUT
CMP1 OUT
CMP1 IN+
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
b) Window Comparator with +1.2V Upper Limit and +0.6V Lower Limit
R SHUNT
Load
Supply
+5V Supply
VS
x20
OUT
R1
R2
R3
R4
CMP1 IN−/0.6 REF
CMP1 IN+
VIN+
INA206
1.2V REF
VIN−
RPULL−UP
1kΩ
VUPPER =
0.6(R1 + R2)
R2
1.2V REF OUT
CMP1 OUT
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
VLOWER =
0.6(R3 + R4)
R4
c) Window Comparator with Individual Dividers
Figure 13. Using the INA206, INA207, and INA208 as Window Comparators
17
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SBOS360 − JULY 2006
RSHUNT
Load
Supply
+5V Supply
VS
INA206
x20
OUT
R1
R3
1.2V REF
CMP1 IN−/0.6 REF
R4
RPULL−UP
1kΩ
VIN−
1.2V REF OUT
CMP1 OUT
CMP1 IN+
R2
VIN+
Power Good
CMP2 IN−
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1 RESET
VUPPER =
0.6(R1 + R2)
R2
VLOWER =
Analog Current Signal
0.6(R3 + R4)
R4
Figure 14. Analog Output Current-Shunt Monitor with Comparators Used as Power-Supply
Under-Limit/Over-Limit or Power-Good Detector
18
PACKAGE OPTION ADDENDUM
www.ti.com
7-Aug-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
INA206AID
ACTIVE
SOIC
D
14
INA206AIDR
ACTIVE
SOIC
D
14
50
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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