HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M PACKAGE SCHEMATIC N/C 1 8 VCC + 2 7 N/C 8 1 V F _ 8 8 1 3 N/C 4 6 VO 5 GND 1 DESCRIPTION The HCPL4503M optocoupler consists of an AlGaAs LED optically coupled to a high speed photodetector transistor. A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the base-collector capacitance of the input transistor. The base of the phototransistor is not bonded out to a pin for improved noise immunity. An internal noise shield provides superior common mode rejection of 15kV/µs minimum. FEATURES • • • • • • • VISO = 5kV RMS is standard for all devices High speed-1 MBit/s Superior CMR, CMH = 50 kV/ms (typical); CML = 30 kV/ms (typical) No base connection for improved noise immunity CTR guaranteed 0-70°C U.L. recognized (File # E90700, Vol 2) VDE approval pending APPLICATIONS • • • • Line receivers Pulse transformer replacement Output interface to CMOS-LSTTL-TTL Wide bandwidth analog coupling © 2004 Fairchild Semiconductor Corporation Page 1 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Symbol Value Units Storage Temperature TSTG -40 to +125 °C Operating Temperature TOPR -40 to +100 °C Lead Solder Temperature TSOL 260 for 10 sec °C DC/Average Forward Input Current IF (avg) 25 mA Peak Forward Input Current (50% duty cycle, 1 ms P.W.) IF (pk) 50 mA IF (trans) 1.0 A EMITTER Peak Transient Input Current - (≤1 µs P.W., 300 pps) Reverse Input Voltage VR 5 V Input Power Dissipation PD 100 mW Average Output Current IO (avg) 8 mA Peak Output Current DETECTOR IO (pk) 16 mA Supply Voltage VCC -0.5 to 30 V Output Voltage VO -0.5 to 20 V Output power dissipation PD 100 mW © 2004 Fairchild Semiconductor Corporation Page 2 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) INDIVIDUAL COMPONENT CHARACTERISTICS Parameter EMITTER Test Conditions Symbol (IF = 16 mA, TA =25°C) Min VF Input Forward Voltage (IF = 16 mA) Input Reverse Breakdown Voltage (IR = 10 µA) BVR Temperature coefficient of forward voltage (IF = 16 mA) (∆VF/∆TA) Typ** Max 1.45 1.7 1.8 5.0 Unit V V -1.6 mV/°C DETECTOR (IF = 0 mA, VO = VCC = 5.5 V) (TA =25°C) Logic high output current (IF = 0 mA, VO = VCC = 15 V) (TA =25°C) IOH 0.001 0.5 0.005 1 (IF = 0 mA, VO = VCC = 15 V) Logic low supply current Logic high supply current (IF = 16 mA, VO = Open) (VCC = 15 V) (IF = 0 mA, VO = Open, VCC = 15 V) (TA =25°C) (IF = 0 mA, VO = Open) (VCC = 15 V) µA 50 ICCL 120 200 µA 1 µA ICCH 2 ** All Typicals at TA = 25°C © 2004 Fairchild Semiconductor Corporation Page 3 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M TRANSFER CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Parameter COUPLED Current transfer ratio (Note 5) Test Conditions Symbol (IF = 16 mA, VO = 0.4 V) (Note 1) (VCC = 4.5 V, TA =25°C) (IF = 16 mA, IO = 3 mA) (VCC = 4.5 V, TA =25°C) (IF = 16 mA, IO = 2.4 mA) (VCC = 4.5 V) Typ** Max 19 27 50 CTR (IF = 16 mA, VCC = 4.5 V, VOL=0.5V) Logic low output voltage output voltage Min Unit % 15 30 0.5 V VOL 0.5 ** All Typicals at TA = 25°C SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 5 V) Parameter Propagation delay time to logic low Propagation delay time to logic high Test Conditions Symbol (RL = 1.9 kΩ, IF = 16 mA) (Note 2) (Fig. 7) TA = 25°C Min TPHL Typ** Max Unit 0.45 0.8 µs 1.0 µs 0.8 µs 1.0 µs (RL = 1.9 kΩ, IF = 16 mA) (Note 2) (Fig. 7) (RL = 1.9 kΩ, IF = 16 mA) (Note 2) (Fig. 7) TA = 25°C 0.3 TPLH (RL = 1.9 kΩ, IF = 16 mA) (Note 2) (Fig. 7) Common mode transient immunity at logic high (IF = 0 mA, VCM = 1,500 VP-P) TA = 25°C, (RL = 1.9 kΩ) (Note 3) (Fig. 8) |CMH| 15,000 50,000 V/µs Common mode transient immunity at logic low (IF = 16 mA, VCM = 1,500 VP-P) (RL = 1.9 kΩ) (Note 3) (Fig. 8) |CML| 15,000 30,000 V/µs ** All Typicals at TA = 25°C © 2004 Fairchild Semiconductor Corporation Page 4 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Characteristics Input-output insulation leakage current Withstand insulation test voltage Resistance (input to output) Capacitance (input to output) Test Conditions (Relative humidity = 45%) (TA = 25°C, t = 5 s) (VI-O = 3000 VDC) (Note 4) Symbol Min Typ** II-O Max Unit 1.0 µA (RH ≤ 50%, TA = 25°C) (Note 4) ( t = 1 min.) VISO (Note 9) (VI-O = 500 VDC) RI-O 1012 Ω (Note 4) (f = 1 MHz) CI-O 0.6 pF 5,000 VRMS Notes 1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor. 3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V). 4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. © 2004 Fairchild Semiconductor Corporation Page 5 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M Fig. 2 Normalized CTR vs. Temperature 1.2 1.0 1.0 NORMALIZED CTR NORMALIZED CTR Fig. 1 Normalized CTR vs. Forward Current 1.2 0.8 0.6 0.4 VO = 0.4 V VCC = 5 V TA = 25°C Normalized to: IF = 16 mA 0.2 0.0 0.1 1 0.8 0.6 0.4 10 0.0 -60 100 -40 -20 IF - FORWARD CURRENT (mA) 20 40 60 80 100 80 100 Fig. 4 Logic High Output Current vs. Temperature 1000 TA = 25°C VCC = 5 V 14 IOH - LOGIC HIGH OUTPUT CURRENT (nA) 16 IO - OUTPUT CURRENT (mA) 0 TA - TEMPERATURE (°C) Fig. 3 Output Current vs. Output Voltage IF = 40 mA IF = 35 mA 12 IF = 30 mA 10 IF = 25 mA 8 IF = 20 mA 6 IF = 15 mA 4 IF = 10 mA 2 IF = 5 mA 0 2 4 6 8 10 12 14 16 18 IF = 0 mA VCC = 5 V VO = 5 V 100 10 1 0.1 -60 0 20 -40 -20 20 40 60 Fig. 6 Propagation Delay vs. Load Resistance Fig. 5 Propagation Delay vs. Temperature 800 10000 700 RL = 4.1 K (TPLH) TP - PROPAGATION DELAY (ns) 600 0 TA - TEMPERATURE (°C) VO - OUTPUT VOLTAGE (V) Tp - PROPAGATION DELAY (ns) IF = 16mA VCC = 5 V VO = 0.4 V Normalized to: TA = 25°C 0.2 RL = 4.1 K (TPLH) 500 400 300 200 RL = 1.9 K (TPHL) IF = 16 mA VCC = 5 V RL = 1.9 K (TPLH) 100 IF - 16 mA (TPHL) IF - 10 mA (TPHL) 1000 IF - 16 mA (TPLH) IF - 10 mA (TPLH) 0 -60 -40 -20 0 20 40 60 80 100 100 TA - TEMPERATURE (°C) © 2004 Fairchild Semiconductor Corporation VCC = 5 V TA = 25°C 1 10 RL = LOAD RESISTANCE (kΩ) Page 6 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M 1 Pulse Generator I F tr = 5ns Z O = 50 Ω 10% D.C. I/f < 100µs Noise Shield 8 VCC +5 V + 2 7 VF - 3 6 N/C RL VO VO 0.1 µF I F Monitor 4 Rm 5 C L = 1.5 µF GND IF 0 5V VO 1.5 V 1.5 V VOL TPHL TPLH Fig. 7 Switching Time Test Circuit IF 1 Noise Shield 8 VCC +5 V + 2 7 3 6 VF - A B N/C VO RL VO 0.1 µF VFF 4 5 GND - VCM + - Pulse Gen VCM 10 V 0V 90% 90% 10% 10% tr tf VO 5V Switch at A : IF = 0 mA VO VOL Switch at A : IF = 16 mA Fig. 8 Common Mode Immunity Test Circuit © 2004 Fairchild Semiconductor Corporation Page 7 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M Package Dimensions (Through Hole) Package Dimensions (Surface Mount) 0.390 (9.91) 0.370 (9.40) PIN 1 ID. 4 3 2 4 3 2 1 0.270 (6.86) 0.250 (6.35) 5 6 7 PIN 1 ID. 1 0.270 (6.86) 0.250 (6.35) 8 5 6 8 7 SEATING PLANE 0.390 (9.91) 0.370 (9.40) 0.020 (0.51) MIN 0.020 (0.51) MIN 0.200 (5.08) 0.140 (3.55) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 15° MAX 3 2 0.405 (10.30) MIN Lead Coplanarity : 0.004 (0.10) MAX 8 - Pin Dip PIN 1 ID. 1 0.315 (8.00) MIN 0.100 (2.54) TYP 0.300 (7.62) TYP 0.070 (1.78) 0.270 (6.86) 0.250 (6.35) 5 6 7 0.060 (1.52) 8 0.100 (2.54) 0.390 (9.91) 0.370 (9.40) SEATING PLANE 0.016 (0.41) 0.008 (0.20) 0.045 [1.14] 0.022 (0.56) 0.016 (0.41) Package Dimensions (0.4"Lead Spacing) 4 0.300 (7.62) TYP 0.070 (1.78) 0.045 (1.14) 0.070 (1.78) 0.045 (1.14) 0.295 (7.49) 0.415 (10.54) 0.070 (1.78) 0.045 (1.14) 0.030 (0.76) 0.004 (0.10) MIN 0.200 (5.08) 0.140 (3.55) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 0° to 15° 0.400 (10.16) TYP NOTE All dimensions are in inches (millimeters) © 2004 Fairchild Semiconductor Corporation Page 8 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M ORDERING INFORMATION Option Example Part Number S HCPL4503SM SD HCPL4503SDM Description Surface Mount Lead Bend Surface Mount; Tape and reel (1,000 units per reel) T HCPL4503TM 0.4" Lead Spacing V HCPL4503VM VDE0884 (approval pending) TV HCPL4503TVM VDE0884 (approval pending); 0.4” lead spacing SV HCPL4503SVM VDE0884 (approval pending); surface mount SDV HCPL4503SDVM VDE0884 (approval pending); surface mount; tape and reel (1,000 units per reel) MARKING INFORMATION 1 V 3 4503 2 XX YY TB 6 4 5 Definitions 1 Fairchild logo 2 Device number 3 VDE mark (Note: Only appears on parts ordered with VDE option – See order entry table) 4 Two digit year code, e.g., ‘03’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code © 2004 Fairchild Semiconductor Corporation Page 9 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M Carrier Tape Specifications P0 t K0 P2 D0 E F A0 W1 W B0 d Description Tape Width Tape Thickness P User Direction of Feed D1 Symbol Dimension in mm W 16.0 ± 0.3 t 0.30 ± 0.05 Sprocket Hole Pitch P0 4.0 ± 0.1 Sprocket Hole Diameter D0 1.55 ± 0.05 Sprocket Hole Location E 1.75 ± 0.10 F 7.5 ± 0.1 Pocket Location P2 4.0 ± 0.1 P 12.0 ± 0.1 A0 10.30 ±0.20 Pocket Dimensions B0 10.30 ±0.20 K0 4.90 ±0.20 Cover Tape Width W1 1.6 ± 0.1 d 0.1 max Pocket Pitch Cover Tape Thickness Max. Component Rotation or Tilt Min. Bending Radius © 2004 Fairchild Semiconductor Corporation 10° R Page 10 of 12 30 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M Reflow Profile 245 C, 10–30 s Temperature (°C) 300 260 C peak 250 200 150 Time above 183C, <160 sec 100 50 Ramp up = 2–10C/sec 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) • Peak reflow temperature: 260 C (package surface temperature) • Time of temperature higher than 183 C for 160 seconds or less • One time soldering reflow is recommended © 2004 Fairchild Semiconductor Corporation Page 11 of 12 4/29/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS HCPL4503M DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. © 2004 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Page 12 of 12 4/29/04