GPIO ICs Series Key Encoder IC No.09098EAT03 BU1851GUW ●Description Key Encoder IC can monitor up to 8x8 matrix (64 keys), which means to be adaptable to Qwerty keyboard. We adopt the architecture that the information of the only key which status is changed, like push or release, is encoded into the 8 bits data. This can greatly reduce the CPU load which tends to become heavier as the number of keys increase. (Previously, all key's status is stored in the registers.) Furthermore, auto sleep function contribute to low power consumption, when no keys are pressed. It is also equipped with the various functions such as ghost key rejection, N-key Rollover, Built-in power on reset and oscillator. ●Features 1) Monitor up to 64-matrix keys 2) Under 5A Stand-by Current 3) Built-in Power On Reset 4) Ghost key rejection ●Absolute maximum ratings (Ta=25℃) Item Supply Voltage*1 Symbol VDD Unit -0.3 ~ +4.5 VI Storage temperature range Tstg -0.3 ~ VDD +0.3 V ℃ -55 ~ +125 *2 PD comment V *1 Input voltage Package power Value 272 mW This IC is not designed to be X-ray proof. *1 *2 It is prohibited to exceed the absolute maximum ratings even including +0.3 V. Package dissipation will be reduced each 2.72mW/ oC when the ambient temperature increases beyond 25 oC. ●Operating Conditions Limit Item Symbol Unit Condition Min Typ Max VDD 2.20 3.30 3.60 V VIN -0.2 - VDD+0.2 V Operating temperature range Topr -30 25 +85 ℃ External clock Fclk 0.8 1.0 1.2 MHz CLKSEL=VDD External resistor Rxi 118.8 120 121.2 kΩ To Xi pin, when CLKSEL=VSS Supply voltage range（VDD） Input voltage range www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/12 2009.09 - Rev.A Technical Note BU1851GUW ● Package Specification U1851 Lot No. Fig.1 Package Specification（VBGA035W040） www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/12 2009.09 - Rev.A Technical Note BU1851GUW ● Pin Assignment A 1 2 3 4 5 6 TESTM0 XRST XO XI ROW0 TESTM3 CLKSEL VDD VDD ROW2 ROW1 B C KINT VDD VSS PORENB ROW4 ROW3 D KSDA VDD VSS VSS ROW6 ROW5 E KSCL COL6 COL4 COL2 COL0 ROW7 F TESTM1 COL7 COL5 COL3 COL1 TESTM2 Fig.2 Pin Diagram（Top View） ● Block Diagram XO XI CLKSEL VDD Oscillator TESTM[3:0] KINT KSCL 3wire Control 8bit Column Drive 8bit COL[7:0] 8bit Row Monitor 8bit ROW[7:0] Key Encoder KSDA Key Scan 3wire Timeout Reset Gen XRST PORENB Power On Reset VSS Fig.3 Functional Block Diagram www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/12 2009.09 - Rev.A Technical Note BU1851GUW ● Pin-out Functional Descriptions I/O Function Init Cell Type VDD - Power supply (Core, I/O) - - VSS - GND - - XRST I Reset（Low Active） I A I B I G PIN name H: External clock is used L: Internal CR oscillator is used External clock input when “CLKSEL” is H. 120k is attached up to VDD when “CLKSEL” is L. CLKSEL I XI I XO O Test pin*1 L C KINT O Key Interrupt H C KSCL I Clock for serial interface I A KSDA I/O Serial data inout for serial interface I D ROW0 I ROW1 I ROW2 I ROW3 I I I Pull-up E ROW4 Row input from key matrix (Pull-up) ROW5 I ROW6 I ROW7 I COL0 O COL1 O COL2 O COL3 O Column output to key matrix L C COL4 O COL5 O COL6 O COL7 O PORENB I Power on reset enable (Low Active) I B TESTM0 I TESTM1 I I F TESTM2 I TESTM3 I *2 Test Pin *1 Note: This pin must be open in normal operation. *2 Note: All these pins must be tied down to GND in normal operation. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 4/12 2009.09 - Rev.A Technical Note BU1851GUW A B C E F G D Fig.4 Equivalent IO circuit diagram www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/12 2009.09 - Rev.A Technical Note BU1851GUW ● Functional Description 1. Power mode The device enters the state of Power Down when XRST=”Low”. When XRST=High after powered, the device enters the standby state. Power On Reset A Power On Reset logic is implemented in this device. Therefore, it will operate correctly even if the XRST port is not used. In this case, the XRST port must be connected to high (VDD), and the PORENB port must be connected to low (VSS). If you don’t want to use Power On reset, you must connect PORENB port to high (VDD). Power Down State The device enters Power Down state by XRST=”Low”. An internal circuit is initialized, and key encoding and 3wire interface are invalid. Power On Reset becomes inactive during this state. Stand-by State The device enters the stand-by state by setting XRST to "High". In this state, the device is waiting for keys pressed. When a key is pressed, the state will change to operation. Power On Reset is active in this state if PORENB = low. Operating State The device enters the operating state by pressing keys. The device will scan the key matrix and encode the key code, and then the 3wire interface tries to start communication by driving KINT “Low”. See sec.2 for the details. After communicating with host device, when no keys are pressed, the device returns to the stand-by state. Power On Reset is active in this state if PORENB=low. 2. 3wire Interface KINT KSCL invalid KSDA Bit7 Bit6 Bit5 Bit0 Start bit sent by host device sent by BU1851 Fig.5 Protocol Figure 5 shows the protocol of BU1851. BU1851 protocol basically consists of 3 wire configuration (KINT, KSCL, and KSDA) as shown above. Note that this 3wire interface is completely different from I2C and other standard bus interface. Procedure 1. When BU1851 detects key events, KINT interrupt is generated to host with driving Low. 2. After the host detects KINT interrupt, the host is supposed to send start bit. 3. After BU1851 detects start bit, the 8bit data (key code) transmission on KSDA will start synchronized with the rising edge of KSCL clock signal, which is sent from the host. th 4. 8 bit data are followed by “0” (9 bit is always “0”), and then BU1851 drives High on KINT line. timeout Fig.6 shows the 3wire timeout sequence. It is suppose to happen when Host doesn’t response anything in a certain time. 1. bu1851 generates KINT interrupt. 2. But Host doesn’t response within 500ms. 3. BU1851 stops KINT, and tries to communicate again by generating KINT. 4. BU1851 will go into the stand-by state when the communication fails five times. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/12 2009.09 - Rev.A Technical Note BU1851GUW Power Mode Operating state Stand-by state KINT start again 5 times fail --> state will change to stand-by communication doesn't establish. (Host doesn't response within 500ms) Fig.6 3wire timeout See also “3wire interface AC characteristics”. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/12 2009.09 - Rev.A Technical Note BU1851GUW 3. Key code Assignment Table 1 shows the key code assignment. These key codes are sent through KSDA line corresponding to the pushed or released keys as indicated in section 2. Table.1 Key code ROW0 ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 ROW7 M 0x01 0x11 0x21 0x31 0x41 0x51 0x61 0x71 B 0x81 0x91 0xA1 0xB1 0xC1 0xD1 0xE1 0xF1 M 0x02 0x12 0x22 0x32 0x42 0x52 0x62 0x72 B 0x82 0x92 0xA2 0xB2 0xC2 0xD2 0xE2 0xF2 M 0x03 0x13 0x23 0x33 0x43 0x53 0x63 0x73 B 0x83 0x93 0xA3 0xB3 0xC3 0xD3 0xE3 0xF3 M 0x04 0x14 0x24 0x34 0x44 0x54 0x64 0x74 B 0x84 0x94 0xA4 0xB4 0xC4 0xD4 0xE4 0xF4 M 0x05 0x15 0x25 0x35 0x45 0x55 0x65 0x75 B 0x85 0x95 0xA5 0xB5 0xC5 0xD5 0xE5 0xF5 M 0x06 0x16 0x26 0x36 0x46 0x56 0x66 0x76 B 0x86 0x96 0xA6 0xB6 0xC6 0xD6 0xE6 0xF6 M 0x07 0x17 0x27 0x37 0x47 0x57 0x67 0x77 B 0x87 0x97 0xA7 0xB7 0xC7 0xD7 0xE7 0xF7 M 0x08 0x18 0x28 0x38 0x48 0x58 0x68 0x78 B 0x88 0x98 0xA8 0xB8 0xC8 0xD8 0xE8 0xF8 COL0 COL1 COL2 COL3 COL4 COL5 COL6 COL7 M: Make Key (the code when the key is pressed) B: Break Key (the code when the key is released) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/12 2009.09 - Rev.A Technical Note BU1851GUW 4. Ghost Key Rejection Ghost key is an inevitable phenomenon as long as key-switch matrices are used. When three switches located at the corners of a certain matrix rectangle are pressed simultaneously, the switch that is located at the last corner of the rectangle (the ghost key) also appears to be pressed, even though the last key is not pressed. This occurs because the ghost key switch is electrically shorted by the combination of the other three switches (Fig.7). Because the key appears to be pressed electrically, it is impossible to distinguish which key is the ghost key and which key is pressed. The BU1851 solves the ghost key problem to use the simple method. If BU1851 detects any three-key combination that generates a fourth ghost key, and BU1851 does not report anything, indicating the ghost keys are ignored. This means that many combinations of three keys are also ignored when pressed at the same time. Applications requiring three-key combinations (such as <Ctrl><Alt><Del>) must ensure that the three keys are not wired in positions that define the vertices of a rectangle (Fig. 8). There is no limit on the number of keys that can be pressed simultaneously as long as the keys do not generate ghost key events. PRESSED KEY EVENT GHOST-KEY EVENT KEY-SWITCH MATRIX Fig.7 Ghost key phenomenon EXAMPLES OF VALID THREE-KEY COMBINATIONS KEY-SWITCH MATRIX KEY-SWITCH MATRIX Fig.8 Valid three key combinations www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/12 2009.09 - Rev.A Technical Note BU1851GUW ● 3wire Interface AC characteristics State START BIT 7 BIT 0 BIT 6 "0" tLOW;INT tSU;STA tHD;INTE KINT tHIGH;CLK 1/fSCLK tLOW;CLK KSCL KSDA tSU;DAT tHD;DAT tHD;STA Fig.9 3wire interface AC timing VDD=3.30V，Topr=25℃, CLKSEL=H (Sysclk = External Clock) Item Symbol Min Typ Max Unit KSCL Clock Frequency fSCLK - - 21.5 kHz tSU;STA 0.030 - 500 ms tHD;STA 20 - - s KSCL Low Time tLOW;CLK 23 - - s KSCL High Time tHIGH;CLK 23 - - s Data Setup Time tSU;DAT tHIGH;CLK – (1/Sysclk)x12 - tHIGH;CLK – (1/Sysclk)x10 s Data Hold Time tHD;DAT (1/Sysclk)x10 - (1/Sysclk)x12 s KINT End Hold Time tHD;INTE (1/Sysclk)x3 - (1/Sysclk)x5 s KINT Low Time tLOW;INT 500 - 1200 ms START Condition Setup Time START Condition Hold Time www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/12 Condition 2009.09 - Rev.A Technical Note BU1851GUW ● Application circuit example 2.8V XRST COL7 COL6 XI COL5 XO MPU CLKSEL 120kΩ VSS TESTM[3:0] PORENB VDD 0.1uF open COL4 INT COL3 KINT COL2 COL1 KSCL SDA KSDA COL0 BU1851GUW SCL ROW0 ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 ROW7 Fig. 10 Application circuit example www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/12 2009.09 - Rev.A Technical Note BU1851GUW ●Ordering part number B U 1 Part No. 8 5 1 G Part No. U W Package GUW: VBGA035W040 - E 2 Packaging and forming specification E2: Embossed tape and reel VBGA035W040 <Tape and Reel information> 4.0 ± 0.1 35- φ 0.295±0.05 φ 0.05 M S AB A P=0.5×5 0.5 F E D C B A Embossed carrier tape (with dry pack) Quantity 2500pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) S B P=0.5×5 0.08 S 0.75 ± 0.1 Tape 0.75 ± 0.1 0.10 0.9MAX. 4.0 ± 0.1 1PIN MARK 1pin 1 2 3 4 5 6 (Unit : mm) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Reel 12/12 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2009.09 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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