Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 LM317L 3-Terminal Adjustable Regulator 1 Features 3 Description • The LM317L device is an adjustable, 3-terminal, positive-voltage regulator capable of supplying 100 mA over an output-voltage range of 1.25 V to 32 V. It is exceptionally easy to use and requires only two external resistors to set the output voltage. 1 • • • • • Output Voltage Range Adjustable 1.25 V to 32 V When Used With External Resistor Divider Output Current Capability of 100 mA Input Regulation Typically 0.01% Per InputVoltage Change Output Regulation Typically 0.5% Ripple Rejection Typically 80 dB For Higher Output Current Requirements, See LM317M (500 mA) and LM317 (1.5 A) Device Information PART NUMBER PACKAGE LM317L 2 Applications • • • • • BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.91 mm TO-92 (3) 4.30 mm × 4.30 mm SOT-89 (3) 4.50 mm × 2.50 mm TSSOP (8) 3.00 mm × 4.40 mm Electronic Points of Sale Medical, Health, and Fitness Applications Printers Appliances and White Goods TV Set-Top Boxes 4 Simplified Schematic LM317L VI Input VO Output Adjustment R1 470 W C2 = 1 µF C1 = 0.1 µF R2 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 4 4 4 4 5 5 Absolute Maximum Ratings ..................................... Handling Ratings....................................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 6 8.1 Overview ................................................................... 6 8.2 Functional Block Diagram ......................................... 6 8.3 Feature Description................................................... 7 8.4 Device Functional Modes.......................................... 7 9 Application and Implementation .......................... 8 9.1 Application Information.............................................. 8 9.2 Typical Application ................................................... 8 9.3 General Configurations ........................................... 10 10 Power Supply Recommendations ..................... 14 11 Layout................................................................... 14 11.1 Layout Guidelines ................................................. 14 11.2 Layout Example .................................................... 14 12 Device and Documentation Support ................. 15 12.1 Trademarks ........................................................... 15 12.2 Electrostatic Discharge Caution ............................ 15 12.3 Glossary ................................................................ 15 13 Mechanical, Packaging, and Orderable Information ........................................................... 15 5 Revision History Changes from Revision D (October 2011) to Revision E Page • Added Device Information table, Pin Functions table, Handling Ratings table, Thermal Information table, Typical Characteristics, Detailed Description, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sections .............................. 1 • Deleted Ordering Information table. ....................................................................................................................................... 1 2 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L LM317L www.ti.com SLCS144E – JULY 2004 – REVISED OCTOBER 2014 6 Pin Configuration and Functions D PACKAGE (TOP VIEW) INPUT OUTPUT OUTPUT ADJUSTMENT 1 8 2 7 3 6 4 5 PW PACKAGE (TOP VIEW) NC OUTPUT OUTPUT NC INPUT NC NC ADJUSTMENT NC – No internal connection OUTPUT terminals are all internally connected. 1 8 2 7 3 6 4 5 NC NC OUTPUT NC NC – No internal connection PK PACKAGE (TOP VIEW) LP PACKAGE (TOP VIEW) INPUT INPUT OUTPUT OUTPUT ADJUSTMENT ADJUSTMENT Pin Functions NAME D, PW LP, PK TYPE ADJUSTMENT 4 √ I Output feedback voltage INPUT 1 √ I Input supply voltage √ — No connect √ O Regulated output voltage NC 5 8 DESCRIPTION 2 OUTPUT 3 6 7 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L 3 LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating temperature range (unless otherwise noted) MIN Vl – VO Input-to-output differential voltage TJ Operating virtual-junction temperature (1) MAX UNIT 35 V 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 Handling Ratings Tstg Storage temperature range V(ESD) (1) (2) Electrostatic discharge MIN MAX UNIT °C –65 150 Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 0 3000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 0 2000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions MIN MAX UNIT VO Output voltage 1.25 32 VI – VO Input-to-output voltage differential 2.5 32 V IO Output current 2.5 100 mA TJ Operating virtual-junction temperature 0 125 –40 125 LM317LC LM317LI V °C 7.4 Thermal Information LM317L THERMAL METRIC (1) RθJA Junction-to-ambient thermal resistance (1) 4 D 8 PINS LP 3 PINS PK 3 PINS PW 8 PINS UNIT 97.1 139.5 51.5 149.4 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L LM317L www.ti.com SLCS144E – JULY 2004 – REVISED OCTOBER 2014 7.5 Electrical Characteristics over recommended operating virtual-junction temperature range (unless otherwise noted) TEST CONDITIONS (1) PARAMETER Input voltage regulation (2) VI – VO = 5 V to 35 V VO = 10 V, Ripple regulation MIN TYP MAX TJ = 25°C 0.01 0.02 IO = 2.5 mA to 100 mA 0.02 0.05 f = 120 Hz 66 dB 80 VI = 5 V to 35 V, TJ = 25°C, IO = 2.5 mA to 100 mA, VO ≤ 5 V 25 mV VO ≥ 5 V 5 mV/V VI = 5 V to 35 V, IO = 2.5 mA to 100 mA VO ≤ 5 V 50 mV VO ≥ 5 V 10 mV/V Output voltage change with temperature TJ = 0°C to 125°C Output voltage long-term drift After 1000 hours at TJ = 125°C and VI – VO = 35 V Output noise voltage f = 10 Hz to 10 kHz, Minimum output current to maintain regulation VI – VO = 35 V Peak output current VI – VO ≤ 35 V 10 3 TJ = 25°C mV/V 10 100 Change in ADJUSTMENT current VI – VO = 2.5 V to 35 V, IO = 2.5 mA to 100 mA Reference voltage (output to ADJUSTMENT) VI – VO = 5 V to 35 V, P ≤ rated dissipation IO = 2.5 mA to 100 mA, 1.2 mV/V μV/V 30 1.5 ADJUSTMENT current (2) %V 65 VO = 10 V, 10-μF capacitor between ADJUSTMENT and ground Output voltage regulation (1) UNIT 2.5 200 mA mA 50 100 μA 0.2 5 μA 1.25 1.3 V Unless otherwise noted, these specifications apply for the following test conditions: VI – VO = 5 V and IO = 40 mA. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. All characteristics are measured with a 0.1-μF capacitor across the input and a 1-μF capacitor across the output. Input voltage regulation is expressed here as the percentage change in output voltage per 1-V change at the input. 7.6 Typical Characteristics Change in adjustment current (A) 2 ûIADJ 1 0 ±40 ±15 10 35 60 Operating temperature (C) 85 110 C001 Figure 1. Change in Adjustment Current Over Temperature Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L 5 LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 www.ti.com 8 Detailed Description 8.1 Overview The LM317L device is a 100-mA linear regulator with high voltage tolerance up to 35 V. The device has a feedback voltage that is relative to the output instead of ground. This ungrounded design allows the LM317L device to have superior line and load regulation. This design also allows the LM317L device to be used as a current source or current sink using a single resistor. Any output voltage from 1.25 to 32 V can be obtained by using two resistors. The bias current of the device, up to 2.5 mA, flows to the output; this current must be used by the load or the feedback resistors. The power dissipation is the product of pass-element voltage and current, which is calculated as shown in Equation 1. PD = (VIN – VOUT) × IOUT (1) The application heat sink must be able to absorb the power calculated in Equation 1. In addition to higher performance than fixed regulators, this regulator offers full overload protection, available only in integrated circuits. Included on the chip are current-limiting and thermal-overload protection. All overloadprotection circuitry remains fully functional even when ADJUSTMENT is disconnected. Normally, no capacitors are needed unless the device is situated far from the input filter capacitors, in which case an input bypass is needed. An optional output capacitor can be added to improve transient response. ADJUSTMENT can be bypassed to achieve very high ripple rejection, which is difficult to achieve with standard three-terminal regulators. In addition to replacing fixed regulators, the LM317L regulator is useful in a wide variety of other applications. Since the regulator is floating and sees only the input-to-output differential voltage, supplies of several hundred volts can be regulated as long as the maximum input-to-output differential is not exceeded. Its primary application is that of a programmable output regulator, but by connecting a fixed resistor between ADJUSTMENT and OUTPUT, this device can be used as a precision current regulator. Supplies with electronic shutdown can be achieved by clamping ADJUSTMENT to ground, programming the output to 1.25 V, where most loads draw little current. The LM317LC device is characterized for operation over the virtual junction temperature range of 0°C to 125°C. The LM317LI device is characterized for operation over the virtual junction temperature range of –40°C to 125°C. 8.2 Functional Block Diagram Input Iadj + 1.25V Adj. Over Temp & Over Current Protection Output 6 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L LM317L www.ti.com SLCS144E – JULY 2004 – REVISED OCTOBER 2014 8.3 Feature Description 8.3.1 NPN Darlington Output Drive NPN Darlington output topology provides naturally low output impedance and an output capacitor is optional. To support maximum current and lowest temperature, 2.5-V headroom is recommended (VI – VO). 8.3.2 Overload Block Over-current and over-temperature shutdown protects the device against overload or damage from operating in excessive heat. 8.3.3 Programmable Feedback Op amp with 1.25-V offset input at the ADJUST pin provides easy output voltage or current (not both) programming. For current regulation applications, a single resistor whose resistance value is 1.25 V / IOUT and power rating is greater than (1.25 V)2 / R should be used. For voltage regulation applications, two resistors set the output voltage. See Typical Application for a schematic and the resistor formula. 8.4 Device Functional Modes 8.4.1 Normal operation The device OUTPUT pin will source current necessary to make OUTPUT pin 1.25 V greater than ADJUST terminal to provide output regulation. 8.4.2 Operation With Low Input Voltage The device requires up to 2.5-V headroom (VI – VO) to operate in regulation. With less headroom, the device may drop out and OUTPUT voltage will be INPUT voltage minus drop out voltage. 8.4.3 Operation at Light Loads The device passes its bias current to the OUTPUT pin. The load or feedback must consume this minimum current for regulation or the output may be too high. 8.4.4 Operation In Self Protection When an overload occurs the device will shut down Darlington NPN output stage or reduce the output current to prevent device damage. The device will automatically reset from the overload. The output may be reduced or alternate between on and off until the overload is removed. Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L 7 LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The two output resistors are the only components required to adjust VOUT. 9.2 Typical Application LM317L VI Input VO Output Adjustment R1 470 W C2 = 1 µF C1 = 0.1 µF R2 9.2.1 Design Requirements 1. Use of an input bypass capacitor is recommended if regulator is far from the filter capacitors. 2. For this design example, use the parameters listed in Table 1. 3. Use of an output capacitor improves transient response, but is optional. Table 1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Input voltage range (Output Voltage + 2.5 V) to 32 V Output voltage VREF × (1 + R2 / R1) + IADJ × R2 9.2.2 Detailed Design Procedure 9.2.2.1 Input Capacitor An input capacitor is not required, but it is recommended, particularly if the regulator is not in close proximity to the power-supply filter capacitors. A 0.1-µF ceramic or 1-µF tantalum provides sufficient bypassing for most applications, especially when adjustment and output capacitors are used. 9.2.2.2 Output Capacitor An output capacitor improves transient response, but it not needed for stability. 9.2.2.3 Feedback Resistors The feedback resistor set the output voltage using Equation 2. 8 VREF × (1 + R2 / R1) + IADJ × R2 (2) Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L LM317L www.ti.com SLCS144E – JULY 2004 – REVISED OCTOBER 2014 9.2.2.4 Adjustment Terminal Capacitor The optional adjustment pin capacitor will improve ripple rejection by preventing the amplification of the ripple. When capacitor is used and VOUT > 6 V, a protection diode from adjust to output is recommended. 9.2.2.5 Design Options and Parameters Common Linear Regulator designs are concerned with the following parameters: • Input voltage range • Input capacitor range • Output voltage • Output current rating • Output capacitor range • Input short protection • Stability • Ripple rejection 9.2.2.6 Output Voltage VO is calculated as shown in Equation 3. æ R ö VOUT = VREF ´ ç 1 + 2 ÷ + (IADJ ´ R2 ) R1 ø è (3) Because IADJ typically is 50 µA, it is negligible in most applications. 9.2.2.7 Ripple Rejection CADJ is used to improve ripple rejection; it prevents amplification of the ripple as the output voltage is adjusted higher. If CADJ is used, it is best to include protection diodes. 9.2.2.8 Input Short Protection If the input is shorted to ground during a fault condition, protection diodes provide measures to prevent the possibility of external capacitors discharging through low-impedance paths in the IC. By providing low-impedance discharge paths for CO and CADJ, respectively, D1 and D2 prevent the capacitors from discharging into the output of the regulator. 9.2.3 Application Curves 1.3 40qC 0qC 25qC 125qC VADJUSTMENT (V) 1.28 1.26 1.24 1.22 1.2 0 6.25 12.5 18.75 25 VI VO (V) 31.25 37.5 42.5 D001 Figure 2. Adjustment Voltage Relative to Output Over Temperature Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L 9 LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 www.ti.com 9.3 General Configurations 9.3.1 Regulator Circuit With Improved Ripple Rejection C2 helps to stabilize the voltage at the adjustment pin, which will help reject noise. Diode D1 exists to discharge C2 in case the output is shorted to ground. LM317L Input VI Output VO R1 = 470 W Adjustment C1 = 0.1 µF D1† 1N4002 + R2 = 10 kW + − − C2 = 10 µF C3 = 1 µF Figure 3. Regulator Circuit With Improved Ripple Rejection 9.3.2 0-V to 30-V Regulator Circuit In the 0-V to 30-V regulator circuit application, the output voltage is determined by Equation 4. æ R + R3 ö VOUT = VREF ç 1 + 2 ÷ - 10 V R1 ø è (4) LM317L 35 V Input Output Adjustment VO R1 = 120 W −10 V C1 = 0.1 µF R3 = 820 W R2 = 3 kW 1N4002 Figure 4. 0-V to 30-V Regulator Circuit 9.3.3 Precision Current-Limiter Circuit This application will limit the output current to the ILIMIT shown in Figure 5. LM317L VI Input Output Adjustment R1 Ilimit = 1.25 R1 Figure 5. Precision Current-Limiter Circuit 10 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L LM317L www.ti.com SLCS144E – JULY 2004 – REVISED OCTOBER 2014 General Configurations (continued) 9.3.4 Tracking Preregulator Circuit The tracking preregulator circuit application keeps a constant voltage across the second LM317L in the circuit. R2 = 1.5 kΩ R1 = 470 Ω Adjustment Input VI Output LM317L LM317L Input VO Output Adjustment C1 = 0.1 µF R3 = 240 Ω C2 = 1 µF Output Adjust R4 = 2 kΩ Figure 6. Tracking Preregulator Circuit 9.3.5 Slow-Turn On 15-V Regulator Circuit The capacitor C1, in combination with the PNP transistor, helps the circuit to slowly start supplying voltage. In the beginning, the capacitor is not charged. Therefore, output voltage will start at 1.9 V, as determined by Equation 5. As the capacitor voltage rises, VOUT will rise at the same rate. When the output voltage reaches the value determined by R1 and R2, the PNP will be turned off. VC1 + VBE + 1.25 V = 0 V + 0.65 V + 1.25 V = 1.9 V (5) LM317L VI Input VO = 15 V Output Adjustment R1 = 470 Ω 1N4002 R3 = 50 kΩ R2 = 5.1 kΩ 2N2905 C1 = 25 µF Figure 7. Slow-Turn On 15-V Regulator Circuit Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L 11 LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 www.ti.com General Configurations (continued) 9.3.6 50-mA Constant-Current Battery-Charger Circuit The current-limit operation mode can be used to trickle charge a battery at a fixed current as determined by Equation 6. VI should be greater than VBAT + 3.75 V. ICHG = 1.25 V ÷ 24 Ω (1.25 V [VREF] + 2.5 V [headroom]) (6) (7) LM317L VI Input 24 Ω Output Adjustment Figure 8. 50-mA Constant-Current Battery-Charger Circuit 9.3.7 Current-Limited 6-V Charger As the charge current increases, the voltage at the bottom resistor increases until the NPN starts sinking current from the adjustment pin. The voltage at the adjustment pin will drop, and consequently the output voltage will decrease until the NPN stops conducting. LM317L VI Input Output Adjustment 240 Ω 1.1 kΩ VBE ICHG R = VBE I CHG V− Figure 9. Current-Limited 6-V Charger 12 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L LM317L www.ti.com SLCS144E – JULY 2004 – REVISED OCTOBER 2014 General Configurations (continued) 9.3.8 High-Current Adjustable Regulator This application allows higher currents at VOUT than the LM317L device can provide, while still keeping the output voltage at levels determined by the adjustment-pin resistor divider of the LM317L. TIP73 2N2905 VI 500 W 5 kW LM317L 22 W Input Output Adjustment VO 120 W 10 µF 1N4002 47 µF RL 5 kW 10 µF Figure 10. High-Current Adjustable Regulator Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L 13 LM317L SLCS144E – JULY 2004 – REVISED OCTOBER 2014 www.ti.com 10 Power Supply Recommendations The LM317L device is designed to operate from an input voltage supply range between 2.5 V to 32 V greater than the output voltage. If the device is more than six inches from the input filter capacitors, an input bypass capacitor, 0.1 µF or greater, of any type is needed for stability. 11 Layout 11.1 Layout Guidelines • • • It is recommended that the input pin be bypassed to ground with a bypass-capacitor. The optimum placement is closest to the VIN of the device and GND of the system. Care must be taken to minimize the loop area formed by the bypass-capacitor connection, the VIN pin, and the GND pin of the system. For operation at full-rated load, it is recommended to use wide trace lengths to eliminate IR drop and heat dissipation. 11.2 Layout Example OUTPUT Ground COUT R2 Power INPUT OUTPUT R1 ADJ/GND Cadj High Frequency Bypass Capacitor 0.1μF 10μF High Input Bypass Capacitor Ground Figure 11. Layout Diagram 14 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L LM317L www.ti.com SLCS144E – JULY 2004 – REVISED OCTOBER 2014 12 Device and Documentation Support 12.1 Trademarks All trademarks are the property of their respective owners. 12.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. 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Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM317L 15 PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM317LCD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LCDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 125 L317LC LM317LCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LCLP ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type 0 to 125 L317LC LM317LCLPR ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type 0 to 125 L317LC LM317LCLPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type 0 to 125 L317LC LM317LCPK ACTIVE SOT-89 PK 3 1000 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 125 LA LM317LCPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 0 to 125 LA LM317LCPW ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LCPWE4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LCPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LCPWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LCPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 125 L317LC LM317LID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L317LI LM317LIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L317LI LM317LIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 125 L317LI Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2014 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM317LIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L317LI LM317LILP ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 L317LI LM317LILPE3 ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 L317LI LM317LILPR ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 L317LI LM317LIPK ACTIVE SOT-89 PK 3 1000 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 LB LM317LIPKG3 ACTIVE SOT-89 PK 3 1000 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 LB LM317LIPW ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L317LI LM317LIPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L317LI LM317LIPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L317LI LM317LIPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 L317LI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2014 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 18-Jul-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM317LCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LM317LCDR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1 LM317LCDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LM317LCPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3 LM317LCPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 LM317LIDR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1 LM317LIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LM317LIDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LM317LIPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3 LM317LIPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 18-Jul-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM317LCDR SOIC D 8 2500 340.5 338.1 20.6 LM317LCDR SOIC D 8 2500 364.0 364.0 27.0 LM317LCDRG4 SOIC D 8 2500 340.5 338.1 20.6 LM317LCPK SOT-89 PK 3 1000 340.0 340.0 38.0 LM317LCPWR TSSOP PW 8 2000 367.0 367.0 35.0 LM317LIDR SOIC D 8 2500 364.0 364.0 27.0 LM317LIDR SOIC D 8 2500 340.5 338.1 20.6 LM317LIDRG4 SOIC D 8 2500 340.5 338.1 20.6 LM317LIPK SOT-89 PK 3 1000 340.0 340.0 38.0 LM317LIPWR TSSOP PW 8 2000 367.0 367.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP 6.2 SEATING PLANE PIN 1 ID AREA A 0.1 C 6X 0.65 8 1 3.1 2.9 NOTE 3 2X 1.95 4 5 B 4.5 4.3 NOTE 4 SEE DETAIL A 8X 0.30 0.19 0.1 C A 1.2 MAX B (0.15) TYP 0.25 GAGE PLANE 0 -8 0.15 0.05 0.75 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM 1 8 (R0.05) TYP SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK 0.05 MAX ALL AROUND 0.05 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) TYP 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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