INA216 www.ti.com SBOS503B – JUNE 2010 – REVISED JUNE 2010 Small Size, Low-Power, Unidirectional, CURRENT SHUNT MONITOR Zerø-Drift Series Check for Samples: INA216 FEATURES DESCRIPTION • • • • • The INA216 is a high-side voltage output current shunt monitor that can sense drops across shunts at common-mode voltages from +1.8V to +5.5V. Four fixed gains are available: 25V/V, 50V/V, 100V/V, and 200V/V. The low offset of the Zerø-Drift architecture enables current sensing with maximum drops across the shunt as low as 10mV full-scale, or with wide dynamic ranges of over 1000:1. 1 2 • • CHIP-SCALE PACKAGE COMMON-MODE RANGE: +1.8V to +5.5V OFFSET VOLTAGE: ±30mV GAIN ERROR: ±0.2% MAX CHOICE OF GAINS: – INA216A1: 25V/V – INA216A2: 50V/V – INA216A3: 100V/V – INA216A4: 200V/V QUIESCENT CURRENT: 13mA BUFFERED VOLTAGE OUTPUT: No Additional Op Amp Needed APPLICATIONS • • • • • NOTEBOOK COMPUTERS CELL PHONES TELECOM EQUIPMENT POWER MANAGEMENT BATTERY CHARGERS These devices operate from a single +1.8V to +5.5V power supply, drawing a maximum of 25mA of supply current. The INA216 series are specified over the temperature range of –40°C to +125°C, and offered in a chip-scale package. Shunt Supply: +1.8V to +5.5V Load R1 R2 IN+ IN- 1.6MW 1.6MW GND OUT PRODUCT GAIN R1 = R2 INA216A1 INA216A2 INA216A3 INA216A4 25 50 100 200 64kW 32kW 16kW 8kW 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010, Texas Instruments Incorporated INA216 SBOS503B – JUNE 2010 – REVISED JUNE 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE INFORMATION (1) (1) PRODUCT GAIN PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING INA216A1 25V/V WCSP-4 YFF OW INA216A2 50V/V WCSP-4 YFF OX INA216A3 100V/V WCSP-4 YFF OY INA216A4 200V/V WCSP-4 YFF OZ For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. Supply Voltage Analog Inputs, VIN+, VIN– (2) Differential (VIN+)–(VIN–) Common-Mode (3) Output (3) INA216 UNIT +7 V –5.5 to +5.5 V GND–0.3V to +5.5 V GND–0.3V to (V+)+0.3 V 5 mA Operating Temperature –55 to +150 °C Storage Temperature –65 to +150 °C Junction Temperature +150 °C 2.5 kV 1 kV 200 V Input Current into Any Pin (3) Human Body Model ESD Ratings: Charged Device Model Machine Model (1) (2) (3) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively. Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5mA. PIN CONFIGURATION YFF PACKAGE WCSP-4 (TOP VIEW) A2 B2 OUT INA1 IN+ 2 B1 GND (1) Bump side down. Drawing not to scale. (2) Power supply is derived from shunt (minimum common-mode range = 1.8V) Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 INA216 www.ti.com SBOS503B – JUNE 2010 – REVISED JUNE 2010 THERMAL INFORMATION THERMAL METRIC (1) INA216A1YFF, INA216A2YFF INA216A3YFF, INA216A4YFF UNITS YFF 4 (2) qJA Junction-to-ambient thermal resistance qJC(top) Junction-to-case(top) thermal resistance (3) 75 qJB Junction-to-board thermal resistance (4) 76 yJT Junction-to-top characterization parameter (5) 3 yJB Junction-to-board characterization parameter (6) 74 qJC(bottom) Junction-to-case(bottom) thermal resistance (7) n/a (1) (2) (3) (4) (5) (6) (7) 160 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-board characterization parameter, yJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 3 INA216 SBOS503B – JUNE 2010 – REVISED JUNE 2010 www.ti.com ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C and VCM = VIN+= 4.2V, unless otherwise noted. INA216 PARAMETER CONDITIONS MIN TYP MAX UNIT INPUT Offset Voltage, RTI (1) VOS INA216A1 vs Temperature ±30 ±100 mV dVOS/dT 0.06 0.2 mV/°C ±20 ±75 mV dVOS/dT 0.05 0.25 mV/°C ±20 ±75 mV dVOS/dT 0.03 0.25 mV/°C ±20 ±75 mV 0.1 0.3 mV/°C INA216A2 vs Temperature INA216A3 vs Temperature INA216A4 vs Temperature Common-Mode Input Range dVOS/dT VCM Common-Mode Rejection (2) CMRR Power-Supply Rejection PSRR 1.8 5.5 V 90 108 dB 90 108 dB 3 mA INA216A1 25 V/V INA216A2 50 V/V INA216A3 100 V/V INA216A4 200 V/V Input Bias Current VIN+ = +1.8V to +5.5V IIN– OUTPUT Gain G Gain Error INA216A1 VOUT = 0.2V to VOUT = 2.5V ±0.01 ±0.2 % vs Temperature VOUT = 0.2V to VOUT = 2.5V 0.01 0.025 m%/°C INA216A2 0.05 ±0.2 % vs Temperature 0.017 0.1 m%/°C INA216A3 0.06 ±0.2 % vs Temperature 0.023 0.1 m%/°C INA216A4 0.03 ±0.2 % vs Temperature 0.076 0.3 m%/°C Nonlinearity Error Maximum Capacitive Load No sustained oscillation VOLTAGE OUTPUT (3) ±0.01 % 750 pF RL = 10kΩ to GND Swing to V+ Power-Supply Rail (V+) –0.1 (V+) –0.3 Swing to GND (3) (VGND) +0.001 (VGND) +0.002 V Output Impedance 42 Ω INA216A1 20 kHz INA216A2 10 kHz INA216A3 5 kHz INA216A4 2.5 kHz V FREQUENCY RESPONSE Bandwidth (1) (2) (3) 4 BW CLOAD = 10pF RTI: Referred-to-input. CMRR and PSRR are the same because VCM is the supply voltage. See Typical Characteristics graph, Output Swing to Rail (Figure 9). Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 INA216 www.ti.com SBOS503B – JUNE 2010 – REVISED JUNE 2010 ELECTRICAL CHARACTERISTICS (continued) Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C and VCM = VIN+= 4.2V, unless otherwise noted. INA216 PARAMETER CONDITIONS MIN TYP MAX UNIT FREQUENCY RESPONSE, continued Slew Rate SR 0.03 V/ms 60 nV/√Hz NOISE, RTI (4) Voltage Noise Density POWER SUPPLY Specified Range Quiescent Current VIN+ +1.8 IQ 13 Over Temperature TURN-ON TIME VIN+ = 0 to +2.5V; VSENSE = 10mV; VOUT ±0.5% +5.5 V 25 mA 30 mA 200 ms TEMPERATURE RANGE Specified Temperature Range (4) –40 +125 °C RTI: Referred-to-input. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 5 INA216 SBOS503B – JUNE 2010 – REVISED JUNE 2010 www.ti.com TYPICAL CHARACTERISTICS The INA216A1 is used for typical characteristic measurements at TA = +25°C, VS = +4.2V, unless otherwise noted. INPUT OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE vs TEMPERATURE 100 11,604 Units Sampled 80 Population Offset Voltage (mV) 60 40 20 0 -20 -40 -60 -80 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 -100 0 -60 -40 -20 20 Offset Voltage (mV) Figure 1. 60 GAIN ERROR vs TEMPERATURE 8 0.04 7 0.03 6 Eight Typical Units 0.02 Gain Error (%) 5 4 3 2 1 0.01 0 -0.01 -0.02 0 -0.03 -1 -2 -0.04 -60 -40 -20 0 20 40 60 80 100 120 140 160 0 -60 -40 -20 20 Temperature (°C) 40 60 80 100 120 140 160 Temperature (°C) Figure 3. Figure 4. QUIESCENT CURRENT AND NEGATIVE INPUT BIAS CURRENT vs TEMPERATURE GAIN vs FREQUENCY 55 16 INA216A4 14 45 Gain (dB) 8 6 INA216A2 35 IQ 10 IB- VSENSE = 10mV Sine INA216A3 12 Current (mA) 80 100 120 140 160 Figure 2. COMMON-MODE REJECTION RATIO vs TEMPERATURE CMRR (mV/V) 40 Temperature (°C) 25 INA216A1 15 4 5 2 -5 0 -60 -40 -20 6 0 20 40 60 80 100 120 140 160 100 1k 10k Temperature (°C) Frequency (Hz) Figure 5. Figure 6. Submit Documentation Feedback 100k 1M Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 INA216 www.ti.com SBOS503B – JUNE 2010 – REVISED JUNE 2010 TYPICAL CHARACTERISTICS (continued) The INA216A1 is used for typical characteristic measurements at TA = +25°C, VS = +4.2V, unless otherwise noted. QUIESCENT CURRENT AND NEGATIVE INPUT BIAS CURRENT vs VSENSE COMMON-MODE REJECTION RATIO vs FREQUENCY 140 16 14 120 12 Current (mA) CMRR (dB) 100 80 60 40 IQ 10 Normal Range of Operation 8 6 IB- 4 2 20 0 0 1 10 100 1k 10k -2 -0.4 100k -0.3 -0.2 Frequency (Hz) Input-Referred Voltage Noise (nV/ÖHz) Output Voltage Swing (V) GND + 0.30 GND + 0.25 GND + 0.20 GND + 0.15 GND + 0.10 GND + 0.05 GND Sinking 2 3 0.2 0.3 0.4 INPUT-REFERRED VOLTAGE NOISE vs FREQUENCY TA = -40?C TA = +25?C TA = +125?C Sourcing 1 0.1 Figure 8. OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 0 0 VSENSE (mV) Figure 7. V+ (V+) - 0.05 (V+) - 0.10 (V+) - 0.15 (V+) - 0.20 (V+) - 0.25 (V+) - 0.30 0.1 4 5 6 180 140 100 60 20 1 10 100 Output Current (mA) Frequency (Hz) Figure 9. Figure 10. 0.1Hz to 10Hz VOLTAGE NOISE, RTI STEP RESPONSE (80mVPP Input Step) 1k 10k 80mVPP Input Signal Input Voltage (20mV/div) Voltage Noise, Referred-to-Input (200nV/div) Output Voltage (0.5V/div) 2VPP Output Signal Time (1s/div) Time (100ms/div) Figure 11. Figure 12. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 7 INA216 SBOS503B – JUNE 2010 – REVISED JUNE 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) The INA216A1 is used for typical characteristic measurements at TA = +25°C, VS = +4.2V, unless otherwise noted. Output 1V/div INVERTING DIFFERENTIAL INPUT OVERLOAD Common-Mode Voltage Step 0V Inverting Input Overload 50mV/div Common-Mode Voltage (1V/div) COMMON-MODE VOLTAGE TRANSIENT RESPONSE 0V Output Voltage VSENSE = 100mV Output Signal Inverting Input Overload Signal Time (100ms/div) Figure 13. Figure 14. NONINVERTING DIFFERENTIAL INPUT OVERLOAD STARTUP RESPONSE Common-Mode/ Supply Voltage Output Signal 1V/div Noninverting Input Overload Output 1V/div 50mV/div Time (100ms/div) Noninverting Input Overload Signal Output Voltage Time (100ms/div) Time (100ms/div) Figure 15. Figure 16. BROWNOUT RECOVERY 1V/div Common-Mode/ Supply Voltage Output Voltage Time (100ms/div) Figure 17. 8 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 INA216 www.ti.com SBOS503B – JUNE 2010 – REVISED JUNE 2010 APPLICATION INFORMATION Basic Connections VCM IN+ Figure 18 shows the basic connections of the INA216. The input pins, IN+ and IN–, should be connected as closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistance. GND RP VOUT RSHUNT RP ININA216 VCM = 1.8 V to 5.5V Load IN+ GND RSHUNT VOUT Figure 20. Shunt Resistance Measurement Using a Kelvin Connection ININA216 Power Supply Load Figure 18. Typical Application Figure 19 illustrates the INA216 connected to a shunt resistor with additional trace resistance in series with the shunt placed between where the current shunt monitors the input pins. With the typically low shunt resistor values commonly used in these applications, even small amounts of additional impedance in series with the shunt resistor can significantly affect the differential voltage present at the INA216 input pins. VCM IN+ GND RSHUNT VOUT RP RP ININA216 Load Figure 19. Shunt Resistance Measurement Including Trace Resistance, RP Figure 20 shows a proper Kelvin, or four-wire, connection of the shunt resistor to the INA216 input pins. This connection helps ensure that the only impedance between the current monitor input pins is the shunt resistor. The INA216 does not have a dedicated power-supply pin. Instead, an internal connection to the IN+ pin serves as the power supply for this device. Because the INA216 is powered from the IN+ pin, the common-mode input range is limited on the low end to 1.8V. Therefore, the INA216 cannot be used as a low-side current shunt monitor. Selecting RS The selection of the value of the shunt resistor (RS) to use with the INA216 is based on the specific operating conditions and requirements of the application. The starting point for selecting the resistor is to first determine the desired full-scale output from the INA216. The INA216 is available in four gain options: 25, 50, 100, and 200. By dividing the desired full-scale output by each of the gain options, there are then four available differential input voltages that can achieve the desired full-scale output voltage, given that the appropriate gain device is used. With four values for the total voltage that is to be dropped across the shunt, the decision on how much of a drop is allowed in the application must be made. Most applications have a maximum drop allowed to ensure that the load receives the required voltage necessary to operate. Assuming that there are now multiple shunt voltages that are acceptable (based on the design criteria), the choice of what value shunt resistor to use can be made based on accuracy. As a result of the INA216 auto-zero architecture, the input offset voltage is extremely low. However, even the 100mV maximum input offset voltage specification plays a role in the decision of which shunt resistor value to choose. With a larger shunt voltage present at the current shunt monitor input, less error is introduced by the input offset voltage. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 9 INA216 SBOS503B – JUNE 2010 – REVISED JUNE 2010 www.ti.com These comments have framed the decision on what the shunt resistor value should be, based on the full-scale value; but many applications require accurate measurements at levels as low as 10% of the full-scale value. At this level, the input offset voltage of the current shunt monitor becomes a larger percentage of the shunt voltage, and thus contributes a larger error to the output. The percentage of error created by the input offset voltage relative to the shunt voltage is shown in Equation 1. VOS Error_VOS = ? 100 VSENSE (1) Ideally, the differential input voltage at 10% would be increased to minimize the effects of the input offset voltage; however, we are bound by the full-scale value. The full-scale output voltage on the INA216 is limited to 200mV below the supply voltage (IN+). Selecting a shunt resistor to increase the shunt voltage at the low operating range of the load current could easily saturate the output of the current shunt monitor at the full-scale load current. For applications where accuracy over a larger range is needed, a lower gain option (and therefore, a larger differential input voltage) is selected. For applications where a minimal voltage drop on the line that powers the load is required, a higher gain option (and so, a smaller differential input voltage) is selected. For example, consider a design that requires a full-scale output voltage of 4V, a maximum load current of 10A, and a maximum voltage drop on the common-mode line of 25mV. The 25mV maximum voltage drop requirement and a 4V full-scale output limits the gain option to the 200V/V device. A 100V/V setting would require a maximum voltage drop of 40mV with the other two lower gain versions creating larger voltage drops. Based on the gain of 200 on a 4V full-scale output, the maximum differential input voltage would be 20mV. The shunt resistor needed to create a 20mV drop with a 10A load current is 2mΩ. When choosing the proper shunt resistor, it is also important to consider that at higher currents, the power dissipation in the shunt resistor becomes greater. Therefore, it is important to evaluate the drift of the sense resistor as a result of power dissipation, and choose an appropriate resistor based on its power wattage rating. 10 Calculating Total Error The electrical specifications for the INA216 include the typical individual errors terms such as gain error, offset error, and nonlinearity error. Total error including all of these individual error components is not specified in the Electrical Characteristics table. To accurately calculate the error that can be expected from the device, we must first know the operating conditions to which the device is subjected. Some current shunt monitors specify a total error in the product data sheet. However, this total error term is accurate under only one particular set of operating conditions. Specifying the total error at this one point has little practical value, though, because any deviation from these specific operating conditions no longer yields the same total error value. This section discusses the individual error sources, with information on how to apply them in order to calculate the total error value for the device under normal operating conditions. The typical error sources that have the largest impact on the total error of the device are input offset voltage, common-mode voltage rejection, gain error, and nonlinearity error. The nonlinearity error of the INA216 is relatively low compared to the gain error specification, which results in a gain error that can be expected to be relatively constant throughout the linear input range of the device. While the gain error remains constant across the linear input range of the device, the error associated with the input offset voltage does not. As the differential input voltage developed across a shunt resistor at the input of the INA216 decreases, the inherent input offset voltage of the device becomes a larger percentage of the measured input signal, resulting in an increase in measurement error. This varying error is present among all current shunt monitors, given the input offset voltage ratio to the voltage being sensed by the device. The low input offset voltages present in the INA216 devices, however, limit the amount of contribution the offset voltage has on the total error term. Two examples are provided that detail how different operating conditions can affect the total error calculations. Typical and maximum calculations are shown as well to provide the user more information on how much error variance could be present from device to device. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 INA216 www.ti.com SBOS503B – JUNE 2010 – REVISED JUNE 2010 Example 1 Conditions: INA216A3; VCM = VS = 3.3V; VSENSE = 20mV Table 1. Example 1 TERM LABEL EQUATION TYPICAL MAXIMUM Maximum initial input offset voltage VIO — 20mV 75mV 3.6mV 28mV Added input offset voltage as result of common-mode voltage 1 VIO_CM ( ( CMRR_dB 20 · |4.2V - VCM| 10 Total input offset voltage VIO_Total (VIO) + (VIO_CM) 20mV 80mV Error because of input offset voltage Error_VIO VIO_Total · 100 VSENSE 0.1% 0.4% Gain error Error_Gain — 0.06% 0.2% Error_Lin — 0.01% 0.01% 0.12% 0.45% Nonlinearity error 2 2 2 Total error 2 (Error_VIO) + (Error_Gain) + (Error_Lin) 2 Example 2 Conditions: INA216A1; VCM = VS = 5V; VSENSE = 160mV Table 2. Example 2 TERM LABEL EQUATION TYPICAL MAXIMUM Maximum initial input offset voltage VIO — 30mV 100mV 3.1mV 25.2mV Added input offset voltage as result of common-mode voltage 1 VIO_CM ( ( CMRR_dB 20 · |4.2V - VCM| 10 Total input offset voltage VIO_Total (VIO) + (VIO_CM) 30mV 100mV Error because of input offset voltage Error_VIO VIO_Total · 100 VSENSE 0.02% 0.06% Gain error Error_Gain — 0.01% 0.2% 0.01% 0.01% 0.025% 0.21% Nonlinearity error 2 Error_Lin Total error 2 — 2 2 (Error_VIO) + (Error_Gain) + (Error_Lin) 2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 11 INA216 SBOS503B – JUNE 2010 – REVISED JUNE 2010 www.ti.com Input Filtering An ideal location where filtering is implemented is at the inputs for a device. Placing an input filter in front of the INA216, though, is not recommended but can be implemented if it is determined to be necessary. This location is not recommended for filtering because adding input filters induces an additional gain error to the device that can easily exceed the device maximum gain error specification of 0.2%. In the INA216, the nominal current into the IN+ pin is in the range of 13mA while the bias current into the IN– pin is in the range of approximately 3mA. The current flowing into the IN+ pin includes both the input bias current as well as the quiescent current. Where the issue of input filtering begins to become more of an issue is that as the quiescent current of the INA216 also flows through the IN+ pin, when the output begins to drive current, this additional current also flows through the IN+ pin, creating an even larger error. Placing a typical common-mode filter of 10Ω in series with each input and a 0.1mF capacitor across the input pins, as shown in Figure 21, introduces an additional gain error into the system. For example, consider an application using the INA216A3 with a full-scale output of 4V, assuming that the device is not driving any output current. The shunt voltage needed to create the 4V output with a gain of 100 is 40mV. With 10Ω filter resistors on each input, there is a difference voltage created that subtracts from the 40mV full-scale differential current. The error can be calculated using Equation 2. (I - I ) ? RFILTER Error_RFILTER = IN+ IN? 100 VSHUNT (2) RFILTER ? 10W VCM RSHUNT IN+ GND If filtering is required for the application and the gain error introduced by the input filter resistors exceeds the available error budget for this circuit, a filter can be implemented following the INA216. Placing a filter at the output of the current shunt monitor is not typically the ideal location because the benefit of the low impedance output of the amplifier is lost. Applications that require the low impedance output require an additional buffer amplifier that follows the post current shunt monitor filter. Using the INA216 With Transients Above 5.5V With a small amount of additional circuitry, INA216 can be used in circuits subject to transients higher than 5.5V. Use only zener diode or zener-type transient absorbers, which are sometimes referred to as Transzorbs. Any other type of transient absorber has an unacceptable time delay. To use these protection devices, resistors are required in series with the INA216 inputs, as shown in Figure 22. These resistors serve as a working impedance for the zener. It is desirable to keep these resistors as small as possible because of the error described in the Input Filtering section. These protection resistors are most often around 10Ω. Larger values can be used with a greater impact to the total gain error. Because this circuit limits only short-term transients, many applications are satisfied with a 10Ω resistor along with conventional zener diodes of the lowest power rating that can be found. This combination uses the least amount of board space. These diodes can be found in packages as small as SOT-523 or SOD-523. The use of these protection components may allow the INA216 to survive from being damaged in environments where large transients are common. VOUT CFILTER RFILTER ? 10W driving any current). Connecting a 100kΩ load to the 4V output now increases the current by an additional 40mA. This increase in current flowing through the IN+ pin would change the additional gain error from 0.3% to 1.3%. RPROTECT ? 10W VCM IN- IN+ GND INA216 Load Z1 VOUT RSHUNT RPROTECT ? 10W Figure 21. Input Filter ININA216 Load As mentioned previously, the current flowing into the IN+ pin increases once the output begins to drive current because of the quiescent current also flowing into the IN+ pin. The previous example resulted in an additional gain error of 0.3% as a result of the 10Ω filter resistors (assuming the output stage was not 12 Z2 Figure 22. Transient Protection Using Dual Zener Diodes Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 INA216 www.ti.com SBOS503B – JUNE 2010 – REVISED JUNE 2010 REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (June, 2010) to Revision B Page • Removed product preview status of INA216A2, INA216A3, and INA216A4 devices ........................................................... 2 • Added offset voltage specifications for INA216A2, INA216A3, and INA216A4 .................................................................... 4 • Added gain and gain error specifications for INA216A2, INA216A3, and INA216A4 ........................................................... 4 • Added bandwidth specifications for INA216A2, INA216A3, and INA216A4 ......................................................................... 4 • Updated graph grid for Figure 2 through Figure 5 ................................................................................................................ 6 • Revised Table 1 and Table 2 .............................................................................................................................................. 11 • Changed description of nominal current into IN+ pin to 13mA and bias current into IN– pin to 3mA .................................. 12 Changes from Original (June, 2010) to Revision A Page • Changed offset voltage vs temperature specification ........................................................................................................... 4 • Changed gain error vs temperature specification and units ................................................................................................. 4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): INA216 13 D: Max = 790 µm, Min = 730 µm E: Max = 790 µm, Min = 730 µm PACKAGE OPTION ADDENDUM www.ti.com 24-Dec-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) INA216A1YFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Purchase Samples INA216A1YFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Request Free Samples INA216A2YFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Request Free Samples INA216A2YFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Purchase Samples INA216A3YFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Request Free Samples INA216A3YFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Purchase Samples INA216A4YFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Purchase Samples INA216A4YFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Purchase Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 24-Dec-2010 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 22-Dec-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) INA216A1YFFR DSBGA YFF 4 3000 180.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 0.89 0.89 0.58 4.0 8.0 Q1 INA216A1YFFT DSBGA YFF 4 250 180.0 8.4 0.89 0.89 0.58 4.0 8.0 Q1 INA216A2YFFR DSBGA YFF 4 3000 180.0 8.4 0.85 0.85 0.64 4.0 8.0 Q1 INA216A2YFFT DSBGA YFF 4 250 180.0 8.4 0.85 0.85 0.64 4.0 8.0 Q1 INA216A3YFFR DSBGA YFF 4 3000 180.0 8.4 0.85 0.85 0.64 4.0 8.0 Q1 INA216A3YFFT DSBGA YFF 4 250 180.0 8.4 0.85 0.85 0.64 4.0 8.0 Q1 INA216A4YFFR DSBGA YFF 4 3000 180.0 8.4 0.85 0.85 0.64 4.0 8.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 22-Dec-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA216A1YFFR DSBGA YFF 4 3000 190.5 212.7 31.8 INA216A1YFFT DSBGA YFF 4 250 190.5 212.7 31.8 INA216A2YFFR DSBGA YFF 4 3000 190.5 212.7 31.8 INA216A2YFFT DSBGA YFF 4 250 190.5 212.7 31.8 INA216A3YFFR DSBGA YFF 4 3000 190.5 212.7 31.8 INA216A3YFFT DSBGA YFF 4 250 190.5 212.7 31.8 INA216A4YFFR DSBGA YFF 4 3000 190.5 212.7 31.8 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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