AD ADL5521-EVALZ Low noise amplifier Datasheet

400 MHz to 4000 MHz
Low Noise Amplifier
ADL5521
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
Operation from 400 MHz to 4000 MHz
Noise figure of 0.8 dB at 900 MHz
Requires few external components
Integrated active bias control circuit
Integrated dc blocking capacitors
Adjustable bias for low power applications
Single-supply operation from 3 V to 5 V
Gain of 20.8 dB at 900 MHz
OIP3 of 37.0 dBm at 900 MHz
P1dB of 21.8 dBm at 900 MHz
Small footprint LFCSP
Pin-compatible version with 21.5 dB gain available
VBIAS 1
ACTIVE
BIAS
7 RFOUT
RFIN 2
NIC 3
NIC 4
8 VPOS
6 NIC
ADL5521
NIC = NO INTERNAL CONNECTION.
DO NOT CONNECT TO THIS PIN.
5 NIC
06828-001
FEATURES
Figure 1.
GENERAL DESCRIPTION
The ADL5521 is a high performance GaAs pHEMT low noise
amplifier. It provides high gain and low noise figure for singledownconversion IF sampling receiver architectures as well as
direct-downconversion receivers.
The ADL5521 is easy to tune, requiring only a few external
components. The device can support operation from 3 V to 5 V,
and the current draw can be adjusted with the external bias
resistor for applications requiring low power consumption.
The ADL5521 provides a high level of integration by incorporating
the active bias and dc blocking capacitors, making it very easy
to use while not sacrificing design flexibility.
The ADL5521 comes in a compact, thermally enhanced, 3 mm ×
3 mm LFCSP and operates over the temperature range of
−40°C to +85C.
A fully populated evaluation board is also available.
Rev. C
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ADL5521
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
900 MHz, VPOS = 3 V .............................................................. 11
Functional Block Diagram .............................................................. 1
1950 MHz, VPOS = 3 V ............................................................ 12
General Description ......................................................................... 1
2600 MHz, VPOS = 3 V ............................................................ 13
Revision History ............................................................................... 2
3500 MHz, VPOS = 3 V ............................................................ 14
Specifications..................................................................................... 3
DC Characteristics ..................................................................... 15
AC Specifications.......................................................................... 3
Basic Connections .......................................................................... 16
DC Specifications ......................................................................... 4
Evaluation Board ............................................................................ 17
De-Embedded S-Parameters, VPOS = 3 V to 5 V, RFIN =
Port 1, VPOS = Port 2, RFOUT = Port 3 .................................. 4
Soldering Information and Recommended PCB Land
Pattern .......................................................................................... 17
Absolute Maximum Ratings ............................................................ 5
Tuning the ADL5521 for Optimal Noise Figure ........................ 18
ESD Caution .................................................................................. 5
Tuning S22................................................................................... 18
Pin Configuration and Function Descriptions ............................. 6
Tuning the LNA Input for Optimal Gain ................................ 19
Typical Performance Characteristics ............................................. 7
Tuning the LNA Input for Optimal Noise Figure .................. 19
900 MHz, VPOS = 5 V................................................................. 7
S11 of the LNA with S22 Matched ........................................... 20
1950 MHz, VPOS = 5 V .............................................................. 8
Outline Dimensions ....................................................................... 21
2600 MHz, VPOS = 5 V .............................................................. 9
Ordering Guide .......................................................................... 21
3500 MHz, VPOS = 5 V ............................................................ 10
REVISION HISTORY
8/2017—Rev. B to Rev. C
Changed CP-8-2 to CP-8-13 ........................................ Throughout
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 21
11/2013—Rev. A to Rev. B
Added Figure 52, Renumbered Sequentially .............................. 15
9/2009—Rev. 0 to Rev. A
Updated Maximum Junction Temperature Unit (Table 4) ......... 5
10/2008—Revision 0: Initial Version
Rev. C | Page 2 of 24
Data Sheet
ADL5521
SPECIFICATIONS
AC SPECIFICATIONS
TA = 25°C, R1 = 1.3 kΩ; parameters include matching circuit, matched for optimal noise, unless otherwise noted.
Table 1.
Parameter
FREQUENCY = 900 MHz
Gain (S21)
vs. Frequency
vs. Temperature
Noise Figure 1
Output Third-Order Intercept (OIP3)
Output 1 dB Compression Point (P1dB)
Input Return Loss (S11)
Output Return Loss (S22)
Isolation (S12)
FREQUENCY = 1950 MHz
Gain (S21)
vs. Frequency
vs. Temperature
Noise Figure1
Output Third-Order Intercept (OIP3)
Output 1 dB Compression Point (P1dB)
Input Return Loss (S11)
Output Return Loss (S22)
Isolation (S12)
FREQUENCY = 2600 MHz
Gain (S21)
vs. Frequency
vs. Temperature
Noise Figure1
Output Third-Order Intercept (OIP3)
Output 1 dB Compression Point (P1dB)
Input Return Loss (S11)
Output Return Loss (S22)
Isolation (S12)
FREQUENCY = 3500 MHz
Gain (S21)
vs. Frequency
vs. Temperature
Noise Figure1
Output Third-Order Intercept (OIP3)
Output 1 dB Compression Point (P1dB)
Input Return Loss (S11)
Output Return Loss (S22)
Isolation (S12)
1
Conditions
Min
±50 MHz
−40°C ≤ TA ≤ +85°C
Δf = 1 MHz, POUT = 0 dBm per tone
±30 MHz
−40°C ≤ TA ≤ +85°C
Δf = MHz, POUT = 0 dBm per tone
±100 MHz
−40°C ≤ TA ≤ +85°C
Δf = 1 MHz, POUT = 0 dBm per tone
±100 MHz
−40°C ≤ TA ≤ +85°C
Δf = 1 MHz, POUT = 0 dBm per tone
Noise figure de-embedded to first matching component on input side.
Rev. C | Page 3 of 24
3V
Typ
Max
Min
20.3
±0.28
±0.53
0.8
28.0
17.8
−8.0
−14.7
−23.8
15.4
±0.04
±0.43
1.0
29.0
17.6
−10.5
−25.5
−20.2
5V
Typ
Max
20.8
±0.33
±0.46
0.9
37.0
21.8
−9.0
−15.3
−25.0
14.7
15.8
±0.06
±0.40
1.0
35.0
21.8
−12.5
−25.5
−21.0
Unit
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
17.0
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
12.4
±0.35
±0.46
0.9
30.5
17.1
−7.1
−14.1
−20.0
12.8
±0.35
±0.45
1.0
35.5
21.5
−7.7
−13.5
−20.5
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
10.0
±0.56
±0.66
1.0
31.0
17.0
−18.0
−10.5
−17.8
10.3
±0.59
±0.63
1.1
36.0
20.9
−18.3
−11.0
−18.1
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
ADL5521
Data Sheet
DC SPECIFICATIONS
Table 2.
Parameter
Supply Current
vs. Temperature
Conditions
Min
−40°C ≤ TA ≤ +85°C
3V
Typ
30
±4
Max
Min
5V
Typ
60
±7
Max
Unit
mA
mA
DE-EMBEDDED S-PARAMETERS, VPOS = 3 V TO 5 V, RFIN = PORT 1, VPOS = PORT 2, RFOUT = PORT 3
Table 3.
Frequency
(GHz)
0.125
0.25
0.375
0.5
0.625
0.75
0.875
1.0
1.125
1.25
1.375
1.5
1.625
1.75
1.875
2.0
2.125
2.25
2.375
2.5
2.625
2.75
2.875
3.0
3.125
3.25
3.375
3.5
3.625
3.75
3.875
4.0
S11
(dB/Ang)
−3.8/−11.3
−3.8/−24.5
−4.0/−37.1
−4.4/−48.9
−4.7/−60.0
−5.0/−70.2
−5.3/−79.1
−5.5/−86.9
−5.6/−93.3
−5.7/−98.0
−5.7/−102
−5.8/−104
−5.9/−104
−5.8/−104
−5.8/−103
−5.6/−101
−5.5/−99.3
−5.3/−97.2
−5.1/−95.9
−4.9/−94.8
−4.8/−94.4
−4.8/−94.8
−4.9/−95.4
−5.2/−96.9
−5.6/−98.9
−6.1/−102
−6.6/−105
−7.2/−110
−7.7/−115
−8.1/−123
−8.3/−132
−8.2/−140
S12
(dB/Ang)
−34.5/+8.9
−34.4/+26.6
−33.3/+39.6
−32.2/+48.9
−31.2/+55.8
−30.4/+61.3
−29.7/+66.6
−29.0/+71.2
−28.4/+75.6
−27.9/+79.8
−27.3/+84.0
−26.8/+87.8
−26.2/+91.6
−25.7/+94.8
−25.1/+98.2
−24.6/+101
−24.0/+104
−23.6/+106
−23.2/+109
−23.0/+111
−22.9/+114
−23.0/+118
−23.3/+122
−23.8/+127
−24.5/+133
−25.4/+139
−26.4/+144
−27.5/+149
−28.6/+154
−29.4/+158
−30.1/+163
−30.6/+168
S13
(dB/Ang)
−37.2/+51.8
−35.0/+50.5
−33.3/+54.2
−31.9/+57.7
−30.7/+60.2
−29.7/+61.9
−28.9/+63.5
−28.2/+64.7
−27.6/+65.6
−27.2/+66.9
−26.8/+68.0
−26.5/+69.4
−26.3/+71.5
−26.2/+73.9
−26.0/+76.8
−26.0/+80.1
−25.9/+85.1
−25.7/+91.0
−25.3/+96.7
−24.6/+103
−23.8/+108
−22.8/+111
−21.8/+114
−20.9/+114
−20.0/+114
−19.2/+114
−18.6/+112
−18.0/+111
−17.6/+109
−17.3/+106
−17.0/+103
−16.9/+99.8
S21
(dB/Ang)
+21.5/+161
+20.2/+158
+19.5/+154
+18.7/+150
+18.0/+146
+17.2/+143
+16.4/+141
+15.7/+140
+14.9/+138
+14.3/+138
+13.7/+138
+13.1/+138
+12.6/+138
+12.2/+138
+11.8/+139
+11.5/+139
+11.2/+139
+10.8/+139
+10.4/+139
+9.9/+140
+9.2/+141
+8.4/+143
+7.5/+146
+6.4/+149
+5.1/+153
+3.5/+157
+1.9/+162
+0.27/+165
−1.3/+169
−2.7/+172
−3.9/+175
−4.8/−180
S22
(dB/Ang)
−11.4/−133
−10.4/−153
−9.5/−158
−8.7/−158
−7.9/−155
−7.2/−150
−6.8/−144
−6.4/−137
−6.2/−129
−6.1/−121
−6.3/−113
−6.6/−105
−7.2/−97.2
−8.0/−91.0
−9.2/−86.4
−10.7/−85.8
−12.4/−92.3
−13.4/−110
−12.0/−129
−9.4/−136
−6.9/−135
−4.9/−127
−3.4/−117
−2.2/−104
−1.4/−89.0
−0.89/−73.4
−0.59/−57.8
−0.41/−42.6
−0.23/−27.6
+0.035/−12.8
+0.45/+2.3
+1.0/+18.9
Rev. C | Page 4 of 24
S23
(dB/Ang)
−4.4/+32
−3.5/+19.8
−3.5/+16.5
−3.6/+16.2
−3.8/+17.2
−4.1/+19.1
−4.3/+21.6
−4.6/+24.8
−4.8/+28.0
−4.9/+31.9
−4.9/+35.7
−5.0/+39.4
−5.0/+43.5
−4.9/+47.0
−4.7/+50.5
−4.5/+53.6
−4.4/+56.6
−4.3/+59.1
−4.3/+61.6
−4.4/+64.3
−4.6/+67.3
−5.1/+70.9
−5.7/+75.0
−6.4/+79.7
−7.5/+85.2
−8.8/+90.4
−10.2/+95.5
−11.6/+100
−13.1/+104
−14.3/+109
−15.4/+114
−16.3/+120
S31
(dB/Ang)
+18.8/−155
+19.5/−178
+19.4/+170
+19.0/+161
+18.5/+153
+18.0/+147
+17.3/+141
+16.7/+137
+16.0/+132
+15.3/+129
+14.5/+126
+13.7/+123
+12.9/+122
+12.1/+121
+11.3/+122
+10.5/+123
+9.8/+125
+9.3/+129
+8.9/+132
+8.9/+136
+9.0/+139
+9.3/+140
+9.6/+141
+9.9/+140
+10.2/+138
+10.3/+136
+10.4/+133
+10.3/+130
+10.2/+127
+10.0/+124
+9.7/+119
+9.4/+115
S32
(dB/Ang)
+4.3/+32
−3.4/+20.1
−3.4/+17.0
−3.5/+16.7
−3.7/+17.7
−3.9/+19.5
−4.2/+22.1
−4.4/+25.1
−4.6/+28.3
−4.7/+32.1
−4.8/+35.8
−4.8/+39.4
−4.8/+43.5
−4.7/+47.0
−4.5/+50.5
−4.4/+53.6
−4.2/+56.6
−4.1/+59.1
−4.1/+61.7
−4.2/+64.4
−4.4/+67.4
−4.9/+71.0
−5.5/+75.2
−6.2/+79.8
−7.2/+85.0
−8.5/+90.4
−9.9/+95.4
−11.4/+99.7
−12.7/+104
−14.0/+108
−15.1/+113
−16.0/+120
S33
(dB/Ang)
−4.8/−80.9
−8.0/−111
−9.2/−126
−9.7/−133
−9.7/−137
−9.5/−139
−9.3/−139
−9.0/−138
−8.6/−137
−8.2/−135
−7.9/−133
−7.5/−131
−7.2/−129
−6.9/−127
−6.7/−126
−6.6/−125
−6.5/−125
−6.6/−125
−6.9/−127
−7.4/−128
−8.2/−130
−9.2/−132
−10.5/−133
−12.2/−133
−14.2/−132
−16.2/−126
−177/−116
−18.1/−104
−17.1/−93.5
−15.7/−88.0
−14.0/−87.7
−12.5/−89.2
Data Sheet
ADL5521
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage, VPOS
RF Input Level
RF Input Level (with 8 Ω Series Resistor on VPOS)
Internal Power Dissipation
θJA (Junction to Air)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Rating
5.5 V
7 dBm
20 dBm
500 mW
50°C/W
150°C
−40°C to +85°C
−65°C to +150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. C | Page 5 of 24
ADL5521
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
8 VPOS
VBIAS 1
NIC 3
NIC 4
ADL5521
TOP VIEW
(Not to Scale)
7 RFOUT
6 NIC
5 NIC
NOTES
1. NIC = NO INTERNAL CONNECTION. DO
NOT CONNECT TO THIS PIN.
2. CONNECT THE EXPOSED PAD TO A LOW
IMPEDANCE GROUND PLANE.
06828-002
RFIN 2
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1
2
3, 4, 5, 6
7
8
Mnemonic
VBIAS
RFIN
NC
RFOUT
VPOS
9 (EPAD)
Exposed Pad (EPAD)
Description
Internal DC Bias. This pin should be connected to VPOS through the R1 resistor.
RF Input. This is the input to the LNA.
No Connection. No internal connection.
RF Output.
Supply Voltage. DC bias needs to be bypassed to ground using a low inductance capacitor. This pin is
also used for output matching. See the Basic Connections section.
GND. Connect the exposed pad to a low impedance ground plane.
Rev. C | Page 6 of 24
Data Sheet
ADL5521
TYPICAL PERFORMANCE CHARACTERISTICS
900 MHz, VPOS = 5 V
Matched for optimal noise figure, external matching circuit included.
25
2.0
20
1.8
S21
15
1.6
NOISE FIGURE (dB)
S-PARAMETERS (dB)
10
5
0
–5
S11
–10
S22
–15
1.4
1.2
1.0
0.8
0.6
–20
0.4
S12
–35
600 650 700 750 800 850 900 950 1000 1050 1100 1150 1200
FREQUENCY (MHz)
0
800
18
45
22.0
16
40
10
25
P1dB
20
6
15
4
2
NOISE FIGURE
0
850
860
870
880
890
900
910
920
930
940
27
GAIN
10
5
18.5
+25°C
21
+85°C
18.0
850
860
870
880
890
900
910
920
930
FREQUENCY (MHz)
+25°C
36
1.4
OIP3 (dBm)
+25°C
0.8
32
30
26
–40°C
22
940
960
FREQUENCY (MHz)
980
1000
06828-005
24
0.2
920
+85°C
28
0.4
900
–40°C
34
+85°C
880
19
950
940
Figure 7. Gain, OIP3, and P1dB vs. Temperature
38
860
25
P1dB
–40°C
23
1.6
840
29
20.0
40
820
31
+85°C
42
0.6
33
+25°C
20.5
19.0
0
950
OIP3
–40°C
1.8
1.0
1000
35
–40°C
2.0
1.2
980
37
19.5
FREQUENCY (MHz)
NOISE FIGURE (dB)
960
39
Figure 4. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
0
800
940
21.0
GAIN (dB)
30
OIP3 AND P1dB (dBm)
12
8
920
+85°C
+25°C
21.5
06828-004
NOISE FIGURE AND GAIN (dB)
35
OIP3
900
OIP3 AND P1dB (dBm)
22.5
14
880
06828-007
23.0
50
GAIN
860
Figure 6. Noise Figure vs. Frequency at 25°C, Multiple Devices
55
20
840
FREQUENCY (MHz)
Figure 3. Typical S-Parameters, Log Magnitude
22
820
06828-006
0.2
06828-003
–30
Figure 5. Noise Figure vs. Temperature
20
–4
–2
0
2
4
6
8
10
12
14
16
18
20
POUT PER TONE (dBm)
Figure 8. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 7 of 24
22
06828-008
–25
ADL5521
Data Sheet
1950 MHz, VPOS = 5 V
Matched for optimal noise figure, external matching circuit included.
2.0
S21
15
1.8
10
1.6
5
NOISE FIGURE (dB)
0
S11
–10
–15
S12
–20
S22
0.6
1950
2000
2050
2100
2150
2200
FREQUENCY (MHz)
0
1800 1820 1840 1860 1880 1900 1920 1940 1960 1980 2000
18
GAIN
FREQUENCY (MHz)
45
18.0
40
17.5
30
10
25
P1dB
8
20
6
15
4
10
2
1930
1940
1950
1960
1970
15.5
31
+85°C
29
27
25
P1dB
–40°C
+25°C
14.0
23
13.5
0
1980
21
13.0
1920
+85°C
1930
1940
1950
1960
19
1980
1970
FREQUENCY (MHz)
Figure 13. Gain, OIP3, and P1dB vs. Temperature
40
1.8
38
1.6
–40°C
36
+85°C
OIP3 (dBm)
+25°C
1.0
0.8
30
28
0.4
24
0.2
22
FREQUENCY (MHz)
+25°C
32
26
–40°C
0
1800 1820 1840 1860 1880 1900 1920 1940 1960 1980 2000
+85°C
34
06828-011
NOISE FIGURE (dB)
+25°C
GAIN
15.0
2.0
0.6
33
14.5
FREQUENCY (MHz)
1.2
35
OIP3
–40°C
Figure 10. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
1.4
+85°C
+25°C
16.0
5
NOISE FIGURE
37
16.5
GAIN (dB)
12
39
–40°C
17.0
35
OIP3
OIP3 AND P1dB (dBm)
14
Figure 12. Noise Figure vs. Frequency at 25°C, Multiple Devices
06828-010
16
06828-012
1900
OIP3 AND P1dB (dBm)
1850
0.2
Figure 9. Typical S-Parameters, Log Magnitude
NOISE FIGURE AND GAIN (dB)
0.8
06828-009
–30
0
1920
1.0
0.4
–25
–35
1800
1.2
06828-013
–5
1.4
Figure 11. Noise Figure vs. Temperature
20
–8
–6
–4
–2
0
2
4
6
8
10
12
14
16
18
POUT PER TONE (dBm)
Figure 14. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 8 of 24
20
06828-014
S-PARAMETERS (dB)
20
Data Sheet
ADL5521
2600 MHZ, VPOS = 5 V
Matched for optimal noise figure, external matching circuit included.
20
2.0
15
1.8
S21
1.6
NOISE FIGURE (dB)
5
0
–5
S11
–10
S22
–15
1.2
1.0
0.8
0.6
0.4
S12
2500
2600
2700
2800
2900
FREQUENCY (MHz)
0
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
FREQUENCY (MHz)
Figure 15. Typical S-Parameters, Log Magnitude
Figure 18. Noise Figure vs. Frequency at 25°C, Multiple Devices
45
14
15.0
–40°C
GAIN
30
6
25
P1dB
20
NOISE FIGURE
27
21
+25°C
06828-016
FREQUENCY (MHz)
Figure 19. Gain, OIP3, and P1dB vs. Temperature
40
1.8
38
1.6
36
+85°C
–40°C
OIP3 (dBm)
34
+25°C
1.0
0.8
+25°C
32
30
28
26
–40°C
24
0.2
22
06828-017
0.4
FREQUENCY (MHz)
+85°C
10.0
19
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
2.0
0
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
23
10.5
FREQUENCY (MHz)
0.6
25
P1dB
–40°C
Figure 16. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
1.2
29
+85°C
GAIN
12.0
11.5
10
0
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
1.4
31
+25°C
12.5
15
33
–40°C
11.0
2
NOISE FIGURE (dB)
OIP3
13.0
GAIN (dB)
8
35
+25°C
13.5
OIP3 AND P1dB (dBm)
NOISE FIGURE AND GAIN (dB)
35
4
37
14.0
OIP3
10
39
+85°C
14.5
40
12
06828-018
2400
OIP3 AND P1dB (dBm)
2300
06828-019
2200
0.2
06828-015
–20
–25
2100
1.4
Figure 17. Noise Figure vs. Temperature
20
–6
+85°C
–4
–2
0
2
4
6
8
10
12
14
16
18
POUT PER TONE (dBm)
Figure 20. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 9 of 24
20
06828-020
S-PARAMETERS (dB)
10
ADL5521
Data Sheet
3500 MHz, VPOS = 5 V
Matched for optimal noise figure, external matching circuit included.
15
2.0
S21
1.8
10
1.6
0
–5
S11
–10
–15
1.4
NOISE FIGURE (dB)
1.2
1.0
0.8
0.6
S12
0.4
–20
0.2
S22
3200
3300
3400
3500
3600
3700
FREQUENCY (MHz)
0
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
FREQUENCY (MHz)
Figure 21. Typical S-Parameters, Log Magnitude
12
Figure 24. Noise Figure vs. Frequency at 25°C, Multiple Devices
13.0
45
OIP3
6
30
4
25
P1dB
2
36
+85°C
11.5
–40°C
9.5
9.0
26
P1dB
–40°C
FREQUENCY (MHz)
24
22
+25°C
20
+85°C
7.5
18
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
06828-022
0
15
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
FREQUENCY (MHz)
Figure 22. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
Figure 25. Gain, OIP3, and P1dB vs. Temperature
2.0
40
39
1.8
–40°C
38
+85°C
37
1.4
36
OIP3 (dBm)
+25°C
1.0
0.8
35
+85°C
+25°C
34
33
32
31
–40°C
30
0.4
29
0.2
28
0
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
FREQUENCY (MHz)
06828-023
NOISE FIGURE (dB)
28
8.5
NOISE FIGURE
0.6
30
+85°C
GAIN
34
32
+25°C
10.0
8.0
1.2
OIP3
10.5
20
1.6
+25°C
11.0
GAIN (dB)
35
38
12.0
OIP3 AND P1dB (dBm)
NOISE FIGURE AND GAIN (dB)
40
8
40
–40°C
12.5
GAIN
10
06828-024
3100
OIP3 AND P1dB (dBm)
3000
06828-025
2900
06828-021
–25
2800
Figure 23. Noise Figure vs. Temperature
27
–14 –12 –10 –8 –6 –4 –2
0
2
4
6
8
10 12 14 16
POUT PER TONE (dBm)
Figure 26. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 10 of 24
06828-026
S-PARAMETERS (dB)
5
Data Sheet
ADL5521
900 MHz, VPOS = 3 V
Matched for optimal noise figure, external matching circuit included.
25
2.0
20
10
1.6
5
1.4
0
NOISE FIGURE (dB)
S11
–5
–10
–15
S12
–20
–25
S22
–30
1.0
0.8
0.6
0.4
–35
FREQUENCY (MHz)
0
800
06828-027
–45
600 650 700 750 800 850 900 950 1000 1050 1100 1150 1200
28
14
26
12
24
10
22
20
P1dB
6
18
21.5
0
850
860
870
880
890
900
910
920
930
940
28
OIP3
26
+25°C
20.5
24
–40°C
20.0
19.5
22
20
GAIN +85°C
–40°C
P1dB
18
19.0
12
950
FREQUENCY (MHz)
18.5
850
+85°C
+25°C
860
870
880
890
900
910
920
930
940
16
950
FREQUENCY (MHz)
Figure 31. Gain, OIP3, and P1dB vs. Temperature
2.0
31
30
1.8
–40°C
29
1.6
28
1.4
+25°C
27
1.0
OIP3 (dBm)
+85°C
1.2
+25°C
0.8
26
+85°C
25
24
23
22
0.6
21
–40°C
0.4
20
0.2
19
820
840
860
880
900
920
940
960
FREQUENCY (MHz)
980
1000
06828-029
NOISE FIGURE (dB)
1000
+85°C
+25°C
Figure 28. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
0
800
980
30
21.0
14
NOISE FIGURE
960
32
22.0
06828-028
2
940
–40°C
16
4
920
OIP3 AND P1dB (dBm)
30
8
900
06828-031
18
OIP3
880
22.5
GAIN (dB)
32
OIP3 AND P1dB (dBm)
20
16
860
Figure 30. Noise Figure vs. Frequency at 25°C, Multiple Devices
34
GAIN
840
FREQUENCY (MHz)
Figure 27. Typical S-Parameters, Log Magnitude
22
820
06828-030
0.2
–40
NOISE FIGURE AND GAIN (dB)
1.2
Figure 29. Noise Figure vs. Temperature
18
–4
–2
0
2
4
6
8
10
12
14
16
18
POUT PER TONE (dBm)
Figure 32. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 11 of 24
20
06828-032
S-PARAMETERS (dB)
1.8
S21
15
ADL5521
Data Sheet
1950 MHz, VPOS = 3 V
Matched for optimal noise figure, external matching circuit included.
20
2.0
S21
15
1.8
1.6
NOISE FIGURE (dB)
5
0
–5
S11
–10
–15
S12
–20
S22
0.8
0.6
1950
2000
2050
2100
2150
2200
FREQUENCY (MHz)
0
1800 1820 1840 1960 1980 1900 1920 1940 1960 1980 2000
16
FREQUENCY (MHz)
Figure 36. Noise Figure vs. Frequency at 25°C, Multiple Devices
–40°C
30
17.0
28
16.5
26
8
24
6
22
4
20
1950
24
15.5
+25°C
15.0
1960
1970
16
1980
18
13.5
1920
1930
1940
1950
1960
16
1980
1970
FREQUENCY (MHz)
32
31
1.8
–40°C
20
1.6
29
+85°C
28
+25°C
OIP3 (dBm)
27
+25°C
1.0
0.8
+85°C
26
25
24
23
0.6
22
–40°C
21
20
0.2
FREQUENCY (MHz)
Figure 35. Noise Figure vs. Temperature
18
–8
–6
–4
–2
0
2
4
6
8
10
12
14
16
POUT PER TONE (dBm)
Figure 38. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 12 of 24
18
06828-038
19
0
1800 1820 1840 1860 1880 1900 1920 1940 1960 1980 2000
06828-035
NOISE FIGURE (dB)
+85°C
+25°C
Figure 37. Gain, OIP3, and P1dB vs. Temperature
2.0
0.4
20
P1dB
14.0
FREQUENCY (MHz)
1.2
22
+85°C
GAIN
Figure 34. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
1.4
26
–40°C
14.5
06828-034
1940
16.0
18
NOISE FIGURE
1930
28
OIP3
+85°C
–40°C
P1dB
2
30
+25°C
GAIN (dB)
10
OIP3 AND P1dB (dBm)
OIP3
12
32
17.5
32
GAIN
14
06828-036
1900
OIP3 AND P1dB (dBm)
1850
0.2
Figure 33. Typical S-Parameters, Log Magnitude
NOISE FIGURE AND GAIN (dB)
1.0
06828-037
–30
0
1920
1.2
0.4
–25
–35
1800
1.4
06828-033
S-PARAMETERS (dB)
10
Data Sheet
ADL5521
2600 MHZ, VPOS = 3 V
Matched for optimal noise figure, external matching circuit included.
20
2.0
1.8
S21
15
1.6
NOISE FIGURE (dB)
5
0
–5
S11
–10
S22
–15
2600
2700
2800
2900
0
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
FREQUENCY (MHz)
Figure 42. Noise Figure vs. Frequency at 25°C, Multiple Devices
–40°C
32
30
14
28
12
26
10
24
8
22
6
20
P1dB
NOISE FIGURE
32
14.0
13.5
+25°C
12.5
12.0
GAIN
20
+25°C
P1dB
–40°C
18
+85°C
06828-040
16
10.0
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
FREQUENCY (MHz)
Figure 43. Gain, OIP3, and P1dB vs. Temperature
2.0
1.8
1.6
+85°C
OIP3 (dBm)
1.2
+25°C
0.8
0.6
–40°C
0.4
0.2
06828-041
NOISE FIGURE (dB)
24
22
10.5
16
FREQUENCY (MHz)
FREQUENCY (MHz)
26
+25°C
+85°C
11.0
18
0
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
28
–40°C
Figure 40. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
1.0
OIP3
11.5
0
14
2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700
1.4
30
+85°C
13.0
GAIN (dB)
16
GAIN
34
14.5
34
OIP3
06828-042
2500
OIP3 AND P1dB (dBm)
2400
OIP3 AND P1dB (dBm)
NOISE FIGURE AND GAIN (dB)
0.6
06828-043
2300
20
2
0.8
06828-039
2200
FREQUENCY (MHz)
4
1.0
0.2
Figure 39. Typical S-Parameters, Log Magnitude
18
1.2
0.4
S12
–20
–25
2100
1.4
Figure 41. Noise Figure vs. Temperature
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
–6
–40°C
+85°C
–4
–2
0
+25°C
2
4
6
8
10
12
14
16
POUT PER TONE (dBm)
Figure 44. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 13 of 24
18
06828-044
S-PARAMETERS (dB)
10
ADL5521
Data Sheet
3500 MHZ, VPOS = 3 V
Matched for optimal noise figure, external matching circuit included.
15
2.0
S21
1.8
10
1.6
0
–5
1.4
NOISE FIGURE (dB)
S-PARAMETERS (dB)
5
S11
–10
1.2
1.0
0.8
0.6
–15
0.4
S12
–20
0.2
S22
3200
3300
3400
3500
3600
3700
FREQUENCY (MHz)
0
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
FREQUENCY (MHz)
Figure 45. Typical S-Parameters, Log Magnitude
34
13.0
32
12.5
16
30
12.0
14
28
11.5
GAIN
26
10
24
8
22
6
20
33
29
11.0
10.5
18
9.0
2
NOISE FIGURE
16
8.5
21
P1dB
19
–40°C
17
+85°C
FREQUENCY (MHz)
Figure 46. Noise Figure, Gain, OIP3, and P1dB vs. Frequency
Figure 49. Gain, OIP3, and P1dB vs. Temperature
2.0
35
34
1.8
–40°C
33
+85°C
32
+25°C
31
1.4
30
OIP3 (dBm)
+25°C
1.0
–40°C
29
+85°C
28
27
26
0.6
25
0.4
24
23
0.2
22
0
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
FREQUENCY (MHz)
06828-047
NOISE FIGURE (dB)
23
15
8.0
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
06828-046
FREQUENCY (MHz)
27
25
+85°C
+25°C
0
14
3400 3420 3440 3460 3480 3500 3520 3540 3560 3580 3600
0.8
–40°C
9.5
P1dB
1.2
OIP3
+85°C
+25°C
10.0
4
1.6
31
+25°C
Figure 47. Noise Figure vs. Temperature
21
–14 –12 –10 –8 –6 –4 –2
0
2
4
6
8
10 12 14 16
POUT PER TONE (dBm)
Figure 50. OIP3 vs. Output Power (POUT) and Temperature
Rev. C | Page 14 of 24
06828-050
12
35
–40°C
GAIN
GAIN (dB)
OIP3
18
NOISE FIGURE AND GAIN (dB)
Figure 48. Noise Figure vs. Frequency at 25°C, Multiple Devices
OIP3 AND P1dB (dBm)
20
06828-048
3100
OIP3 AND P1dB (dBm)
3000
06828-049
2900
06828-045
–25
2800
Data Sheet
ADL5521
DC CHARACTERISTICS
75
200
70
180
160
VPOS = 5V
SUPPLY CURRENT (mA)
60
55
50
45
40
35
VPOS = 3V
30
140
+25°C
–40°C
+85°C
+25°C
–40°C
+85°C
120
100
80
60
40
20
–40 –30 –20 –10
0
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
90
Figure 51. Supply Current vs. Temperature, 3 V and 5 V
0
–6
–4
–2
0
2
4
6
8
10
12
14
16
18
20
22
POUT (dBm)
Figure 52. Supply Current vs. POUT and Temperature, 3 V and 5 V
Rev. C | Page 15 of 24
06828-100
20
25
06828-051
SUPPLY CURRENT (mA)
65
5V,
5V,
5V,
3V,
3V,
3V,
ADL5521
Data Sheet
BASIC CONNECTIONS
VPOS
The basic connections for operating the ADL5521 are shown in
Figure 53. Capacitor C5 provides the power supply decoupling.
Inductor L1 (Coilcraft 0403HQ or 0402HP series) and Capacitor C1
(Murata High-Q GJM series or equivalent) provide the input
impedance matching, and the output impedance matching is
provided by either L2 or C3. Resistor R1 is used to set the supply
current, and the value of R1 is indirectly proportional to the
supply current (that is, increasing the value of R1 reduces the
supply current). The recommended external components for
the selected frequencies are listed in Table 7.
L2
W1
C5
100nF
TR1
TR2
R1
C3
ADL5521
VPOS 8
1 VBIAS
RFIN
RFOUT
L1
2 RFIN
RFOUT 7
C1
3 NIC
NIC 6
4 NIC
NIC 5
Z1
NIC = NO INTERNAL CONNECTION. DO NOT CONNECT TO THIS PIN.
06828-052
For 5 V applications where the input power exceeds the input
compression point of approximately 7 dBm, a series resistor
(R2) of at least 8 Ω, with a high power rating (0.2 W minimum),
should be inserted on the VPOS line to protect the device from
the input power overdrive. In this case, reduce resistor R1 from
1.3 kΩ to 600 Ω to keep the supply current at around 60 mA.
With R2 = 8.2 Ω (Susumu RP1608S-8R2-F) and R1 = 600 Ω, the
gain and noise figure for the ADL5521 are mostly unchanged.
Table 6 lists OIP3 and P1dB at selected frequencies. For 3 V
power supply applications, a series resistor is not necessary for
the expected input overdrive powers up to 20 dBm.
GND
R2
Figure 53. ADL5521 Basic Connections
Table 6. ADL5521 Performance at VPOS = 5 V, 25°C with
R2 = 8.2 Ω and R1 = 600 Ω
Frequency
(MHz)
900
1950
2600
3500
Rev. C | Page 16 of 24
Noise
Figure (dB)
0.9
1.0
1.0
1.1
Gain
(dB)
20.8
15.8
13.0
10.5
P1dB
(dBm)
20.8
21.0
20.6
20.3
OIP3 (dBm)
(POUT = 0 dBm)
34.0
35.0
35.0
36.0
Data Sheet
ADL5521
EVALUATION BOARD
Figure 54 shows the schematic of the ADL5521 evaluation board.
The board is powered by a single supply, and dc bias can be
applied to the board through clip-on leads at VPOS and GND or
through a 2-pin connector, W1.
Figure 56. Evaluation Board Layout (Bottom View)
C5
100nF
TR1
C4
DNP
TR2
C3
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 57 shows the recommended land pattern for ADL5521.
To minimize thermal impedance, the exposed pad on the
package underside is soldered down to a ground plane. If
multiple ground layers exist, they are stitched together using
vias (a minimum of five vias is recommended). Pin 3 to Pin 6
can be left unconnected or can be connected to ground. For
more information on land pattern design and layout, refer to
the AN-772 Application Note, A Design and Manufacturing
Guide for the Lead Frame Chip Scale Package (LFCSP).
ADL5521
1 VBIAS
VPOS 8
RFOUT
L1
2 RFIN
RFOUT 7
C2
0Ω
C1
3 NIC
NIC 6
4 NIC
NIC 5
Z1
NIC = NO INTERNAL CONNECTION. DO NOT CONNECT TO THIS PIN.
06828-152
RFIN
2.03mm
8
1
0.5mm
Figure 54. Evaluation Board Schematic
1.78mm
L2
R1
GND
W1
4
5
06828-055
R2
1.85mm
VPOS
06828-054
The evaluation board comes optimized at 1950 MHz from the
factory, but it can be easily modified to work at any frequency
between 400 MHz and 4 GHz. Table 7 lists the recommended
components at various frequencies.
1.53mm
0.71mm
06828-053
Figure 57. Recommended Land Pattern
Figure 55. Evaluation Board Layout (Top View)
Table 7. Recommended Components and Positions of Matching Components for Basic Connections Tuned for Optimal Noise
Frequency
(MHz)
500
900
1300
1950
2140
2600
3500
C11
(Size
0402)
Open
2.4 pF
2.7 pF
1.6 pF
1.6 pF
0.75 pF
0.5 pF
C2
(Size
0402)
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
C3
(Size
0402)
Open
Open
1.0 nF
1.0 nF
1.0 nF
1.0 nF
1.0 nF
C4
(Size
0402)
Open
Open
Open
Open
Open
Open
Open
C5
(Size
0402)
100 nF
100 nF
100 nF
100 nF
100 nF
100 nF
100 nF
L12
(Size
0403)
9 nH
8.2 nH
3.4 nH
1.0 nH
1.0 nH
1.0 nH
2.4 pF5
L22
(Size
0403)
12 nH
3.4 nH
0Ω
0Ω
0Ω
0Ω
0Ω
1
The Murata High-Q GJM series capacitor is recommended for C1.
Coilcraft High Q 0403HQ or 0402HP inductors are recommended for L1 and L2.
3
If R2 = 8 Ω, reduce R1 to 600 Ω.
4
If R2 = 8 Ω, use a high power resistor (0.2 W rating minimum).
5
Note that at 3500 MHz, a capacitor, not an inductor, is used at L1.
2
Rev. C | Page 17 of 24
R13
(Size
0603)
1.3 kΩ
1.3 kΩ
1.3 kΩ
1.3 kΩ
1.3 kΩ
1.3 kΩ
1.3 kΩ
R24
(Size
0603)
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
TR1
(mm)
0
0
0
2.5 × 0.6
5.0 × 0.6
8.0 × 0.6
7.0 × 0.6
TR2
(mm)
0
0
8.0 × 0.6
5.5 × 0.6
3.0 × 0.6
0
1 × 0.6
C1
Position
C1
C1
C1
C1
C1
C1
C1
C3
Position
N/A
N/A
6
4
2
C3
1
ADL5521
Data Sheet
TUNING THE ADL5521 FOR OPTIMAL NOISE FIGURE
The ADL5521 is a monolithic low noise amplifier (LNA) in a
3 mm × 3 mm LFCSP. The evaluation board, as shipped from
the factory, gives a noise figure of 0.9 dB over a bandwidth of
several hundred megahertz. The specific frequency where optimal
noise is reached depends on the tuning.
The bandwidth of the ADL5521 is 400 MHz to 4 GHz, although
noise figure degrades above 2.5 GHz as the gain begins to roll off.
This section is based on Analog Devices, Inc., lab measurements.
Although there are plots in which the Agilent Advanced Design
System (ADS) environment is used, the data in these plots comes
from Analog Devices lab measurements.
TUNING S22
Tuning of the LNA begins with S22 (output tuning). Tuning of
the LNA output is done by placing reactive components on the
bias line, referred to in the schematic in Figure 54 as VPOS.
On the LNA evaluation board, S22 tuning is achieved by either
the use of an inductor (L2) on the bias line or a shunt capacitor
(C3) on the bias line to ground. Typically, either L2 is required
or C3, but not both.
The slider can be seen in the LNA PCB layout in Figure 58 as
the area near the red arrows to the right of the bias line. With a
0 Ω resistor in place of L2, moving a 1 nF capacitor from the top
to the bottom effectively tunes S22 from 1400 MHz to 3500 MHz.
Table 8 shows the component values and placement required for
S22 tuning from 800 MHz to 3200 MHz. For lower frequencies,
higher values of L2 can be used to tune S22, and for frequencies
from 3.2 GHz to 4.0 GHz, smaller values of capacitors can be
used on the slider.
Table 8. Capacitor and Inductor Tuning and Placement for
LNA S22 Tuning
Frequency (MHz)
800
1400
2000
2400
2800
3200
L2
3.4 nH
0Ω
0Ω
0Ω
0Ω
0Ω
C3
Open
1 nF
1 nF
1 nF
1 nF
1 nF
C3 Placement
N/A
6
4
3
2
1
The evaluation board uses a slider on the bias line to make tuning
for S22 as easy as possible. The slider is an area of ground etch
adjacent to the bias line that is clear of solder mask. The bias
line in this area is also free of solder mask. This allows a capacitor
(C3) to be placed anywhere on the bias line to ground, which
provides easy and accurate tuning for S22.
06828-056
Note that the PCB layout shows two capacitors, C3 and C4.
Typically, only one of these capacitors is needed for good S22
tuning.
Figure 58. PCB Layout for LNA Evaluation Board (Note Slider on Bias Line
with Capacitor Placement for S22 Tuning Noted by Arrows)
Rev. C | Page 18 of 24
Data Sheet
ADL5521
TUNING THE LNA INPUT FOR OPTIMAL GAIN
LNAs are generally tuned for either gain or noise optimization,
or some trade-off between the two. One figure of merit of an LNA
is how much trade-off must be made for one of these
parameters to optimize the other. With the ADL5521, an S11 of
6 dB to 8 dB at the input to the matching network can still be
achieved typically when optimizing for noise.
For optimal gain matching, the goal is to use a matching network
that converts the input impedance of the LNA to the characteristic
impedance of the system, typically 50 Ω. Correct tuning for gain
matching results in a conjugate match. That is, the impedance of
the matching network at the LNA input, looking back toward
the generator, is always the complex conjugate of the LNA input
impedance when matched for gain.
Once S11*, the complex conjugate of S11, is known, a matching
circuit must be found that transforms the 50 Ω system impedance
into the conjugate S11 impedance. To do this, the designer starts at
the origin of the Smith Chart circle and finds components that
move the 50 Ω match to S11*.
The related impedances for gain matching are shown in Figure 59.
A Smith Chart representation of the conjugate match is shown
in Figure 60.
S11
MATCHING
NETWORK
50Ω
LNA
S11*
06828-057
50Ω
Figure 59. Matching LNA Input for Gain
TUNING THE LNA INPUT FOR OPTIMAL NOISE
FIGURE
The point in the Smith Chart at which matching for optimal
noise occurs is typically referred to as gamma optimal or ΓOPT.
Typically, it is significantly different from the gain matching
point; finding ΓOPT is not as obvious as the gain match. ΓOPT is a
function of the semiconductor structure and characteristics of
the LNA. The fabrication facility that produces the LNA typically
has this information. ΓOPT can also be determined by doing
source pull testing in the lab.
Noise matching for the ADL5521 is very easy because the area
of the Smith Chart where the noise figure is optimal or near
optimal is not confined to a narrow area around ΓOPT. This is
very advantageous because it means that component variations
play a smaller part in the board-to-board variation of noise figure.
The matching area for optimal noise for the ADL5521 is shown
in Figure 61. Note that textbooks usually define noise circles as
a conjugate match. However, for the purpose of this data sheet,
the circle is a direct match. To find the correct matching circuit,
the designer must start with the S11 of the LNA and select
components that move the S11 to within this circle.
An important aspect of the overall ADL5521 ease of tuning is
that as long as S22 is matched for a particular frequency, the
noise matching area remains very consistent in its placement for
that frequency. If S22 is matched, take the measured S11 and
move it into the red circle shown in Figure 61 for optimal noise
matching.
1
0.5
S11*
0.2
5
10
0.2
0.5
1
5
10
10
S11
06828-058
0.2
5
1
Figure 61. Area of Optimal Noise Matching for ADL5521
Rev. C | Page 19 of 24
06828-059
0.5
Figure 60. Smith Chart Representation of Conjugate Match
ADL5521
Data Sheet
S11 OF THE LNA WITH S22 MATCHED
A shunt capacitor can then be added to move the match along a
constant admittance line, down and to the right, directly into
the center of the noise circle given in Figure 61.
The solution for the structure of the match for the examples
in Figure 63 and Figure 64 is a series L to the input of the LNA
and a shunt capacitor at the generator end of this inductor. The
recommended components for matching at various frequencies
are shown in Table 7.
An example of the effect of the series L, shunt C match, based
on the 800 MHz example, is given in Figure 62. This example
uses the output from the Agilent ADS Smith Chart tool.
M1
FREQUENCY 400MHz
S11 = 0.877/–44.639
IMPEDANCE = Z0 × (0.443 – j2.365)
M2
FREQUENCY 2GHz
S11 = 0.615/–170.569
IMPEDANCE = Z0 × (0.240 – j0.078)
M2
M1
06828-061
To determine the correct matching circuit for optimal noise,
look at the results of S11 for the various frequencies at which
S22 was tuned earlier in the Tuning S22 section. Once S11
is determined for a particular frequency, find the matching
components that provided that match. Figure 63 and Figure 64
show S11 for the various frequencies. Again, these measurements
are all based on S22 being matched at that particular frequency.
Note that, for the examples shown in Figure 63 and Figure 64, S11
is either in the lower left quadrant of the Smith Chart or slightly
into the upper left. To move the impedance in the given noise
circle, a series L component at the LNA input is required. The L
values in the examples differ, but a correct L value moves the match
along the constant R circle up into the upper left quadrant of the
Smith Chart.
FREQUENCY (400MHz TO 4GHz)
Figure 63. S11 of ADL5521 with S22 Matched at 2 GHz
M1
FREQUENCY 400MHz
S11 = 0.864/–40.186
IMPEDANCE = Z0 × (0.594 – j2.615)
M2
M2
FREQUENCY 3.2GHz
S11 = 0.595/163.164
IMPEDANCE = Z0 × (0.259 + j0.138)
FREQUENCY (400MHz TO 4GHz)
06828-060
Figure 64. S11 of ADL5521 with S22 Matched at 3.2 GHz
Figure 62. Example of Series L, Shunt C Matching Network for ΓOPT
Rev. C | Page 20 of 24
06828-062
M1
Data Sheet
ADL5521
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
1.84
1.74
1.64
0.50
BSC
8
5
PIN 1 INDEX
AREA
1.55
1.45
1.35
EXPOSED
PAD
0.50
0.40
0.30
TOP VIEW
0.80
0.75
0.70
SIDE VIEW
0.30
0.25
0.20
PKG-003886
SEATING
PLANE
4
BOTTOM VIEW
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.203 REF
1
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-229-WEED-4
02-10-2017-A
3.10
3.00 SQ
2.90
Figure 65. 8-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-8-13)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADL5521ACPZ-R7
ADL5521-EVALZ
1
Temperature Range
−40°C to +85°C
Package Description
8-Lead LFCSP, 7” Tape and Reel
Evaluation Board
Z = RoHS Compliant Part.
Rev. C | Page 21 of 24
Package Option
CP-8-13
Branding
Q1G
ADL5521
Data Sheet
NOTES
Rev. C | Page 22 of 24
Data Sheet
ADL5521
NOTES
Rev. C | Page 23 of 24
ADL5521
Data Sheet
NOTES
©2008–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06828-0-8/17(C)
Rev. C | Page 24 of 24