IS61C256AH 32K x 8 HIGH-SPEED CMOS STATIC RAM FEATURES • High-speed access time: 10, 12, 15, 20, 25 ns • Low active power: 400 mW (typical) • Low standby power — 250 µW (typical) CMOS standby — 55 mW (typical) TTL standby • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 5V power supply ISSI ® MAY 1999 DESCRIPTION The ISSI IS61C256AH is a very high-speed, low power, 32,768 word by 8-bit static RAMs. They are fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 10 ns maximum. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable (CE) input and an active LOW Output Enable (OE) input. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS61C256AH is pin compatible with other 32K x 8 SRAMs and are available in 28-pin PDIP, SOJ, and TSOP (Type I) packages. FUNCTIONAL BLOCK DIAGRAM A0-A14 DECODER 32K X 8 MEMORY ARRAY I/O DATA CIRCUIT COLUMN I/O VCC GND I/O0-I/O7 CE OE CONTROL CIRCUIT WE ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc. Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99 1 ISSI IS61C256AH PIN CONFIGURATION PIN CONFIGURATION 28-Pin DIP and SOJ 28-Pin TSOP A14 1 28 VCC A12 2 27 WE A7 3 26 A13 A6 4 25 A8 A5 5 24 A9 A4 6 23 A11 A3 7 22 OE A2 8 21 A10 A1 9 20 CE A0 10 19 I/O7 I/O0 11 18 I/O6 I/O1 12 17 I/O5 I/O2 13 16 I/O4 GND 14 15 I/O3 PIN DESCRIPTIONS A0-A14 CE OE WE OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 WE Mode Chip Enable Input Not Selected X (Power-down) Output Disabled H Read H Write L Output Enable Input Write Enable Input Bidirectional Ports Vcc Power GND Ground A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 TRUTH TABLE Address Inputs I/O0-I/O7 21 20 19 18 17 16 15 14 13 12 11 10 9 8 22 23 24 25 26 27 28 1 2 3 4 5 6 7 ® CE OE I/O Operation Vcc Current H X High-Z ISB1, ISB2 L L L H L X High-Z DOUT DIN ICC ICC ICC ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TBIAS TSTG PT IOUT Parameter Terminal Voltage with Respect to GND Temperature Under Bias Storage Temperature Power Dissipation DC Output Current (LOW) Value –0.5 to +7.0 –55 to +125 –65 to +150 1.5 20 Unit V °C °C W mA Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99 ISSI IS61C256AH ® OPERATING RANGE Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C Speed -10, -12 -15, -20, -25 -12 -15, -20, -25 VCC 5V ± 5% 5V ± 10% 5V ± 5% 5V ± 10% DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol Parameter Test Conditions Min. Max. Unit VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 — V VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA — 0.4 V VIH Input HIGH Voltage 2.2 VCC + 0.5 V VIL Input LOW Voltage(1) –0.5 0.8 V ILI Input Leakage GND ≤ VIN ≤ VCC Com. Ind. –5 –10 5 10 µA ILO Output Leakage GND ≤ VOUT ≤ VCC, Outputs Disabled Com. Ind. –5 –10 5 10 µA Note: 1. VIL = –3.0V for pulse width less than 10 ns. POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Test Conditions ICC Vcc Dynamic Operating Supply Current VCC = Max., CE = VIL IOUT = 0 mA, f = fMAX ISB1 TTL Standby Current (TTL Inputs) ISB2 CMOS Standby Current (CMOS Inputs) -10 -12 -15 -20 -25 Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Com. Ind. — — 165 — — — 155 165 — — 145 155 — — 135 145 — — 125 135 mA VCC = Max., VIN = VIH or VIL CE ≥ VIH, f = 0 Com. Ind. — — 25 — — — 25 30 — — 25 30 — — 25 30 — — 25 30 mA VCC = Max., CE ≥ VCC – 0.2V, VIN ≥ VCC – 0.2V, or VIN ≤ 0.2V, f = 0 Com. Ind. — — 2 — — — 2 10 — — 2 10 — — 2 10 — — 2 10 mA Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. CAPACITANCE(1,2) Symbol Parameter CIN Input Capacitance COUT Output Capacitance Conditions Max. Unit VIN = 0V 8 pF VOUT = 0V 10 pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5.0V. Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99 3 ISSI IS61C256AH ® READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol -10 Min. Max Parameter -12 Min. Max. -15 Min. Max. -20 Min. Max. -25 Min. Max. Unit tRC Read Cycle Time 10 — 12 — 15 — 20 — 25 — ns tAA Address Access Time — 10 — 12 — 15 — 20 — 25 ns tOHA Output Hold Time 2 — 2 — 2 — 2 — 2 — ns — 10 — 12 — 15 — 20 — 25 ns — 5 — 5 — 7 — 8 — 9 ns 0 — 0 — 0 — 0 — 0 — ns — 5 — 6 — 7 — 9 — 10 ns 2 — 3 — 3 — 3 — 3 — ns — 5 — 7 — 8 — 9 — 10 ns 0 — 0 — 0 — 0 — 0 — ns — 10 — 12 — 15 — 18 — 20 ns tACE tDOE tLZOE (2) tHZOE (2) tLZCE (2) tHZCE(2) tPU (3) tPD (3) CE Access Time OE Access Time OE to Low-Z Output OE to High-Z Output CE to Low-Z Output CE to High-Z Output CE to Power-Up CE to Power-Down Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested. AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1 and 2 AC TEST LOADS 480 Ω 480 Ω 5V 5V OUTPUT OUTPUT 30 pF Including jig and scope Figure 1 4 255 Ω 5 pF Including jig and scope 255 Ω Figure 2 Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99 ISSI IS61C256AH ® AC WAVEFORMS READ CYCLE NO. 1(1,2) t RC ADDRESS t AA t OHA t OHA DOUT DATA VALID PREVIOUS DATA VALID READ1.eps READ CYCLE NO. 2(1,3) t RC ADDRESS t AA t OHA OE t HZOE t DOE t LZOE CE t ACE t HZCE t LZCE DOUT HIGH-Z DATA VALID CE_RD2.eps Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions. Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99 5 ISSI IS61C256AH ® WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range) -10 Min. Max Symbol Parameter -12 Min. Max. -15 Min. Max. -20 Min. Max. -25 Min. Max. Unit tWC Write Cycle Time 10 — 12 — 15 — 20 — 25 — ns tSCE CE to Write End 9 — 10 — 10 — 13 — 15 — ns tAW Address Setup Time to Write End 9 — 10 — 12 — 15 — 20 — ns tHA Address Hold from Write End 0 — 0 — 0 — 0 — 0 — ns tSA Address Setup Time 0 — 0 — 0 — 0 — 0 — ns 8 — 8 — 10 — 13 — 15 — ns tPWE2 WE Pulse Width (OE LOW) WE Pulse Width (OE HIGH) 6.5 — 7 — 8 — 10 — 12 — ns tSD Data Setup to Write End 7 — 7 — 9 — 10 — 12 — ns Data Hold from Write End 0 — 0 — 0 — 0 — 0 — ns — 6 — 6 — 7 — 8 — 10 ns 0 — 0 — 0 — 0 — 0 — ns tPWE1 tHD tHZWE (2) tLZWE(2) WE LOW to High-Z Output WE HIGH to Low-Z Output Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. AC WAVEFORMS WRITE CYCLE NO. 1 (WE Controlled)(1,2) t WC VALID ADDRESS ADDRESS t SA t SCE t HA CE t AW t PWE1 t PWE2 WE t HZWE DOUT DATA UNDEFINED t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE_WR1.eps 6 Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99 ISSI IS61C256AH ® WRITE CYCLE NO. 2 (OE is HIGH During Write Cycle) (1,2) t WC ADDRESS VALID ADDRESS t HA OE CE LOW t AW t PWE1 WE t SA DOUT t HZWE t LZWE HIGH-Z DATA UNDEFINED t SD t HD DATAIN VALID DIN CE_WR2.eps WRITE CYCLE NO. 3 (OE is LOW During Write Cycle) (1) t WC ADDRESS VALID ADDRESS OE LOW CE LOW t HA t AW t PWE2 WE t SA DOUT t HZWE DATA UNDEFINED t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE_WR3.eps Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE ≥ VIH. Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99 7 ISSI IS61C256AH ORDERING INFORMATION: IS61C256AH Commercial Range: 0°C to +70°C ORDERING INFORMATION: IS61C256AH Industrial Range: –40°C to +85°C Order Part Number Package 12 IS61C256AH-12NI IS61C256AH-12JI IS61C256AH-12TI 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) 15 IS61C256AH-15NI IS61C256AH-15JI IS61C256AH-15TI 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) IS61C256AH-15N IS61C256AH-15J IS61C256AH-15T 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) 20 IS61C256AH-20NI IS61C256AH-20JI IS61C256AH-20TI 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) 20 IS61C256AH-20N IS61C256AH-20J IS61C256AH-20T 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) 25 IS61C256AH-25NI IS61C256AH-25JI IS61C256AH-25TI 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) 25 IS61C256AH-25N IS61C256AH-25J IS61C256AH-25T 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) Speed (ns) Order Part Number Package 10 IS61C256AH-10N IS61C256AH-10J IS61C256AH-10T 300-mil Plastic DIP 300-mil Plastic SOJ TSOP (Type 1) 12 IS61C256AH-12N IS61C256AH-12J IS61C256AH-12T 15 ® Speed (ns) ISSI ® Integrated Silicon Solution, Inc. 2231 Lawson Lane Santa Clara, CA 95054 Tel: 1-800-379-4774 Fax: (408) 588-0806 E-mail: [email protected] www.issi.com 8 Integrated Silicon Solution, Inc. — 1-800-379-4774 SR020-1O 05/24/99