Fairchild FQD5N20L 200v logic n-channel mosfet Datasheet

QFET
®
FQD5N20L / FQU5N20L
200V LOGIC N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state
resistance,
provide
superior
switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for high efficiency switching DC/DC converters,
switch mode power supplies, and motor control.
•
•
•
•
•
•
•
3.8A, 200V, RDS(on) = 1.2Ω @VGS = 10 V
Low gate charge ( typical 4.8 nC)
Low Crss ( typical 6.0 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Low level gate drive requirement allowing direct
operation from logic drivers
• RoHS Compliant
D
!
D
"
! "
"
"
G!
G
S
I-PAK
D-PAK
FQD Series
G D S
FQU Series
!
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQD5N20L / FQU5N20L
200
Units
V
3.8
A
2.4
A
15.2
A
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
IAR
EAR
dv/dt
PD
- Pulsed
(Note 1)
± 20
V
(Note 2)
60
mJ
Avalanche Current
(Note 1)
3.8
A
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
3.7
5.5
2.5
mJ
V/ns
W
37
0.29
-55 to +150
W
W/°C
°C
300
°C
(Note 3)
Power Dissipation (TC = 25°C)
TJ, TSTG
TL
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
Max
3.4
Units
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient *
--
50
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2008 Fairchild Semiconductor International
Rev. A3, October 2008
FQD5N20L / FQU5N20L
October 2008
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
200
--
--
V
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
0.18
IDSS
IGSSF
IGSSR
VDS = 200 V, VGS = 0 V
--
--
1
µA
VDS = 160 V, TC = 125°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 20 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -20 V, VDS = 0 V
--
--
-100
nA
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
1.0
--
2.0
V
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 1.9 A
VGS = 5 V, ID = 1.9 A
--
0.94
0.98
1.2
1.25
Ω
Forward Transconductance
VDS = 30 V, ID = 1.9 A
--
3.35
--
S
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
250
325
pF
--
40
50
pF
--
6
8
pF
ns
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
RDS(on)
gFS
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 100 V, ID = 4.5 A,
RG = 25 Ω
VDS = 160 V, ID = 4.5 A,
VGS = 5 V
(Note 4, 5)
(Note 4, 5)
--
9
25
--
90
190
ns
--
15
40
ns
--
50
110
ns
--
4.8
6.2
nC
--
1.2
--
nC
--
2.4
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
3.8
A
ISM
--
--
15.2
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 3.8 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
--
95
--
ns
Qrr
Reverse Recovery Charge
--
0.3
--
µC
VGS = 0 V, IS = 4.5 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 6.2mH, IAS = 3.8A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 4.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2008 Fairchild Semiconductor International
Rev. A3, October 2008
FQD5N20L / FQU5N20L
Electrical Characteristics
FQD5N20L / FQU5N20L
Typical Characteristics
ID, Drain Current [A]
Top :
Bottom :
VGS
10 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
3.0 V
1
10
ID , Drain Current [A]
1
10
0
10
150℃
0
10
25℃
-55℃
※ Notes :
1. VDS = 30V
2. 250μs Pulse Test
※ Notes :
1. 250μs Pulse Test
2. TC = 25℃
-1
10
-1
-1
0
10
10
1
10
0
10
2
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
8
1
IDR , Reverse Drain Current [A]
10
RDS(ON) [Ω ],
Drain-Source On-Resistance
6
VGS = 5V
VGS = 10V
4
2
0
10
150℃
-1
0
0
2
4
6
8
10
10
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
500
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
10
300
Ciss
200
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
Coss
100
Crss
0
-1
10
VGS, Gate-Source Voltage [V]
400
Capacitance [pF]
※ Notes :
1. VGS = 0V
2. 250μs Pulse Test
25℃
※ Note : TJ = 25℃
VDS = 40V
8
VDS = 100V
VDS = 160V
6
4
2
※ Note : ID = 4.5 A
0
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2008 Fairchild Semiconductor International
0
2
4
6
8
10
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A3, October 2008
FQD5N20L / FQU5N20L
Typical Characteristics
(Continued)
1.2
3.0
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μA
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 2.25 A
0.5
0.0
-100
200
-50
0
50
100
150
200
o
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
4
Operation in This Area
is Limited by R DS(on)
3
1
100 µs
ID, Drain Current [A]
ID, Drain Current [A]
10
1 ms
10 ms
DC
0
10
※ Notes :
2
1
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10
0
1
10
0
25
2
10
10
50
( t) , T h e r m a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
100
125
150
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
10
0
※ N o te s :
1 . Z θ J C( t) = 3 .4 ℃ /W M a x .
2 . D u ty F a c to r , D = t1 /t2
3 . T JM - T C = P D M * Z θ J C( t)
0 .2
0 .1
0 .0 5
PDM
0 .0 2
10
-1
0 .0 1
10
-5
t1
s in g le p u ls e
Z
θ JC
75
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]
10
-4
10
t2
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2008 Fairchild Semiconductor International
Rev. A3, October 2008
FQD5N20L / FQU5N20L
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
5V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
5V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2008 Fairchild Semiconductor International
ID (t)
VDS (t)
VDD
tp
Time
Rev. A3, October 2008
FQD5N20L / FQU5N20L
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2008 Fairchild Semiconductor International
Rev. A3, October 2008
FQD5N20L / FQU5N20L
Mechanical Dimensions
D - PAK
Dimensions in Millimeters
©2008 Fairchild Semiconductor International
Rev. A3, October 2008
FQD5N20L / FQU5N20L
Mechanical Dimensions
I - PAK
Dimensions in Millimeters
©2008 Fairchild Semiconductor International
Rev. A3, October 2008
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FQD5N20L / FQU5N20L
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
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Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I37
FQD5N20L / FQU5N20L Rev. A3
www.fairchildsemi.com
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