Sony CXA3691AEN High-speed buffer amplifier for ccd image sensor Datasheet

High-speed Buffer Amplifier for CCD Image Sensor
CXA3691AEN
Description
The CXA3691AEN is a high-speed buffer amplifier IC.
(Applications: CCD image sensor output buffers, Digital still cameras, Camcorders, Other general buffers)
Features
‹ Power consumption: 24mW (typ.)
(IDRV = 50μA (220kΩ when VCC = 15V), ISF pin connected to GND, during no signal)
‹ Push-pull output
‹ High-speed response: 500V/μs (IDRV = 50μA (220kΩ when VCC = 15V), CL = 20pF)
‹ Internal sink current mode for CCD with open source output
(Settable by external resistance RISF)
‹ Enables to set the responsibility by changing the drive current by an external resistor
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings
(Ta = 25°C)
Š Supply voltage
VCC
Š Supply voltage
IN
Š Storage temperature
Tstg
Š Allowable power dissipation
PD
16
V
GND – 0.3 to VCC + 0.3
V
–65 to +150
°C
0.28
W
(when mounted on a two-layer board; 50mm × 50mm, t = 1.6mm)
Recommended Operating Conditions
Š Supply voltage
VCC
9.0 to 15.5
V
Š Operating temperature
Ta
–20 to +75
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license
by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating
the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E07712A82
CXA3691AEN
Block Diagram and Pin Configuration
(Top View)
ISF
VCC
IDRV
6
5
4
1
2
3
IN
GND
OUT
Pin Description and I/O Pin Equivalent Circuit
Pin
No.
2
5
Symbol
I/O
GND
VCC
—
—
Standard
voltage level
0V
15V
Equivalent circuit
—
—
Description
GND.
Supply voltage input.
VCC
10 ×
IDRV
2k
1
IN
I
CCD
output voltage
Input.
1
58 ×
IISF
2k
10 ×
IDRV
GND
External resistor connection for
setting the sink current for CCD
with open source output.
Connect an external resistor
between this pin and VCC (Pin 5).
Connect this pin to GND (Pin 2)
when not using this function.
* The minimum value of the
external resistance should be
100kΩ (when VCC = 15V).
VCC
6
ISF
I
—
6
30k
20k
GND
VCC
50
3
OUT
O
≈IN
3
Output.
50
GND
VCC
4
IDRV
I
—
4
30k
20k
GND
-2-
External resistor connection for
setting the drive current.
Connect an external resistor
between this pin and VCC (Pin5).
* The minimum value of the
external resistance should be
100kΩ (when VCC = 15V).
CXA3691AEN
Electrical Characteristics
(Ta = 25°C, VCC = 15V, RIDRV = 220kΩ, ISF pin: connected to GND)
DC Characteristics
Item
Supply current
Symbol
Measurement conditions
Min.
Typ.
Max.
Unit
ICC
IN = 10V, RIDRV = 220kΩ
1.4
1.6
1.8
mA
—
0.999
—
V/V
–100
—
100
mV
*1
IN: 10Vdc ΔV = 1V
GAIN = ΔOUT/ΔV
Voltage gain
VGAIN
I/O offset voltage
VOFFSET
IN = 10V
VOFFSET = OUT-IN
I/O voltage range
VRANGE
RIDRV = 100kΩ
RIDRV = 150kΩ
RIDRV = 220kΩ
RIDRV = 330kΩ
3.3
2.9
2.5
2.1
—
—
—
—
VCC – 2.0
VCC – 1.85
VCC – 1.8
VCC – 1.7
V
Input bias current
IBIAS
IN = 10V, ISF = 0V
–15
–5
6
μA
Sync current
ISINK
IN = 10V, RISF = 220kΩ
2.6
2.9
3.2
mA
*1
Voltage gain
10.5V
IN
ΔV = 1V
9.5V
OUT
ΔOUT
-3-
CXA3691AEN
AC Characteristics
(Ta = 25°C, VCC = 15V, IDRV = 50μA (220kΩ when VCC = 15V), ISF pin: connected to GND, RL = 15Ω, CL =
20pF)
Item
Symbol
Measurement conditions
Bandwidth
GBW
IN = 50mVp-p
Rise time
TRISE
IN = 9.5 to 10.5V
10 to 90%
Fall time
TFALL
IN = 10.5 to 9.5V
10 to 90%
I/O delay time
TDELAY
IN = 9.5 to 10.5V
@50%
Min.
Typ.
Max.
Unit
—
220
—
MHz
—
2.5
3.5
ns
—
3.0
4.0
ns
0.9
1.0
2.0
ns
*1
*1
*1
*1
Rise time, fall time and I/O delay time
10.5V
50%
IN
9.5V
90%
90%
50%
OUT
10%
TFALL
10%
TRISE
TDELAY
-4-
CXA3691AEN
Evaluation Circuit
220kΩ
220kΩ
1000pF
47µF
VCC
ISF
6
IDRV
4
5
1
3
2
IN
GND
15Ω
OUT
20pF
A
15V
GND
-5-
CXA3691AEN
Description of Operation
Current Settings
1. Output Drive Current
The small signal output impedance of the OUT pin (Pin 3) can be set by connecting the IDRV pin (Pin 4) to VCC
through a resistor. The inflow current to the IDRV pin is multiplied by 10 times inside the IC, and flows as the
output stage idling current.
The IDRV pin has an internal 50kΩ resistor, so the inflow current to the IDRV pin can be calculated as follows.
IIDRV = (VCC – VBE × 2)/(RIDRV + 50kΩ)
= (15 – 1.46)/270kΩ
= 50.1μA
Here, VCC = 15V, VBE = 0.73V (typ.), and RIDRV = 220kΩ.
The small signal output impedance at this time can be calculated as follows.
ROUT = (26mV/(10 × IIDRV))/2
= (26mV/501μA)/2
= 26Ω
2. Sink Current for CCD with open source output
The sink current of the IN pin (Pin 6) can be set by connecting the ISF pin (Pin 1) to VCC through a resistor.
This sink current can be used as the CCD output stage source follower drive current. The inflow current to the
ISF pin is multiplied by 58 times inside the IC, and flows as the sink current.
The ISF pin has an internal 50kΩ resistor, so the inflow current to the ISF pin can be calculated as follows.
IISF = (VCC – VBE × 2)/(RISF + 50kΩ)
= (15 – 1.46)/270kΩ
= 50.1μA
Here, VCC = 15V, VBE = 0.73V (typ.), and RISF = 220kΩ.
The sink current at this time can be calculated as follows.
Isink = 58 × IISF
= 2.9mA
Note) This IC operation depends on IDRV and ISF.
This specification is described based on IDRV of 220kΩ when VCC = 15V. However , set it to 180kΩ to
occur the same current when using under the condition that VCC = 13V.
[IDRV and ISF vs external resistor]
Current (μA)
90
68
50
35
26
Unit
When VCC = 15V
100
150
220
330
470
kΩ
When VCC = 13V
78
120
180
270
390
kΩ
-6-
CXA3691AEN
Example of Representative Characteristics
(Upper side) I/O voltage range vs.
IDRV pin setting resistance
(Lower side) I/O voltage range vs.
IDRV pin setting resistance
5.0
VCC – 0
Ta = 25˚C
Ta = 25˚C
4.5
0.5
4.0
1.5
I/O voltage [V]
I/O voltage [V]
1.0
VCC = 13V
VCC = 15V
2.0
2.5
3.5
3.0
VCC = 15V
2.5
VCC = 13V
2.0
1.5
3.0
1.0
3.5
4.0
0.5
0
50
100
150
200
250
300
0
350
0
50
100
150
200
250
300
350
IDRV pin setting resistance [kΩ]
IDRV pin setting resistance [kΩ]
Current consumption vs. IDRV pin setting resistance
Sink current vs. ISF pin setting resistance
4.0
5.0
Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V
4.5
4.0
3.0
Sync current [mA]
Current consumption [mA]
Ta = 25˚C, VIN = VCC – 5V
3.5
2.5
VCC = 15V
2.0
VCC = 13V
1.5
1.0
3.5
3.0
VCC = 15V
2.5
VCC = 13V
2.0
1.5
1.0
0.5
0
0.5
0
50
100
150
200
250
300
0
350
0
50
100
150
200
250
300
350
ISF pin setting resistance [kΩ]
IDRV pin setting resistance [kΩ]
Current consumption vs. Supply voltage
Current consumption vs. Operating temperature
2.0
2.0
VCC = 15V, RIDRV = 220kΩ, VIN = VCC – 5V
Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V
Current consumption [mA]
Current consumption [mA]
1.8
1.6
1.4
1.2
1.0
10.0
11.0
12.0
13.0
14.0
15.0
16.0
1.8
1.6
1.4
1.2
–50
–25
0
25
50
Operating temperature [˚C]
Supply voltage [V]
-7-
75
100
CXA3691AEN
I/O offset voltage vs. Supply voltage
I/O offset voltage vs. Operating temperature
20.0
20.0
VCC = 15V, RIDRV = 220kΩ, VIN = VCC – 5V
10.0
10.0
I/O offset voltage [mV]
I/O offset voltage [mV]
Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V
0
–10.0
–20.0
10.0
11.0
12.0
13.0
14.0
15.0
0
–10.0
–20.0
–50
16.0
–25
25
50
75
100
Operating temperature [˚C]
Supply voltage [V]
Input bias current vs. Supply voltage
Input bias current vs. Operating temperature
5.0
5.0
VCC = 15V, RIDRV = 220kΩ, VIN = VCC – 5V
Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V
0
Input bias current [µA]
0
Input bias current [µA]
0
–5.0
–10.0
–15.0
10.0
11.0
12.0
13.0
14.0
15.0
–5.0
–10.0
–15.0
–50
16.0
–25
0
25
50
75
100
Operating temperature [˚C]
Supply voltage [V]
Sink current vs. Supply voltage
Sink current vs. Operating temperature
3.5
3.4
VCC = 15V, RIDRV, RISF = 220kΩ, VIN = VCC – 5V
Ta = 25˚C, RIDRV, RISF = 220kΩ, VIN = VCC – 5V
3.2
Sync current [mA]
Sync current [mA]
3.0
2.5
3.0
2.8
2.0
2.6
1.5
10.0
2.4
11.0
12.0
13.0
14.0
15.0
16.0
–50
–25
0
25
50
Operating temperature [˚C]
Supply voltage [V]
-8-
75
100
CXA3691AEN
Tr and Tf vs. Supply voltage
Tr and Tf vs. Operating temperature
6.0
4.0
3.5
5.0
Tf
3.0
Tr
Tf
Tr and Tf [ns]
Tr and Tf [ns]
4.0
Tr
3.0
2.0
Ta = 25˚C, RIDRV = 220kΩ,
CL = 20pF, RL = 15Ω,
Input DC offset = VCC – 5V,
Input amplitude = 1.0V,
Input rise, fall time = 2.0ns
1.0
0
10.0
11.0
12.0
13.0
14.0
2.5
2.0
1.5
VCC = 15V, RIDRV = 220kΩ,
CL = 20pF, RL = 15Ω,
Input DC offset = VCC – 5V,
Input amplitude = 1.0V,
Input rise, fall time = 2.0ns
1.0
0.5
15.0
0
–50
16.0
2.00
1.75
1.75
1.50
1.50
I/O delay time [ns]
2.00
1.25
1.00
0.75
Ta = 25˚C, RIDRV = 220kΩ,
CL = 20pF, RL = 15Ω,
Input DC offset = VCC – 5V,
Input amplitude = 1.0V,
Input rise, fall time = 2.0ns
12.0
11.0
13.0
14.0
75
100
VCC = 15V, RIDRV = 220kΩ,
CL = 20pF, RL = 15Ω,
Input DC offset = VCC – 5V,
Input amplitude = 1.0V,
Input rise, fall time = 2.0ns
1.25
1.00
0.75
0.50
0.25
15.0
16.0
0
–50
0
–25
25
50
75
Supply voltage [V]
Operating temperature [˚C]
Positive pulse response
Negative pulse response
0.2V/div
0
10.0
50
I/O delay time vs. Operating temperature
0.2V/div
I/O delay time [ns]
I/O delay time vs. Supply voltage
0.25
25
Operating temperature [˚C]
Supply voltage [V]
0.50
0
–25
VCC = 15V,
RIDRV = 220kΩ, CL = 20pF, RL = 15Ω
Input rise, fall time = 2.0ns
T
Input
100
Output
T
10.0V
10.0V
T Output
T
Input
VCC = 15V,
RIDRV = 220kΩ, CL = 20pF, RL = 15Ω
Input rise, fall time = 2.0ns
Ch1 200mVΩ Ch2 200mVΩ M 1.00ns Ch1
10.0V
1.0ns/div
-9-
Ch1 200mVΩ Ch2 200mVΩ M 1.00ns Ch1
10.0V
1.0ns/div
CXA3691AEN
Application Circuit 1 (when using CCD with open source output )
220kΩ
220kΩ
1000pF
VCC
ISF
6
IDRV
4
5
1
3
2
IN
0.1µF
GND
OUT
15V
GND
CDS/ADC
CCD
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
- 10 -
CXA3691AEN
Application Circuit 2 (when using CCD with internal current source)
220kΩ
1000pF
VCC
ISF
6
IDRV
4
5
1
3
2
IN
0.1µF
GND
OUT
15V
GND
CDS/ADC
CCD
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
- 11 -
CXA3691AEN
Notes on Operation
‹ Provide the widest GND pattern possible on the board.
‹ Use a 1000pF (recommended) and a 0.1μF (recommended) ceramic capacitors in parallel for the bypass
capacitor connected between the power supply and GND, and connect them as close to the IC pins as
possible.
‹ Load capacitance causes the input/output wiring response to worsen and results in noise. Use the shortest
wiring layout possible, and shield it with GND.
‹ When the output pin (Pin 3) is shorted to either the power supply or GND, an overcurrent may flow to the
output stage elements and damage them.
When the input pin (Pin 1) is shorted to GND, an overcurrent may flow to the internal parasitic elements and
damage them.
- 12 -
CXA3691AEN
Package Outline
(Unit: mm)
6PIN WSON
4x
0.1 S A B
2.0
1.3 ± 0.1
0.65
0.65
A
+ 0.10
0.13 − 0.03
4
X
S
+ 0.1
0.2 − 0.05
(0.2)
+ 0.1
0.13 − 0.03
3
2
(0.11)
1
0.3 ± 0.1
φ0.07 M S A B
0.2 ± 0.1
2x
B
0.08 S
2.1
0.1 S B
5
6
1.7
PIN 1 INDEX
0.2 ± 0.1
0.75 ± 0.05
0.1 ± 0.03
0.1 ± 0.03
+ 0.1
6 - 0.20 − 0.05
0.3 ± 0.1
DETAIL X
PACKAGE STRUCTURE
PACKAGE MATERIAL
SONY CODE
EPOXY RESIN
TERMINAL TREATMENT Sn-Bi
WSON-6P-051
EIAJ CODE
TERMINAL MATERIAL
COPPER
JEDEC CODE
PACKAGE MASS
0.008g
LEAD PLATING SPECIFICATIONS
ITEM
- 13 -
SPEC.
LEAD MATERIAL
COPPER ALLOY
SOLDER COMPOSITION
Sn-Bi Bi:1-4wt%
PLATING THICKNESS
5-18µm
Sony Corporation
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