LMU16/216 LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 20 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Fairchild MPY016/TMC216, Cypress CY7C516, IDT 7216L, and AMD Am29516 The LMU16 and LMU216 are highspeed, low power 16-bit parallel multipliers. The LMU16 and LMU216 are functionally identical; they differ only in packaging. ❑ Two’s Complement, Unsigned, or Mixed Operands The LMU16 and LMU216 produce the 32-bit product of two 16-bit numbers. Data present at the A inputs, along with the TCA control bit, is loaded into the A register on the rising edge of CLK A. B data and the TCB control bit are similarly loaded by CLK B. The TCA and TCB controls specify the A and B operands as two’s complement when HIGH, or unsigned magnitude when LOW. ❑ Three-State Outputs ❑ 68-pin PLCC, J-Lead LMU16/216 BLOCK DIAGRAM B 15-0/ R 15-0 TCA A 15-0 TCB 16 16 CLK A A REGISTER REGISTER 32 RS FORMAT ADJUST 16 16 FT CLK M At the output, the Right Shift control (RS) selects either of two output formats. RS LOW produces a 31-bit product with a copy of the sign bit inserted in the MSB postion of the least significant half. RS HIGH gives a full 32-bit product. Two 16-bit output registers are provided to hold the most and least significant halves of the result (MSP and LSP) as defined by RS. These registers are loaded on the rising edge of CLK M and CLK L respectively. For asynchronous output, these registers may be made transparent by setting the feed through control (FT) HIGH. The two halves of the product may be routed to a single 16-bit three-state output port (MSP) via a multiplexer. MSPSEL LOW causes the MSP outputs to be driven by the most significant half of the result. MSPSEL HIGH routes the least significant half of the result to the MSP outputs. In addition, the LSP is available via the B port through a separate three-state buffer. B REGISTER CLK B RND RND is loaded on the rising edge of the logical OR of CLK A and CLK B. RND, when HIGH, adds ‘1’ to the most significant bit position of the least significant half of the product. Subsequent truncation of the 16 least significant bits produces a result correctly rounded to 16-bit precision. RESULT CLK L REGISTER MSPSEL OEM The output multiplexer control MSPSEL uses a pin which is a supply ground in the Fairchild MPY016H/ TMC216H. When this control is LOW (GND), the function is that of the MPY016H/TMC216H, thus allowing full compatibility. OEL 16 16 R 31-16 Multipliers 1 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED FIGURE 1A. 16 x 16-bit Parallel Multiplier INPUT FORMATS AIN BIN Fractional Two’s Complement (TCA, TCB = 1) 15 14 13 –20 2–1 2–2 2 1 0 2–13 2–14 2–15 15 14 13 –20 2–1 2–2 (Sign) 2 1 0 2–13 2–14 2–15 (Sign) Integer Two’s Complement (TCA, TCB = 1) 15 14 13 –215 214 213 2 1 0 22 21 20 15 14 13 –215 214 213 (Sign) 2 1 0 22 21 20 (Sign) Unsigned Fractional (TCA, TCB = 0) 15 14 13 2–1 2–2 2–3 2 1 0 2–14 2–15 2–16 15 14 13 2–1 2–2 2–3 2 1 0 2–14 2–15 2–16 Unsigned Integer (TCA, TCB = 0) 15 14 13 215 214 213 FIGURE 1B. 2 1 0 22 21 20 15 14 13 215 214 213 2 1 0 22 21 20 OUTPUT FORMATS MSP LSP Fractional Two’s Complement (RS = 0) 31 30 29 –20 2–1 2–2 18 17 16 2–13 2–14 2–15 15 14 13 –20 2–16 2–17 (Sign) 2 1 0 2–28 2–29 2–30 (Sign) Fractional Two’s Complement (RS = 1) 31 30 29 –21 20 2–1 18 17 16 2–12 2–13 2–14 15 14 13 2–15 2–16 2–17 2 1 0 2–28 2–29 2–30 (Sign) Integer Two’s Complement (RS = 1) 31 30 29 –231 230 229 18 17 16 218 217 216 15 14 13 215 214 213 2 1 0 22 21 20 (Sign) Unsigned Fractional (RS = 1) 31 30 29 2–1 2–2 2–3 18 17 16 2–14 2–15 2–16 15 14 13 2–17 2–18 2–19 2 1 0 2–30 2–31 2–32 Unsigned Integer (RS = 1) 31 30 29 231 230 229 18 17 16 218 217 216 15 14 13 215 214 213 2 1 0 22 21 20 Multipliers 2 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8) Storage temperature ........................................................................................................... –65°C to +150°C Operating ambient temperature ........................................................................................... –55°C to +125°C VCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V Output current into low outputs ............................................................................................................. 25 mA Latchup current ............................................................................................................................... > 400 mA OPERATING CONDITIONS To meet specified electrical and switching characteristics Mode Temperature Range (Ambient) Active Operation, Commercial Active Operation, Military Supply Voltage 0°C to +70°C 4.75 V ≤ VCC ≤ 5.25 V –55°C to +125°C 4.50 V ≤ VCC ≤ 5.50 V ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4) Symbol Parameter Test Condition Min VOH Output High Voltage VCC = Min., IOH = –2.0 mA VOL Output Low Voltage VCC = Min., IOL = 8.0 mA VIH Input High Voltage VIL Input Low Voltage (Note 3) IIX Input Current IOZ Typ Max 2.4 Unit V 0.5 V 2.0 VCC V 0.0 0.8 V Ground ≤ VIN ≤ VCC (Note 12) ±20 µA Output Leakage Current Ground ≤ VOUT ≤ VCC (Note 12) ±20 µA ICC1 VCC Current, Dynamic (Notes 5, 6) 25 mA ICC2 VCC Current, Quiescent (Note 7) 1.0 mA 12 Multipliers 3 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier SWITCHING CHARACTERISTICS COMMERCIAL OPERATING RANGE (0°C to +70°C) Notes 9, 10 (ns) Symbol Parameter tMC Clocked Multiply Time tMUC Unclocked Multiply Time tPW Clock Pulse Width tS Input Setup Time tH Input Hold Time tD Output Delay tSEL Output Select Delay tENA Three-State Output Enable Delay (Note 11) tDIS Three-State Output Disable Delay (Note 11) LMU16/216– 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 * * 65 55 45* 35* 25 20 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 Min Max Min Max Min Max Min Max Min Max Min Max 12345678901234567890123456789012123456 12345678901234567890123456789012123456 65 55 45 35 25 20 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 85 75 65 55 38 30 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 15 15 15 10 10 9 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 15 15 15 12 12 11 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 1 1 1 1 1 1 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 30 30 30 25 20 18 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 25 25 25 25 20 18 12345678901234567890123456789012123456 12345678901234567890123456789012123456 25 25 25 25 20 18 12345678901234567890123456789012123456 12345678901234567890123456789012123456 12345678901234567890123456789012123456 25 25 25 22 20 18 12345678901234567890123456789012123456 MILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns) Symbol Parameter tMC Clocked Multiply Time tMUC Unclocked Multiply Time tPW Clock Pulse Width tS Input Setup Time tH Input Hold Time tD Output Delay tSEL Output Select Delay tENA Three-State Output Enable Delay (Note 11) tDIS Three-State Output Disable Delay (Note 11) 123456789012345678901234567890121234567890123456789012345 LMU16/216– 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 * * 75 65 55* 40* 30* 25* 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 Min Max Min Max Min Max Min Max Min Max Min Max 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 75 65 55 40 30 25 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 95 85 75 60 43 38 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 20 15 15 15 10 10 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 15 15 15 15 12 12 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 2 2 2 2 2 2 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 35 30 30 25 20 20 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 30 30 30 25 20 20 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 25 25 25 25 20 20 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 123456789012345678901234567890121234567890123456789012345 25 25 25 25 22 22 123456789012345678901234567890121234567890123456789012345 SWITCHING WAVEFORMS tS tH INPUT tPW tPW CLK A CLK B tD CLK L CLK M tMC tSEL MSPSEL tMUC OEL OEM tDIS R31-0 tENA HIGH IMPEDANCE 123456789012345678901234 123456789012345678901234 123456789012345678901234 *DISCONTINUED SPEED GRADE Multipliers 4 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier NOTES 1. Maximum Ratings indicate stress specifications only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating conditions for extended periods may affect reliability. 9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except tDIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max 2. The products described by this spec- respectively. Alternatively, a diode ification include internal circuitry de- bridge with upper and lower current signed to protect the chip from damagsources of I OH and I OL respectively, ing substrate injection currents and ac- and a balancing voltage of 1.5 V may be cumulations of static charge. Neverthe- used. Parasitic capacitance is 30 pF less, conventional precautions should minimum, and may be distributed. be observed during storage, handling, and use of these circuits in order to This device has high-speed outputs caavoid exposure to excessive electrical pable of large instantaneous current stress values. pulses and fast turn-on/turn-off times. As a result, care must be exercised in the 3. This device provides hard clamping of testing of this device. The following transient undershoot and overshoot. In- measures are recommended: put levels below ground or above VCC will be clamped beginning at –0.6 V and a. A 0.1 µF ceramic capacitor should be VCC + 0.6 V. The device can withstand installed between VCC and Ground indefinite operation with inputs in the leads as close to the Device Under Test range of –0.5 V to +7.0 V. Device opera- (DUT) as possible. Similar capacitors tion will not be adversely affected, how- should be installed between device VCC ever, input current levels will be well in and the tester common, and device ground and tester common. excess of 100 mA. 4. Actual test conditions may vary from b. Ground and VCC supply planes those designated but operation is guar- must be brought directly to the DUT anteed as specified. socket or contactor fingers. 5. Supply current for a given applica- c. Input voltages should be adjusted to tion can be accurately approximated by: compensate for inductive ground and VCC noise to maintain required DUT input NCV2 F levels relative to the DUT ground pin. 4 where 10. Each parameter is shown as a min- 11. For the tENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the ±200mV level from the measured steady-state output voltage with ±10mA loads. The balancing voltage, V TH , is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current. FIGURE A. OUTPUT LOADING CIRCUIT S1 DUT IOL VTH CL IOH FIGURE B. THRESHOLD LEVELS tENA OE Z tDIS 1.5 V 1.5 V 3.5V Vth 0 1.5 V 1.5 V Z 1 VOL* 0.2 V VOH* 0.2 V 0 Z 1 Z 0V Vth VOL* Measured VOL with IOH = –10mA and IOL = 10mA VOH* Measured VOH with IOH = –10mA and IOL = 10mA imum or maximum value. Input requirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter6. Tested with all outputs changing ev- nal system must supply at least that ery cycle and no load, at a 5 MHz clock much time to meet the worst-case requirements of all parts. Responses from rate. the internal circuitry are specified from 7. Tested with all inputs within 0.1 V of the point of view of the device. Output VCC or Ground, no load. delay, for example, is specified as a 8. These parameters are guaranteed maximum since worst-case operation of any device always provides data within but not 100% tested. that time. N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency Multipliers 5 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier LMU16 — ORDERING INFORMATION 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 64-pin 68-pin 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 64 A4 1 A5 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 63 2 A3 A6 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 1 2 3 4 5 6 7 8 9 10 11 62 3 A2 A7 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 61 4 A1 A8 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 60 5 A0 A9 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 A 59 6 OEL A10 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 NC CLK B OEL A1 A11 A3 A5 A7 A9 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 58 7 CLK L A11 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 B 57 8 CLK B A12 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 56 9 R0, B0 A13 R/B1 R/B0 CLK L A0 A2 A4 A6 A8 A10 A12 NC 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 55 10 R1, B1 A14 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 C 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 54 11 R2, B2 A15 A14 A13 R/B3 R/B2 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 53 12 R3, B3 CLK A 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 D 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 52 13 RND R4, B4 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 R/B5 R/B4 CLK A A15 51 14 TCA R5, B5 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 E 50 15 TCB R6, B6 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 Top View R/B7 R/B6 TCA RND 49 16 VCC R7, B7 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 Through Package 48 17 R8, B8 VCC F 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 47 18 R9, B9 GND 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 R/B9 R/B8 VCC TCB (i.e., Component Side Pinout) 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 46 19 GND R10, B10 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 G 45 20 MSPSEL R 11 , B 11 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 R/B11 R/B10 GND VCC 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 44 21 FT R12, B12 123456789012345678901234567890121234567890123456 H 43 22 RS R 13 , B 13 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 MSPSEL GND R/B13 R/B12 42 23 OEM R14, B14 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 41 24 CLK M R15, B15 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 J 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 40 25 R31 R16 R/B15 R/B14 RS FT 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 39 26 R17 R30 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 K 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 38 27 R18 R29 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 NC R16 R18 R20 R22 R24 R26 R28 R30 CLK M OEM 37 28 R19 R28 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 L 36 29 R20 R27 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 R17 R19 R21 R23 R25 R27 R29 R31 NC 35 30 R21 R26 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234567 34 31 R22 R25 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 33 32 R23 R24 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 Discontinued Package Discontinued Package 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 1234567890123456789012345678901212345678901234567 123456789012345678901234567890121234567890123456 1234567890123456789012345678901212345678901234561234567890123456789012345678901212345678901234567 Speed Sidebraze Hermetic DIP (D6) Ceramic Pin Grid Array (G2) 0°C to +70°C — COMMERCIAL SCREENING –55°C to +125°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT Multipliers 6 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier LMU216 — ORDERING INFORMATION NC CLK M OEM RS FT MSPSEL GND GND VCC VCC TCB TCA RND CLK A A15 A14 A13 68-pin 10 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 11 59 12 58 13 57 14 56 15 55 16 54 17 Top View 18 19 53 52 51 20 50 21 49 22 48 23 47 24 46 25 45 26 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 NC A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 OEL CLK L CLK B R15, B15 R14, B14 R13, B13 R12, B12 R11, B11 R10, B10 R9, B9 R8, B8 R7, B7 R6, B6 R5, B5 R4, B4 R3, B3 R2, B2 R1, B1 R0, B0 NC R31 R30 R29 R28 R27 R26 R25 R24 R23 R22 R21 R20 R19 R18 R17 R16 NC Speed Plastic J-Lead Chip Carrier (J2) 0°C to +70°C — COMMERCIAL SCREENING 25 ns 20 ns LMU216JC25 LMU216JC20 –55°C to +125°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT Multipliers 7 08/16/2000–LDS.16/216-N