DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com DC MOTOR DRIVER IC Check for Samples: DRV8814 FEATURES 1 • 2 • • • Dual H-Bridge Current-Control Motor Driver – Drives Two DC Motors – Brake Mode – Two-Bit Winding Current Control Allows Up to 4 Current Levels – Low MOSFET On-Resistance 2.5-A Maximum Drive Current at 24 V, 25°C Built-In 3.3-V Reference Output Industry Standard Parallel Digital Control Interface • • 8-V to 45-V Operating Supply Voltage Range Thermally Enhanced Surface Mount Package APPLICATIONS • • • • • • Printers Scanners Office Automation Machines Gaming Machines Factory Automation Robotics DESCRIPTION The DRV8814 provides an integrated motor driver solution for printers, scanners, and other automated equipment applications. The device has two H-bridge drivers, and is intended to drive DC motors. The output driver block for each consists of N-channel power MOSFET’s configured as H-bridges to drive the motor windings. The DRV8814 can supply up to 2.5-A peak or 1.75-A RMS output current (with proper heatsinking at 24 V and 25°C) per H-bridge. A simple parallel digital control interface is compatible with industry-standard devices. Decay mode is programmable to allow braking or coasting of the motor when disabled. Internal shutdown functions are provided for over current protection, short circuit protection, under voltage lockout and overtemperature. TheDRV8814 is available in a 28-pin HTSSOP package with PowerPAD™ (Eco-friendly: RoHS & no Sb/Br). ORDERING INFORMATION (1) TA –40°C to 85°C (1) (2) PACKAGE (2) PowerPAD™ (HTSSOP) - PWP Reel of 2000 ORDERABLE PART NUMBER TOP-SIDE MARKING DRV8814PWPR 8814 For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010–2011, Texas Instruments Incorporated DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com DEVICE INFORMATION Functional Block Diagram VM VM Internal Reference & Regs 3.3V Int. VCC CP1 LS Gate Drive 0.01mF Charge Pump V3P3OUT CP2 3.3V VM VCP Thermal Shut down 0.1mF HS Gate Drive AVREF VM VMA BVREF AOUT1 Motor Driver A APHASE AENBL DCM AOUT2 AI0 ISENA AI1 BPHASE BENBL BI0 Control Logic VM VMB BI1 BOUT1 DECAY Motor Driver B nRESET DCM BOUT2 nSLEEP ISENB nFAULT GND 2 GND Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com Table 1. TERMINAL FUNCTIONS NAME PIN I/O (1) EXTERNAL COMPONENTS OR CONNECTIONS DESCRIPTION POWER AND GROUND GND 14, 28 - Device ground VMA 4 - Bridge A power supply VMB 11 - Bridge B power supply V3P3OUT 15 O 3.3-V regulator output CP1 1 IO Charge pump flying capacitor CP2 2 IO Charge pump flying capacitor VCP 3 IO High-side gate drive voltage Connect a 0.1-μF 16-V ceramic capacitor to VM. AENBL 21 I Bridge A enable Logic high to enable bridge A APHASE 20 I Bridge A phase (direction) Logic high sets AOUT1 high, AOUT2 low AI0 24 I AI1 25 I Bridge A current set Sets bridge A current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 BENBL 22 I Bridge B enable Logic high to enable bridge B BPHASE 23 I Bridge B phase (direction) Logic high sets BOUT1 high, BOUT2 low BI0 26 I BI1 27 I Bridge B current set Sets bridge B current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 DECAY 19 I Decay (brake) mode Low = brake (slow decay), high = coast (fast decay) nRESET 16 I Reset input Active-low reset input initializes internal logic and disables the H-bridge outputs nSLEEP 17 I Sleep mode input Logic high to enable device, logic low to enter low-power sleep mode AVREF 12 I Bridge A current set reference input BVREF 13 I Bridge B current set reference input 18 OD Fault Logic low when in fault condition (overtemp, overcurrent) ISENA 6 IO Bridge A ground / Isense Connect to current sense resistor for bridge A ISENB 9 IO Bridge B ground / Isense Connect to current sense resistor for bridge B AOUT1 5 O Bridge A output 1 AOUT2 7 O Bridge A output 2 BOUT1 10 O Bridge B output 1 BOUT2 8 O Bridge B output 2 Connect to motor supply (8 - 45 V). Both pins must be connected to same supply. Bypass to GND with a 0.47-μF 6.3-V ceramic capacitor. Can be used to supply VREF. Connect a 0.01-μF 50-V capacitor between CP1 and CP2. CONTROL Reference voltage for winding current set. Can be driven individually with an external DAC for microstepping, or tied to a reference (e.g., V3P3OUT). STATUS nFAULT OUTPUT (1) Connect to motor winding A Connect to motor winding B Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 3 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com PWP PACKAGE (TOP VIEW) CP1 CP2 VCP VMA AOUT1 ISENA AOUT2 BOUT2 ISENB BOUT1 VMB AVREF BVREF GND 1 28 2 27 3 4 26 5 24 25 6 7 8 23 GND (PPAD) 22 21 9 20 10 19 11 18 12 17 13 16 14 15 GND BI1 BI0 AI1 AI0 BPHASE BENBL AENBL APHASE DECAY nFAULT nSLEEP nRESET V3P3OUT ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) VMx VREF (1) (2) VALUE UNIT Power supply voltage range –0.3 to 47 V Digital pin voltage range –0.5 to 7 V Input voltage –0.3 to 4 V –0.3 to 0.8 V Peak motor drive output current, t < 1 μS Internally limited A Continuous motor drive output current (3) 2.5 A ISENSEx pin voltage Continuous total power dissipation See Dissipation Ratings table TJ Operating virtual junction temperature range –40 to 150 °C TA Operating ambient temperature range –40 to 85 °C Tstg Storage temperature range –60 to 150 °C (1) (2) (3) 4 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. Power dissipation and thermal limits must be observed. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com THERMAL INFORMATION DRV8814 THERMAL METRIC (1) PWP UNITS 28 PINS Junction-to-ambient thermal resistance (2) θJA 31.6 (3) θJCtop Junction-to-case (top) thermal resistance θJB Junction-to-board thermal resistance (4) 5.6 ψJT Junction-to-top characterization parameter (5) 0.2 ψJB Junction-to-board characterization parameter (6) 5.5 θJCbot Junction-to-case (bottom) thermal resistance (7) 1.4 (1) (2) (3) (4) (5) (6) (7) 15.9 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VM Motor power supply voltage range (1) 8 45 V VREF VREF input voltage (2) 1 3.5 V IV3P3 V3P3OUT load current 0 1 mA fPWM Externally applied PWM frequency 0 100 kHz (1) (2) All VM pins must be connected to the same supply voltage. Operational at VREF between 0 V and 1 V, but accuracy is degraded. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 5 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES IVM VM operating supply current VM = 24 V, fPWM < 50 kHz 5 8 mA IVMQ VM sleep mode supply current VM = 24 V 10 20 μA VUVLO VM undervoltage lockout voltage VM rising 7.8 8.2 V 3.3 3.4 V V3P3OUT REGULATOR V3P3 V3P3OUT voltage IOUT = 0 to 1 mA 3.2 LOGIC-LEVEL INPUTS VIL Input low voltage VIH Input high voltage 0.6 VHYS Input hysteresis IIL Input low current VIN = 0 IIH Input high current VIN = 3.3 V 0.7 V 5.25 V 0.45 0.6 V 20 μA 33 100 μA 0.5 V 1 μA 0.8 V ±40 μA 2 0.3 –20 nFAULT OUTPUT (OPEN-DRAIN OUTPUT) VOL Output low voltage IO = 5 mA IOH Output high leakage current VO = 3.3 V DECAY INPUT VIL Input low threshold voltage For slow decay (brake) mode 0 VIH Input high threshold voltage For fast decay (coast) mode 2 IIN Input current VIN = 0 V to 3.3 V V H-BRIDGE FETS RDS(ON) HS FET on resistance RDS(ON) LS FET on resistance IOFF Off-state leakage current VM = 24 V, IO = 1 A, TJ = 25°C 0.2 VM = 24 V, IO = 1 A, TJ = 85°C 0.25 VM = 24 V, IO = 1 A, TJ = 25°C 0.2 VM = 24 V, IO = 1 A, TJ = 85°C 0.25 –20 0.32 0.32 20 Ω Ω μA MOTOR DRIVER fPWM Internal current control PWM frequency tBLANK Current sense blanking time tR Rise time 50 300 ns tF Fall time 50 300 ns 160 180 °C 3 μA 50 kHz μs 3.75 PROTECTION CIRCUITS IOCP Overcurrent protection trip level tTSD Thermal shutdown temperature 3 Die temperature 150 A CURRENT CONTROL IREF VREF input current VTRIP xISENSE trip voltage AISENSE 6 Current sense amplifier gain VREF = 3.3 V –3 xVREF = 3.3 V, 100% current setting 635 660 685 xVREF = 3.3 V, 71% current setting 445 469 492 xVREF = 3.3 V, 38% current setting 225 251 276 Reference only Submit Documentation Feedback 5 mV V/V Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com FUNCTIONAL DESCRIPTION PWM Motor Drivers The DRV8814 contains two H-bridge motor drivers with current-control PWM circuitry. A block diagram of the motor control circuitry is shown in Figure 1. VM OCP VM VCP, VGD AOUT1 Predrive AENBL DCM APHASE AOUT2 DECAY PWM OCP AISEN + AI[1:0] A=5 DAC 2 AVREF VM OCP VM VCP, VGD BOUT1 Predrive BENBL DCM BPHASE BOUT2 PWM OCP BISEN + BI[1:0] A =5 DAC 2 BVREF Figure 1. Motor Control Circuitry Note that there are multiple VM pins. All VM pins must be connected together to the motor supply voltage. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 7 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com Bridge Control The xPHASE input pins control the direction of current flow through each H-bridge, and hence the direction of rotation of a DC motor. The xENBL input pins enable the H-bridge outputs when active high, and can also be used for PWM speed control of the motor. Note that the state of the DECAY pin selects the behavior of the bridge when xENBL = 0, allowing the selection of slow decay (brake) or fast decay (coast). Table 2 shows the logic. Table 2. H-Bridge Logic DECAY xENBL xPHASE xOUT1 xOUT2 0 0 X L L Z 1 0 X Z X 1 1 H L X 1 0 L H Current Regulation The maximum current through the motor winding is regulated by a fixed-frequency PWM current regulation, or current chopping. When the H-bridge is enabled, current rises through the winding at a rate dependent on the DC voltage and inductance of the winding. Once the current hits the current chopping threshold, the bridge disables the current until the beginning of the next PWM cycle. For DC motors, current regulation is used to limit the start-up and stall current of the motor. Speed control is typically performed by providing an external PWM signal to the ENBLx input pins. If the current regulation feature is not needed, it can be disabled by connecting the xISENSE pins directly to ground, and connecting the xVREF pins to V3P3. The PWM chopping current is set by a comparator which compares the voltage across a current sense resistor connected to the xISEN pins, multiplied by a factor of 5, with a reference voltage. The reference voltage is input from the xVREF pins, and is scaled by a 2-bit DAC that allows current settings of 100%, 71%, 38% of full-scale, plus zero. The full-scale (100%) chopping current is calculated in Equation 1. VREFX ICHOP = 5¾ · RISENSE (1) Example: If a 0.25-Ω sense resistor is used and the VREFx pin is 2.5 V, the full-scale (100%) chopping current will be 2.5 V / (5 x 0.25 Ω) = 2 A. Two input pins per H-bridge (xI1 and xI0) are used to scale the current in each bridge as a percentage of the full-scale current set by the VREF input pin and sense resistance. The function of the pins is shown in Table 3. Table 3. H-Bridge Pin Functions xI1 xI0 RELATIVE CURRENT (% FULL-SCALE CHOPPING CURRENT) 1 1 0% (Bridge disabled) 1 0 38% 0 1 71% 0 0 100% Note that when both xI bits are 1, the H-bridge is disabled and no current flows. Example: If a 0.25-Ω sense resistor is used and the VREF pin is 2.5 V, the chopping current will be 2 A at the 100% setting (xI1, xI0 = 00). At the 71% setting (xI1, xI0 = 01) the current will be 2 A x 0.71 = 1.42 A, and at the 38% setting (xI1, xI0 = 10) the current will be 2 A x 0.38 = 0.76 A. If (xI1, xI0 = 11) the bridge will be disabled and no current will flow. 8 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com Decay Mode and Braking During PWM current chopping, the H-bridge is enabled to drive current through the motor winding until the PWM current chopping threshold is reached. This is shown in Figure 2 as case 1. The current flow direction shown indicates the state when the xENBL pin is high. Once the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or slow decay. In fast decay mode, once the PWM chopping current level has been reached, the H-bridge reverses state to allow winding current to flow in a reverse direction. As the winding current approaches zero, the bridge is disabled to prevent any reverse current flow. Fast decay mode is shown in Figure 2 as case 2. In slow decay mode, winding current is re-circulated by enabling both of the low-side FETs in the bridge. This is shown in Figure 2 as case 3. Figure 2. Decay Mode The DRV8814 supports fast decay and slow decay mode. Slow or fast decay mode is selected by the state of the DECAY pin - logic low selects slow decay, and logic high sets fast decay mode. Note that the DECAY pin sets the decay mode for both H-bridges. DECAY mode also affects the operation of the bridge when it is disabled (by taking the ENBL pin inactive). This applies if the ENABLE input is being used for PWM speed control of the motor, or if it is simply being used to start and stop motor rotation. If the DECAY pin is high (fast decay), when the bridge is disabled fast decay mode will be entered until the current through the bridge reaches zero. Once the current is at zero, the bridge is disabled to prevent the motor from reversing direction. This allows the motor to coast to a stop. If the DECAY pin is low (slow decay), both low-side FETs will be turned on when ENBL is made inactive. This essentially shorts out the back EMF of the motor, causing the motor to brake, and stop quickly. The low-side FETs will stay in the ON state even after the current reaches zero. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 9 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com Blanking Time After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a fixed period of time before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. Note that the blanking time also sets the minimum on time of the PWM. nRESET and nSLEEP Operation The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge drivers. All inputs are ignored while nRESET is active. Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time (approximately 1 ms) needs to pass before the motor driver becomes fully operational. Protection Circuits The DRV8814 is fully protected against undervoltage, overcurrent and overtemperature events. Overcurrent Protection (OCP) An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled and the nFAULT pin will be driven low. The device will remain disabled until either nRESET pin is applied, or VM is removed and re-applied. Overcurrent conditions on both high and low side devices; i.e., a short to ground, supply, or across the motor winding will all result in an overcurrent shutdown. Note that overcurrent protection does not use the current sense circuitry used for PWM current control, and is independent of the ISENSE resistor value or VREF voltage. Thermal Shutdown (TSD) If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the nFAULT pin will be driven low. Once the die temperature has fallen to a safe level operation will automatically resume. Undervoltage Lockout (UVLO) If at any time the voltage on the VM pins falls below the undervoltage lockout threshold voltage, all circuitry in the device will be disabled and internal logic will be reset. Operation will resume when VM rises above the UVLO threshold. 10 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 DRV8814 SLVSAB9C – MAY 2010 – REVISED MARCH 2011 www.ti.com THERMAL INFORMATION Thermal Protection The DRV8814 has thermal shutdown (TSD) as described above. If the die temperature exceeds approximately 150°C, the device will be disabled until the temperature drops to a safe level. Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient heatsinking, or too high an ambient temperature. Power Dissipation Power dissipation in the DRV8814 is dominated by the power dissipated in the output FET resistance, or RDS(ON). Average power dissipation of each H-bridge when running a DC motor can be roughly estimated by Equation 2. P = 2 · RDS(ON) · (IOUT)2 (2) where P is the power dissipation of one H-bridge, RDS(ON) is the resistance of each FET, and IOUT is the RMS output current being applied to each winding. IOUT is equal to the average current drawn by the DC motor. Note that at start-up and fault conditions this current is much higher than normal running current; these peak currents and their duration also need to be taken into consideration. The factor of 2 comes from the fact that at any instant two FETs are conducting winding current (one high-side and one low-side). The total device dissipation will be the power dissipated in each of the two H-bridges added together. The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and heatsinking. Note that RDS(ON) increases with temperature, so as the device heats, the power dissipation increases. This must be taken into consideration when sizing the heatsink. Heatsinking The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom layers. For details about how to design the PCB, refer to TI application report SLMA002, " PowerPAD™ Thermally Enhanced Package" and TI application brief SLMA004, " PowerPAD™ Made Easy", available at www.ti.com. In general, the more copper area that can be provided, the more power can be dissipated. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): DRV8814 11 PACKAGE OPTION ADDENDUM www.ti.com 28-Mar-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) DRV8814PWP ACTIVE HTSSOP PWP 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV8814PWPR ACTIVE HTSSOP PWP 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Audio www.ti.com/audio Communications and Telecom www.ti.com/communications Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps DLP® Products www.dlp.com Energy and Lighting www.ti.com/energy DSP dsp.ti.com Industrial www.ti.com/industrial Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical Interface interface.ti.com Security www.ti.com/security Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com Wireless www.ti.com/wireless-apps RF/IF and ZigBee® Solutions www.ti.com/lprf TI E2E Community Home Page e2e.ti.com Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2011, Texas Instruments Incorporated