LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 LMH6642/LMH6643/LMH6644 Low Power, 130MHz, 75mA Rail-to-Rail Output Amplifiers Check for Samples: LMH6642, LMH6643, LMH6644 FEATURES 1 (VS = ±5V, TA = 25°C, RL = 2kΩ, AV = +1. Typical Values Unless Specified). 2 • • • • • • • • • • • • • • • • −3dB BW (AV = +1) 130MHz Supply Voltage Range 2.7V to 12.8V Slew Rate (1), (AV = −1) 130V/µs Supply Current (no load) 2.7mA/amp Output Short Circuit Current +115mA/−145mA Linear Output Current ±75mA Input Common Mode Volt. 0.5V Beyond V−, 1V from V+ Output Voltage Swing 40mV from Rails Input Voltage Noise (100kHz) 17nV/√Hz Input Current Noise (100kHz) 0.9pA/√Hz THD (5MHz, RL = 2kΩ, VO = 2VPP, AV = +2) −62dBc Settling Time 68ns Fully Characterized for 3V, 5V, and ±5V Overdrive Recovery 100ns Output Short Circuit Protected (2) No Output Phase Reversal with CMVR Exceeded APPLICATIONS • • • • • (1) (2) Active Filters CD/DVD ROM ADC Buffer Amp Portable Video Current Sense Buffer Slew rate is the average of the rising and falling slew rates. Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. DESCRIPTION The LMH664X family true single supply voltage feedback amplifiers offer high speed (130MHz), low distortion (−62dBc), and exceptionally high output current (approximately 75mA) at low cost and with reduced power consumption when compared against existing devices with similar performance. Input common mode voltage range extends to 0.5V below V− and 1V from V+. Output voltage range extends to within 40mV of either supply rail, allowing wide dynamic range especially desirable in low voltage applications. The output stage is capable of approximately 75mA in order to drive heavy loads. Fast output Slew Rate (130V/µs) ensures large peakto-peak output swings can be maintained even at higher speeds, resulting in exceptional full power bandwidth of 40MHz with a 3V supply. These characteristics, along with low cost, are ideal features for a multitude of industrial and commercial applications. Careful attention has been paid to ensure device stability under all operating voltages and modes. The result is a very well behaved frequency response characteristic (0.1dB gain flatness up the 12MHz under 150Ω load and AV = +2) with minimal peaking (typically 2dB maximum) for any gain setting and under both heavy and light loads. This along with fast settling time (68ns) and low distortion allows the device to operate well in ADC buffer, and high frequency filter applications as well as other applications. This device family offers professional quality video performance with low DG (0.01%) and DP (0.01°) characteristics. Differential Gain and Differential Phase characteristics are also well maintained under heavy loads (150Ω) and throughout the output voltage range. The LMH664X family is offered in single (LMH6642), dual (LMH6643), and quad (LMH6644) options. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2001–2013, Texas Instruments Incorporated LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com Closed Loop Gain vs. Frequency for Various Gain VS = ±1.5V +2 AV = +1 +1 0 2.0 -1 0.0 AV = +10 -3 2VPP ±5V 4.0 VOUT = 0.2VPP -2 ±2.5V 6.0 RL = 2k GAIN (dB) NORMALIZED GAIN (dB) Large Signal Frequency Response 8.0 +3 4VPP AV = +5 AV = +2 RF = RL = 2k AV = +2 10k 100k 1M 10M 100M 500M 100k 1M 10M 200M FREQUENCY (Hz) FREQUENCY (Hz) Figure 1. Figure 2. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance 2KV 200V (4) 1000V (5) VIN Differential ±2.5V Output Short Circuit Duration + See − Supply Voltage (V - V ) ±10mA −65°C to +150°C Storage Temperature Range (8) Soldering Information (2) (3) (4) (5) (6) (7) (8) 2 , V+ +0.8V, V− −0.8V Input Current Junction Temperature (6) (7) 13.5V Voltage at Input/Output pins (1) (3) +150°C Infrared or Convection Reflow (20 sec) 235°C Wave Soldering Lead Temp.(10 sec) 260°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. Human body model, 1.5kΩ in series with 100pF. Machine Model, 0Ω in series with 200pF. CDM: Charge Device Model Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 Operating Ratings (1) Supply Voltage (V+ – V−) 2.7V to 12.8V Junction Temperature Range (2) Package Thermal Resistance (2) (1) (2) −40°C to +85°C (θJA) 5-Pin SOT-23 265°C/W 8-Pin SOIC 190°C/W 8-Pin VSSOP 235°C/W 14-Pin SOIC 145°C/W 14- Pin TSSOP 155°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. 3V Electrical Characteristics Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 3V, V− = 0V, VCM = VO = V+/2, VID (input differential voltage) as noted (where applicable) and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions −3dB BW BW AV = +1, VOUT = 200mVPP Min Typ 80 115 (1) (2) AV = +2, −1, VOUT = 200mVPP 46 Max (1) Units MHz BW0.1dB 0.1dB Gain Flatness AV = +2, RL = 150Ω to V+/2, RL = 402Ω, VOUT = 200mVPP 19 MHz PBW Full Power Bandwidth AV = +1, −1dB, VOUT = 1VPP 40 MHz en Input-Referred Voltage Noise f = 100kHz 17 f = 1kHz 48 in Input-Referred Current Noise f = 100kHz 0.90 f = 1kHz 3.3 THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = −1, RL = 100Ω to V+/2 −48 DG Differential Gain VCM = 1V, NTSC, AV = +2 RL =150Ω to V+/2 0.17 RL =1kΩ to V+/2 0.03 VCM = 1V, NTSC, AV = +2 RL =150Ω to V+/2 0.05 RL =1kΩ to V+/2 0.03 DP Differential Phase nV/√Hz pA/√Hz dBc % deg CT Rej. Cross-Talk Rejection f = 5MHz, Receiver: Rf = Rg = 510Ω, AV = +2 47 dB TS Settling Time VO = 2VPP, ±0.1%, 8pF Load, VS = 5V 68 ns SR Slew Rate VOS Input Offset Voltage (3) AV = −1, VI = 2VPP 90 120 V/µs For LMH6642 and LMH6644 ±1 ±5 ±7 For LMH6643 ±1 ±3.4 ±7 mV TC VOS Input Offset Average Drift See (4) ±5 IB Input Bias Current See (5) −1.50 −2.60 −3.25 µA IOS Input Offset Current 20 800 1000 nA RIN Common Mode Input Resistance 3 (1) (2) (3) (4) (5) µV/°C MΩ All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm. Slew rate is the average of the rising and falling slew rates. Offset voltage average drift determined by dividing the change in VOS at temperature extremes by the total temperature change. Positive current corresponds to current flowing into the device. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 3 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com 3V Electrical Characteristics (continued) Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 3V, V− = 0V, VCM = VO = V+/2, VID (input differential voltage) as noted (where applicable) and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter CIN Common Mode Input Capacitance CMVR Input Common-Mode Voltage Range Conditions Min (1) Typ (2) CMRR ≥ 50dB −0.5 1.8 1.6 2.0 Common Mode Rejection Ratio VCM Stepped from 0V to 1.5V 72 95 AVOL Large Signal Voltage Gain VO = 0.5V to 2.5V RL = 2kΩ to V+/2 80 75 96 VO = 0.5V to 2.5V RL = 150Ω to V+/2 74 70 82 ISC −0.2 −0.1 dB 2.90 2.98 RL = 150Ω to V+/2, VID = 200mV 2.80 2.93 Output Swing Low RL = 2kΩ to V+/2, VID = −200mV 25 75 RL = 150Ω to V+/2, VID = −200mV 75 150 Output Short Circuit Current Sourcing to V+/2 VID = 200mV (6) 50 35 95 Sinking to V+/2 VID = −200mV (6) 55 40 110 Output Current VOUT = 0.5V from either supply Positive Power Supply Rejection Ratio V+ = 3.0V to 3.5V, VCM = 1.5V IS Supply Current (per channel) No Load 75 V dB RL = 2kΩ to V+/2, VID = 200mV +PSRR Units pF Output Swing High IOUT (6) (1) 2 CMRR VO Max V mV mA ±65 mA 85 dB 2.70 4.00 4.50 mA Short circuit test is a momentary test. See Note 7 under 5V Electrical Characteristics. 5V Electrical Characteristics Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2, VID (input differential voltage) as noted (where applicable) and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions BW −3dB BW AV = +1, VOUT = 200mVPP Min Typ 90 120 (1) (2) AV = +2, −1, VOUT = 200mVPP 46 Max (1) Units MHz BW0.1dB 0.1dB Gain Flatness AV = +2, RL = 150Ω to V+/2, Rf = 402Ω, VOUT = 200mVPP 15 MHz PBW Full Power Bandwidth AV = +1, −1dB, VOUT = 2VPP 22 MHz en Input-Referred Voltage Noise f = 100kHz 17 f = 1kHz 48 in Input-Referred Current Noise f = 100kHz 0.90 f = 1kHz 3.3 THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = +2 −60 DG Differential Gain NTSC, AV = +2 RL =150Ω to V+/2 0.16 RL = 1kΩ to V+/2 0.05 NTSC, AV = +2 RL = 150Ω to V+/2 0.05 RL = 1kΩ to V+/2 0.01 DP (1) (2) 4 Differential Phase nV/√Hz pA/√Hz dBc % deg All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm. Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 5V Electrical Characteristics (continued) Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2, VID (input differential voltage) as noted (where applicable) and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions CT Rej. Cross-Talk Rejection f = 5MHz, Receiver: Rf = Rg = 510Ω, AV = +2 TS Settling Time VO = 2VPP, ±0.1%, 8pF Load SR Slew Rate VOS Input Offset Voltage (3) AV = −1, VI = 2VPP Min (1) Typ (2) Max (1) Units 47 95 dB 68 ns 125 V/µs For LMH6642 and LMH6644 ±1 ±5 ±7 For LMH6643 ±1 ±3.4 ±7 mV TC VOS Input Offset Average Drift See (4) ±5 IB Input Bias Current See (5) −1.70 −2.60 −3.25 µA IOS Input Offset Current 20 800 1000 nA RIN Common Mode Input Resistance 3 MΩ CIN Common Mode Input Capacitance 2 pF CMVR Input Common-Mode Voltage Range CMRR ≥ 50dB −0.5 3.8 3.6 4.0 CMRR Common Mode Rejection Ratio VCM Stepped from 0V to 3.5V 72 95 AVOL Large Signal Voltage Gain VO = 0.5V to 4.50V RL = 2kΩ to V+/2 86 82 98 VO = 0.5V to 4.25V RL = 150Ω to V+/2 76 72 82 VO ISC −0.2 −0.1 dB RL = 2kΩ to V+/2, VID = 200mV 4.90 4.98 RL = 150Ω to V+/2, VID = 200mV 4.65 4.90 Output Swing Low RL = 2kΩ to V+/2, VID = −200mV 25 100 RL = 150Ω to V+/2, VID = −200mV 100 150 Output Short Circuit Current Sourcing to V+/2 VID = 200mV (6) (7) 55 40 115 Sinking to V+/2 VID = −200mV (6) (7) 70 55 140 Output Current VO = 0.5V from either supply +PSRR Positive Power Supply Rejection Ratio V+ = 4.0V to 6V IS Supply Current (per channel) No Load 79 V dB Output Swing High IOUT (3) (4) (5) (6) (7) µV/°C V mV mA ±70 mA 90 dB 2.70 4.25 5.00 mA Slew rate is the average of the rising and falling slew rates. Offset voltage average drift determined by dividing the change in VOS at temperature extremes by the total temperature change. Positive current corresponds to current flowing into the device. Short circuit test is a momentary test. See Note 7. Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 5 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com ±5V Electrical Characteristics Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V− = −5V, VCM = VO = 0V, VID (input differential voltage) as noted (where applicable) and RL = 2kΩ to ground. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions BW −3dB BW AV = +1, VOUT = 200mVPP Min Typ 95 130 (1) (2) AV = +2, −1, VOUT = 200mVPP 46 Max (1) Units MHz BW0.1dB 0.1dB Gain Flatness AV = +2, RL = 150Ω to V+/2, Rf = 806Ω, VOUT = 200mVPP 12 MHz PBW Full Power Bandwidth AV = +1, −1dB, VOUT = 2VPP 24 MHz en Input-Referred Voltage Noise f = 100kHz 17 f = 1kHz 48 in Input-Referred Current Noise f = 100kHz 0.90 f = 1kHz 3.3 THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = +2 −62 DG Differential Gain NTSC, AV = +2 RL = 150Ω to V+/2 0.15 RL = 1kΩ to V+/2 0.01 NTSC, AV = +2 RL = 150Ω to V+/2 0.04 RL = 1kΩ to V+/2 0.01 DP Differential Phase nV/√Hz pA/√Hz dBc % deg CT Rej. Cross-Talk Rejection f = 5MHz, Receiver: Rf = Rg = 510Ω, AV = +2 47 TS Settling Time VO = 2VPP, ±0.1%, 8pF Load, VS = 5V 68 ns SR Slew Rate 135 V/µs VOS Input Offset Voltage (3) AV = −1, VI = 2VPP 100 dB For LMH6642 and LMH6644 ±1 ±5 ±7 For LMH6643 ±1 ±3.4 ±7 mV TC VOS Input Offset Average Drift See (4) ±5 IB Input Bias Current See (5) −1.60 −2.60 −3.25 µA IOS Input Offset Current 20 800 1000 nA RIN Common Mode Input Resistance 3 MΩ CIN Common Mode Input Capacitance 2 pF CMVR Input Common-Mode Voltage Range CMRR ≥ 50dB −5.5 3.8 3.6 4.0 CMRR Common Mode Rejection Ratio VCM Stepped from −5V to 3.5V 74 95 AVOL Large Signal Voltage Gain VO = −4.5V to 4.5V, RL = 2kΩ 88 84 96 VO = −4.0V to 4.0V, RL = 150Ω 78 74 82 VO (1) (2) (3) (4) (5) 6 µV/°C −5.2 −5.1 V dB dB Output Swing High RL = 2kΩ, VID = 200mV 4.90 4.96 RL = 150Ω, VID = 200mV 4.65 4.80 Output Swing Low RL = 2kΩ, VID = −200mV −4.96 −4.90 RL = 150Ω, VID = −200mV −4.80 −4.65 V V All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm. Slew rate is the average of the rising and falling slew rates. Offset voltage average drift determined by dividing the change in VOS at temperature extremes by the total temperature change. Positive current corresponds to current flowing into the device. Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 ±5V Electrical Characteristics (continued) Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V− = −5V, VCM = VO = 0V, VID (input differential voltage) as noted (where applicable) and RL = 2kΩ to ground. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ ISC Output Short Circuit Current Sourcing to Ground VID = 200mV (6) (7) 60 35 115 Sinking to Ground VID = −200mV (6) (7) 85 65 145 (1) IOUT Output Current VO = 0.5V from either supply ±75 PSRR Power Supply Rejection Ratio (V+, V−) = (4.5V, −4.5V) to (5.5V, −5.5V) 78 IS Supply Current (per channel) No Load (6) (7) Max (2) (1) Units mA mA 90 dB 2.70 4.50 5.50 mA Short circuit test is a momentary test. See Note 7. Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Connection Diagram 5 1 V OUTPUT + 1 -IN V - 2 - 7 N/C + V 2 +IN - + 4 3 +IN 8 N/C -IN - 3 + 4 V Figure 3. 5-Pin SOT-23 (LMH6642) Top View Package Number DBV0005A 1 8 6 OUTPUT 5 N/C Figure 4. 8-Pin SOIC (LMH6642) Top View Package Number D0008A + V OUT A A 2 - + 7 -IN A OUT B 3 6 +IN A + V - -IN B B 4 5 +IN B Figure 5. SOIC and VSSOP 8-Pin (LMH6643) Top View Package Number DGK0008A Figure 6. 14-Pin SOIC and 14-Pin TSSOP (LMH6644) Top View Package Numbers D0014A, PW0014A Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 7 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics At TJ = 25°C, V+ = +5, V− = −5V, RF = RL = 2kΩ. Unless otherwise specified. Closed Loop Frequency Response for Various Supplies Closed Loop Gain vs. Frequency for Various Gain +3 VS = ±1.5V +2 VS = ±2.5V -1 GAIN (dB) NORMALIZED GAIN (dB) 0 VS = ±5V -2 -3 VS = ±1.5V VS = ±2.5V VS = ±5V AV = +1 RL = 2k +1 VS = ±5V RL = 2k VOUT = 0.2VPP 0 -1 AV = +10 -2 -3 AV = +5 AV = +2 AV = +1 VOUT = 0.2VPP 100k 1M 10M 200M 10k 100k 1M FREQUENCY (Hz) 10M 100M 500 M FREQUENCY (Hz) Figure 7. Figure 8. Closed Loop Gain vs. Frequency for Various Gain Closed Loop Frequency Response for Various Temperature +3 0 AV = +1 -40°C RL = 2k +1 -2 VOUT = 0.2VPP 25°C -4 0 GAIN (dB) NORMALIZED GAIN (dB) 85°C VS = ±1.5V +2 -1 -2 AV = +10 -3 -6 VS = ±1.5V AV = +5 RL = 2k AV = +1 VO = 0.2VPP AV = +2 10k 10k 100k 1M 10M 100k 100M 500M 1M 10M 100M 500M FREQUENCY (Hz) FREQUENCY (Hz) Figure 9. Figure 10. Closed Loop Gain vs. Frequency for Various Supplies Closed Loop Frequency Response for Various Temperature ±1.5V 7.0 85°C 0 ±2.5V 6.5 -2 25°C -4 ±5V 5.5 GAIN (dB) GAIN (dB) 6.0 5.0 AV = +2 VS = ±5V RF = 2k AV = +1 VO = 0.2VPP 100k 1M VOUT = 0.2VPP 10M 200M 10k 100k FREQUENCY (Hz) Submit Documentation Feedback 1M 10M 100M 500M FREQUENCY (Hz) Figure 11. 8 -40°C RL = 2k RL = 150 Figure 12. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. Large Signal Frequency Response 8.0 8.0 ±2.5V 6.0 4.0 4VPP ±5 V 2.0 GAIN (dB) 2.0 ±1.5V 6.0 2VPP ±5V 4.0 GAIN (dB) Closed Loop Small Signal Frequency Response for Various Supplies 0.0 0.0 ±2.5V VO = 0.2VPP AV = +2 AV = +2 RF = RL = 2k RF = RL = 2k 100k 1M 10M 1M 100k 200M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 13. Figure 14. Closed Loop Frequency Response for Various Supplies 200M ±0.1dB Gain Flatness for Various Supplies ±5V 6 ±1.5V 4 +0.3 ±1.5V +0.2 GAIN (dB) GAIN (dB) ±2.5V 0 0 +25 -0.1 ±5V PHASE AV = +2 RF = 806: -110 ±2.5V RF = 806: 150: RL = 150: 1M 10M 200M 100K FREQUENCY (Hz) -20 -65 VO = 0.4VPP AV = +2 100K GAIN +0.1 VO = 0.4VPP RL ±5V PHASE (deg) ±2.5V 2 -155 ±1.5V 1M 10M 200M FREQUENCY (Hz) Figure 15. Figure 16. VOUT (VPP) for THD < 0.5% VOUT (VPP) for THD < 0.5% 5 3 RL = 2k 4 RL = 100: VOUT (VPP) VOUT (VPP) 2 3 2 1 VS = 5V 1 VS = 3V AV = -1 0 100k 1M 10M 100M AV = -1 Rf = 2k RL = 2K to VS/2 0 100K 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. Figure 18. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 100M Submit Documentation Feedback 9 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. VOUT (VPP) for THD < 0.5% Open Loop Gain/Phase for Various Temperature 80 10 85°C 9 RL = 2K 8 60 GAIN (dB) VOUT (VPP) 6 5 4 PHASE (Deg) PHASE 7 40 60 GAIN 20 40 -40°C 20 3 RL = 100: 2 0 VS = ±5V 1 AV = -1 0 100k 1M 10M 100M 0 VS = ±1.5V RL= 2k -20 10k 100k 25°C 1M 10M 150M FREQUENCY (Hz) FREQUENCY (Hz) Figure 19. Figure 20. Open Loop Gain/Phase for Various Temperature HD2 (dBc) vs. Output Swing 80 -80 85°C -75 GAIN 60 -70 40 60 20 40 25°C -65 HD2 (dBc) PHASE (Deg) GAIN (dB) PHASE 20 0 -20 10k 100k 1M -50 10MHz VS = 5V -40 AV = -1 -35 R = 2k to V /2 L S -40°C RL = 2k -55 -45 0 VS = ±5V 5MHz -60 10M -30 150M 0 FREQUENCY (Hz) 1 2 3 4 5 VOUT (VPP) Figure 21. Figure 22. HD3 (dBc) vs. Output Swing HD2 vs. Output Swing -90 -80 100:,1MHz -75 -80 -70 100: 5MHz -70 -65 2k:, 5MHz HD2 (dBc) HD3 (dBc) 5MHz -60 -55 -50 -45 -60 -50 2k:, 10MHz -40 VS = 5V -40 10MHz AV = -1 -35 RL = 2k to VS/2 -30 0 1 2 3 4 5 100:, 10MHz -30 VS = 5V, AV = +2 RL = 2k: & 100: to VS/2 -20 0.0 1.0 2.0 3.0 VOUT (VPP) Figure 23. 10 Submit Documentation Feedback 4.0 5.0 VOUT (VPP) Figure 24. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. HD3 vs. Output Swing THD (dBc) vs. Output Swing -90 -80 100:,1MHz VS = 5V -70 -70 AV = -1 -65 THD (dBc) HD3 (dBc) RL = 2k TO VS/2 -75 -80 2k:,5MHz -60 2k:,10MHz -50 -60 5MHz -55 -50 -45 100:, 5MHz -40 -40 -30 VS = 5V, AV = +2 RL = 2k: &100: to VS/2 100:, 10MHz -20 0.0 1.0 2.0 3.0 4.0 5.0 10MHz -35 -30 0 1 2 VOUT (VPP) 3 4 5 VOUT (VPP) Figure 25. Figure 26. Settling Time vs. Input Step Amplitude (Output Slew and Settle Time) Input Noise vs. Frequency 1k 80 100 60 50 40 30 VOLTAGE CURRENT 1 10 VS = 5V 20 AV = -1 10 Rf = RL = 2k CL = 8pF 0 1 1.5 0.5 INPUT STEP AMPLITUDE (VPP) 1 10 2 100 1K 10K 100K FREQUENCY (Hz) Figure 27. VOUT from V− vs. ISINK 10 10 VS=±1.5V VOUT FROM V (V) VS = ±1.5V 1 1 - + 0.1 1M Figure 28. VOUT from V+ vs. ISOURCE VOUT FROM V (V) in (pA/ Hz) 10 100 en (nV/ Hz) ±0.1% SETTLING TIME 70 85°C 0.1 85°C 0.1 -40°C -40°C 25°C 25°C 0.01 0.01 1 10 100 1k 1 ISOURCE (mA) Figure 29. 10 100 1K ISINK (mA) Figure 30. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 11 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. VOUT from V− vs. ISINK VOUT from V+ vs. ISOURCE 10 10 VS = ±5V VS = ±5V 85°C -40°C VOUT FROM V (V) 1 1 - + VOUT FROM V (V) 25°C 85° C 0.1 -40°C 85°C 0.1 -40°C 25°C 0.01 0.01 1 10 100 1 1k 10 ISOURCE (mA) Figure 31. Swing vs. VS Short Circuit Current (to VS/2) vs. VS 180 RL = 150: 85°C, Sink 85°C, Sourcing 25°C, Sink 25°C, Sourcing 140 120 120 -40°C, Sourcing ISC (mA) VOUT FROM SUPPLY (mV) -40°C, Sink 160 140 100 80 100 25°C, Source 80 60 60 85°C, Sinking -40°C, Source 20 -40°C, Sinking 0 20 2 3 4 5 6 7 VS (V) 85°C, Source 40 25°C, Sinking 40 8 9 2 10 3 4 5 6 7 8 9 10 VS (V) Figure 33. Figure 34. Output Sinking Saturation Voltage vs. IOUT Output Sourcing Saturation Voltage vs. IOUT 1 1 VS = ±2.5 0.9 VS = ±2.5V 0.9 0.8 0.8 VOUT FROM V (V) 85°C + 0.7 0.6 0.5 25°C 0.4 0.3 0.2 25°C 0.7 0.6 85°C 0.5 0.4 0.3 0.2 -40°C 0.1 -40°C 0.1 0 0 0 20 40 60 80 100 120 0 20 ISINK(mA) Submit Documentation Feedback 40 60 80 100 120 ISOURCING (mA) Figure 35. 12 1k Figure 32. 160 VOUT FROM V- (V) 100 ISINK (mA) Figure 36. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. Closed Loop Output Impedance vs. Frequency AV = +1 PSRR vs. Frequency 1000 90 AV = +1 VS = 5V 80 100 AV = +10 70 + PSRR 10 PSRR (dB) ZOUT (:) 60 1 50 40 - PSRR 30 20 0.1 10 0.01 1k 0 10k 100k 100M 10M 1M 10k 100k 10M 100M Figure 37. Figure 38. CMRR vs. Frequency Crosstalk Rejection vs. Frequency (Output to Output) 100 100 90 90 80 80 70 60 50 70 60 50 VS = 5V 40 40 AV = +6 30 100 Receive CH.: AV = +2, Rf = Rg = 510 30 1k 10k 100k 10M 1M 1k 10k FREQUENCY (Hz) VOS vs. VOUT (Typical Unit) 10M VOS vs. VCM (Typical Unit) 2 VS = 10V VS = 5V 1.5 + RL = 150: to V /2 0.6 1M Figure 40. 1 0.8 100k FREQUENCY (Hz) Figure 39. 1.0 0.4 85°C 0.2 VOS (mV) VOS (mV) 1M FREQUENCY (Hz) CT (rej) (dB) CMRR (dB) FREQUENCY (Hz) 85°C 0 -0.2 -0.4 0.5 0 25°C -0.5 25°C -1 -40°C -0.6 -1.5 -0.8 -40°C -1 0 1 -2 -2 VOUT (V) 4 VCM (V) Figure 41. Figure 42. 2 3 4 5 0 Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 2 6 8 10 Submit Documentation Feedback 13 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. VOS vs. VS (for 3 Representative Units) VOS vs. VS (for 3 Representative Units) 1 1 -40°C 0.8 0.8 Unit #1 0.6 0.6 0.4 0.4 0.2 0.2 VOS (mV) VOS (mV) Unit #1 0 -0.2 25°C 0 Unit #2 -0.2 Unit #2 -0.4 -0.4 Unit #3 -0.6 -0.6 Unit #3 -0.8 -0.8 -1 -1 2 4 6 8 10 12 3 2 4 5 VS (V) VOS vs. VS (for 3 Representative Units) 10 11 IB vs. VS -1000 -1100 0.8 Unit #1 85°C 0.6 -1200 0.4 -1300 IB (nA) VOS (mV) 9 Figure 44. 1 0.2 0 Unit #2 -0.2 -40°C -1400 25°C -1500 -1600 -0.4 85°C -1700 -0.6 Unit #3 -1800 -0.8 -1900 -1 2 3 4 5 6 8 7 9 10 2 12 4 6 8 10 12 VS (V) VS (V) Figure 45. Figure 46. IOS vs. VS IS vs. VCM 50 4 45 3.5 VS = 10V 85°C IS (mA) (PER CHANNEL) 40 35 IOS (nA) 8 7 VS (V) Figure 43. 30 25 -40°C 20 15 25°C 10 5 2 4 3 2.5 25°C 2 -40°C 1.5 1 0.5 0 85°C 0 6 8 10 12 -0.5 -2 0 VS (V) Figure 47. 14 6 Submit Documentation Feedback 2 4 VCM (V) 6 8 10 Figure 48. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. IS vs. VS Small Signal Step Response 4 VS = 3V VO = 100mVPP 85°C IS (mA) (PER CHANNEL) RL = 2k to VS/2 AV = -1 3 25°C 2 -40°C 1 20 ns/DIV 40 mV/DIV 2 4 6 8 10 12 VS (V) Figure 49. Figure 50. Large Signal Step Response Large Signal Step Response AV = +2 VS = ±5V VO = 8VPP AV = +1 RL= 2k VS=±1.5V VO=2VPP AV= -1 RL=2k 4 /DIV 200.0 ns/DIV 40.0 nS/DIV 400 mV/DIV Figure 51. Figure 52. Small Signal Step Response Small Signal Step Response VS = 3V VS = ±5V VO = 100mVPP VO = 100mVPP RL = 2k to VS/2 AV = +1, RL = 2k AV = +1 40 mV/DIV 10 ns/DIV 40 mV/DIV Figure 53. 10.0 ns/DIV Figure 54. Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 15 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +5, V = −5V, RF = RL = 2kΩ. Unless otherwise specified. Small Signal Step Response Small Signal Step Response VS = ±5V VS = ±5V VO = 200mVPP AV = +2, RL = 2k VO = 100mVPP RL = 2k AV = -1 40 mV/DIV 20 ns/DIV 20.0 ns/DIV 40 mV/DIV Figure 55. Figure 56. Large Signal Step Response Large Signal Step Response VS = ±5V VS = ±5V VO = 8VPP VO = 2VPP AV = +2 RL = 2k RL = 2k AV = -1 2 V/DIV 20 ns/DIV 400 mV/DIV 40.0 ns/DIV Figure 57. Figure 58. Large Signal Step Response AV = -1 VS = ±5V VOUT = 8VPP RL = 2K: 2 V/DIV 100 ns/DIV Figure 59. 16 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 APPLICATION INFORMATION CIRCUIT DESCRIPTION The LMH664X family is based on proprietary VIP10 dielectrically isolated bipolar process. This device family architecture features the following: • Complimentary bipolar devices with exceptionally high ft (∼8GHz) even under low supply voltage (2.7V) and low bias current. • A class A-B “turn-around” stage with improved noise, offset, and reduced power dissipation compared to similar speed devices (patent pending). • Common Emitter push-push output stage capable of 75mA output current (at 0.5V from the supply rails) while consuming only 2.7mA of total supply current per channel. This architecture allows output to reach within milli-volts of either supply rail. • Consistent performance over the entire operating supply voltage range with little variation for the most important specifications (e.g. BW, SR, IOUT, etc.) • Significant power saving (∼40%) compared to competitive devices on the market with similar performance. Application Hints This Op Amp family is a drop-in replacement for the AD805X family of high speed Op Amps in most applications. In addition, the LMH664X will typically save about 40% on power dissipation, due to lower supply current, when compared to competition. All AD805X family’s guaranteed parameters are included in the list of LMH664X guaranteed specifications in order to ensure equal or better level of performance. However, as in most high performance parts, due to subtleties of applications, it is strongly recommended that the performance of the part to be evaluated is tested under actual operating conditions to ensure full compliance to all specifications. With 3V supplies and a common mode input voltage range that extends 0.5V below V−, the LMH664X find applications in low voltage/low power applications. Even with 3V supplies, the −3dB BW (@ AV = +1) is typically 115MHz with a tested limit of 80MHz. Production testing guarantees that process variations with not compromise speed. High frequency response is exceptionally stable confining the typical −3dB BW over the industrial temperature range to ±2.5%. As can be seen from the typical performance plots, the LMH664X output current capability (∼75mA) is enhanced compared to AD805X. This enhancement, increases the output load range, adding to the LMH664X’s versatility. Because of the LMH664X’s high output current capability attention should be given to device junction temperature in order not to exceed the Absolute Maximum Rating. This device family was designed to avoid output phase reversal. With input overdrive, the output is kept near supply rail (or as closed to it as mandated by the closed loop gain setting and the input voltage). See Figure 60: Output V + VOUT (VPP) Input V VS = ±2.5V - AV = +1 1V/DIV 200 ns/DIV Figure 60. Input and Output Shown with CMVR Exceeded However, if the input voltage range of −0.5V to 1V from V+ is exceeded by more than a diode drop, the internal ESD protection diodes will start to conduct. The current in the diodes should be kept at or below 10mA. Output overdrive recovery time is less than 100ns as can be seen from Figure 61 plot: Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 17 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com VIN (1 V/DIV) VS=±5V, VIN=5VPP VOUT (2 V/DIV) AV=+5, RF=RL=2k 100 ns/DIV 2 V/DIV Figure 61. Overload Recovery Waveform INPUT AND OUTPUT TOPOLOGY All input / output pins are protected against excessive voltages by ESD diodes connected to V+ and V-rails (see Figure 62). These diodes start conducting when the input / output pin voltage approaches 1Vbe beyond V+ or Vto protect against over voltage. These diodes are normally reverse biased. Further protection of the inputs is provided by the two resistors (R in Figure 62), in conjunction with the string of anti-parallel diodes connected between both bases of the input stage. The combination of these resistors and diodes reduces excessive differential input voltages approaching 2Vbe. The most common situation when this occurs is when the device is used as a comparator (or with little or no feedback) and the device inputs no longer follow each other. In such a case, the diodes may conduct. As a consequence, input current increases and the differential input voltage is clamped. It is important to make sure that the subsequent current flow through the device input pins does not violate the Absolute Maximum Ratings of the device. To limit the current through this protection circuit, extra series resistors can be placed. Together with the built-in series resistors of several hundred ohms, these external resistors can limit the input current to a safe number (i.e. < 10mA). Be aware that these input series resistors may impact the switching speed of the device and could slow down the device. V+ V+ V+ R R IN- IN+ V- V- Figure 62. Input Equivalent Circuit SINGLE SUPPLY, LOW POWER PHOTODIODE AMPLIFIER The circuit shown in Figure 63 is used to amplify the current from a photodiode into a voltage output. In this circuit, the emphasis is on achieving high bandwidth and the transimpedance gain setting is kept relatively low. Because of its high slew rate limit and high speed, the LMH664X family lends itself well to such an application. This circuit achieves approximately 1V/mA of transimpedance gain and capable of handling up to 1mApp from the photodiode. Q1, in a common base configuration, isolates the high capacitance of the photodiode (Cd) from the Op Amp input in order to maximize speed. Input is AC coupled through C1 to ease biasing and allow single supply operation. With 5V single supply, the device input/output is shifted to near half supply using a voltage divider from VCC. Note that Q1 collector does not have any voltage swing and the Miller effect is minimized. D1, tied to Q1 base, is for temperature compensation of Q1’s bias point. Q1 collector current was set to be large enough to handle the peak-to-peak photodiode excitation and not too large to shift the U1 output too far from mid-supply. 18 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 No matter how low an Rf is selected, there is a need for Cf in order to stabilize the circuit. The reason for this is that the Op Amp input capacitance and Q1 equivalent collector capacitance together (CIN) will cause additional phase shift to the signal fed back to the inverting node. Cf will function as a zero in the feedback path counteracting the effect of the CIN and acting to stabilized the circuit. By proper selection of Cf such that the Op Amp open loop gain is equal to the inverse of the feedback factor at that frequency, the response is optimized with a theoretical 45° phase margin. CF = SQRT (CIN)/(2S ˜ GBWP ˜ RF) (1) where GBWP is the Gain Bandwidth Product of the Op Amp Optimized as such, the I-V converter will have a theoretical pole, fp, at: fP = SQRT GBWP/(2SRF ˜ CIN) (2) With Op Amp input capacitance of 3pF and an estimate for Q1 output capacitance of about 3pF as well, CIN = 6pF. From the typical performance plots, LMH6642/6643 family GBWP is approximately 57MHz. Therefore, with Rf = 1k, from Equation 1 and Equation 2 above. Cf = ∼4.1pF and fp = 39MHz Cf 5pF Photodiode Equivalent Circuit Vbias Rf 1k: Rbias C1 100nF Q1 2N3904 VCC = +5V -1mAPP - Photodiode Id Cd Rd 10 200pF ×100k: R5 510: Vout R2 1.8k: x + D1 1N4148 R11 910 : R10 1k: R3 1k: +5V Figure 63. Single Supply Photodiode I-V Converter For this example, optimum Cf was empirically determined to be around 5pF. This time domain response is shown in Figure 64 below showing about 9ns rise/fall times, corresponding to about 39MHz for fp. The overall supply current from the +5V supply is around 5mA with no load. 200 mV/DIV 20 ns/DIV Figure 64. Converter Step Response (1VPP, 20 ns/DIV) Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 19 LMH6642, LMH6643, LMH6644 SNOS966P – MAY 2001 – REVISED MARCH 2013 www.ti.com PRINTED CIRCUIT BOARD LAYOUT AND COMPONENT VALUES SECTION Generally, a good high frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and possible circuit oscillations (see Application Note OA-15 for more information). Texas Instruments suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization: Device Package Evaluation Board PN LMH6642MF 5-Pin SOT-23 LMH730216 LMH6642MA 8-Pin SOIC LMH730227 LMH6643MA 8-Pin SOIC LMH730036 LMH6643MM 8-Pin VSSOP LMH730123 LMH6644MA 14-Pin SOIC LMH730231 LMH6644MT 14-Pin TSSOP LMH730131 Another important parameter in working with high speed/high performance amplifiers, is the component values selection. Choosing external resistors that are large in value will effect the closed loop behavior of the stage because of the interaction of these resistors with parasitic capacitances. These capacitors could be inherent to the device or a by-product of the board layout and component placement. Either way, keeping the resistor values lower, will diminish this interaction to a large extent. On the other hand, choosing very low value resistors could load down nodes and will contribute to higher overall power dissipation. 20 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 LMH6642, LMH6643, LMH6644 www.ti.com SNOS966P – MAY 2001 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision O (March 2013) to Revision P • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 20 Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LMH6642 LMH6643 LMH6644 Submit Documentation Feedback 21 PACKAGE OPTION ADDENDUM www.ti.com 9-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMH6642MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 42MA LMH6642MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 42MA LMH6642MF NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 A64A LMH6642MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A64A LMH6642MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A64A LMH6643MA NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMH66 43MA LMH6643MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 43MA LMH6643MAX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LMH66 43MA LMH6643MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 43MA LMH6643MM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 A65A LMH6643MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A65A LMH6643MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A65A LMH6644MA/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LMH6644MA LMH6644MAX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LMH6644MA LMH6644MT/NOPB ACTIVE TSSOP PW 14 94 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 44MT LMH6644MTX/NOPB ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 44MT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 9-Nov-2013 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMH6642MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6642MF SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6642MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6642MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6643MAX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6643MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6644MAX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LMH6644MTX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMH6642MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMH6642MF SOT-23 DBV 5 1000 210.0 185.0 35.0 LMH6642MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMH6642MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMH6643MAX SOIC D 8 2500 367.0 367.0 35.0 LMH6643MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMH6644MAX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LMH6644MTX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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