Freescale Semiconductor Technical Data Document Number: MRF1513N Rev. 11, 6/2008 RF Power Field Effect Transistor N - Channel Enhancement - Mode Lateral MOSFET MRF1513NT1 Designed for broadband commercial and industrial applications with frequencies to 520 MHz. The high gain and broadband performance of this device make it ideal for large - signal, common source amplifier applications in 7.5 volt portable and 12.5 volt mobile FM equipment. D • Specified Performance @ 520 MHz, 12.5 Volts Output Power — 3 Watts Power Gain — 15 dB Efficiency — 65% • Capable of Handling 20:1 VSWR, @ 15.5 Vdc, 520 MHz, 2 dB Overdrive Features • Excellent Thermal Stability G • Characterized with Series Equivalent Large - Signal Impedance Parameters • N Suffix Indicates Lead - Free Terminations. RoHS Compliant. S • In Tape and Reel. T1 Suffix = 1,000 Units per 12 mm, 7 Inch Reel. 520 MHz, 3 W, 12.5 V LATERAL N - CHANNEL BROADBAND RF POWER MOSFET CASE 466 - 03, STYLE 1 PLD - 1.5 PLASTIC Table 1. Maximum Ratings Rating Symbol Value Unit Drain- Source Voltage VDSS - 0.5, +40 Vdc Gate- Source Voltage VGS ± 20 Vdc ID 2 Adc PD 31.25 0.25 W W/°C Storage Temperature Range Tstg - 65 to +150 °C Operating Junction Temperature TJ 150 °C Symbol Value (2) Unit RθJC 4 °C/W Drain Current — Continuous Total Device Dissipation @ TC = 25°C Derate above 25°C (1) Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Table 3. Moisture Sensitivity Level Test Methodology Per JESD 22 - A113, IPC/JEDEC J - STD - 020 Rating Package Peak Temperature Unit 1 260 °C TJ – TC RθJC 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 1. Calculated based on the formula PD = NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. © Freescale Semiconductor, Inc., 2008. All rights reserved. RF Device Data Freescale Semiconductor MRF1513NT1 1 Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Zero Gate Voltage Drain Current (VDS = 40 Vdc, VGS = 0 Vdc) IDSS — — 1 μAdc Gate- Source Leakage Current (VGS = 10 Vdc, VDS = 0 Vdc) IGSS — — 1 μAdc Gate Threshold Voltage (VDS = 12.5 Vdc, ID = 60 μA) VGS(th) 1 1.7 2.1 Vdc Drain- Source On - Voltage (VGS = 10 Vdc, ID = 500 mAdc) VDS(on) — 0.65 — Vdc Input Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Ciss — 33 — pF Output Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Coss — 16.5 — pF Reverse Transfer Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Crss — 2.2 — pF Common- Source Amplifier Power Gain (VDD = 12.5 Vdc, Pout = 3 Watts, IDQ = 50 mA, f = 520 MHz) Gps — 15 — dB Drain Efficiency (VDD = 12.5 Vdc, Pout = 3 Watts, IDQ = 50 mA, f = 520 MHz) η — 65 — % Off Characteristics On Characteristics Dynamic Characteristics Functional Tests (In Freescale Test Fixture) MRF1513NT1 2 RF Device Data Freescale Semiconductor B2 VGG C9 + C8 C7 R4 B1 C16 C17 R3 C15 + VDD C14 L1 C6 R2 Z7 Z8 Z9 Z10 N2 Z11 R1 N1 Z1 Z2 Z3 Z4 Z5 DUT Z6 C10 RF INPUT RF OUTPUT C13 C11 C12 C1 C2 B1, B2 C3 C4 C5 R4 Z1 Z2 Z3 Z4 Z5 Z6, Z7 Z8 Z9 Z10 Z11 Board Short Ferrite Beads, Fair Rite Products #2743021446 240 pF, 100 mil Chip Capacitors C1, C13 C2, C3, C4, C10, C11, C12 C5, C6, C17 C7, C14 C8, C15 C9, C16 L1 N1, N2 R1, R3 R2 0 to 20 pF Trimmer Capacitors 120 pF, 100 mil Chip Capacitors 10 mF, 50 V Electrolytic Capacitors 1,200 pF, 100 mil Chip Capacitors 0.1 mF, 100 mil Chip Capacitors 55.5 nH, 5 Turn, Coilcraft Type N Flange Mounts 15 Ω Chip Resistors (0805) 1 kΩ, 1/8 W Resistor 33 kΩ, 1/8 W Resistor 0.236″ x 0.080″ Microstrip 0.981″ x 0.080″ Microstrip 0.240″ x 0.080″ Microstrip 0.098″ x 0.080″ Microstrip 0.192″ x 0.080″ Microstrip 0.260″ x 0.223″ Microstrip 0.705″ x 0.080″ Microstrip 0.342″ x 0.080″ Microstrip 0.347″ x 0.080″ Microstrip 0.846″ x 0.080″ Microstrip Glass Teflon®, 31 mils, 2 oz. Copper Figure 1. 450 - 520 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 450 - 520 MHz 5 0 VDD = 12.5 Vdc IRL, INPUT RETURN LOSS (dB) Pout , OUTPUT POWER (WATTS) 470 MHz 4 520 MHz 450 MHz 500 MHz 3 2 1 −5 −10 500 MHz 470 MHz −15 520 MHz VDD = 12.5 Vdc 0 450 MHz −20 0 0.05 0.10 0.15 Pin, INPUT POWER (WATTS) Figure 2. Output Power versus Input Power 0.20 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 5 Figure 3. Input Return Loss versus Output Power MRF1513NT1 RF Device Data Freescale Semiconductor 3 TYPICAL CHARACTERISTICS, 450 - 520 MHz 70 16 450 MHz 15 470 MHz Eff, DRAIN EFFICIENCY (%) 520 MHz 500 MHz GAIN (dB) 14 13 12 11 60 450 MHz 50 500 MHz 40 30 VDD = 12.5 Vdc VDD = 12.5 Vdc 20 10 0 1 2 3 Pout, OUTPUT POWER (WATTS) 0 5 4 Figure 4. Gain versus Output Power 3 2 Pout, OUTPUT POWER (WATTS) 4 5 70 450 MHz 5 Eff, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 1 Figure 5. Drain Efficiency versus Output Power 6 470 MHz 500 MHz 4 520 MHz 3 2 0 100 200 300 400 IDQ, BIASING CURRENT (mA) 65 520 MHz 60 470 MHz 450 MHz 50 VDD = 12.5 Vdc Pin = 20.3 dBm 40 600 500 500 MHz 55 45 VDD = 12.5 Vdc Pin = 20.3 dBm 1 0 100 Figure 6. Output Power versus Biasing Current 300 400 200 IDQ, BIASING CURRENT (mA) 600 500 Figure 7. Drain Efficiency versus Biasing Current 5 80 4 Eff, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 470 MHz 520 MHz 3 450 MHz 520 MHz 2 470 MHz 500 MHz Pin = 20.3 dBm IDQ = 50 mA 1 470 MHz 70 520 MHz 60 450 MHz 50 500 MHz 40 Pin = 20.3 dBm IDQ = 50 mA 30 0 20 8 9 10 11 12 13 14 15 VDD, SUPPLY VOLTAGE (VOLTS) Figure 8. Output Power versus Supply Voltage 16 8 9 10 11 12 13 14 15 16 VDD, SUPPLY VOLTAGE (VOLTS) Figure 9. Drain Efficiency versus Supply Voltage MRF1513NT1 4 RF Device Data Freescale Semiconductor B2 VGG C9 + C8 C7 B1 R4 C15 C16 R3 C14 + VDD C13 L1 C6 R2 Z7 Z8 Z9 N2 Z10 R1 N1 Z1 RF INPUT Z2 Z3 Z4 Z5 Z6 DUT C12 C10 RF OUTPUT C11 C1 C2 B1, B2 C1, C12 C2, C3, C4, C10, C11 C5, C6, C16 C7, C13 C8, C14 C9, C15 L1 N1, N2 R1 R2 C3 C4 C5 R3 R4 Z1 Z2 Z3 Z4 Z5 Z6, Z7 Z8 Z9 Z10 Board Short Ferrite Bead, Fair Rite Products #2743021446 330 pF, 100 mil Chip Capacitors 1 to 20 pF Trimmer Capacitors 120 pF, 100 mil Chip Capacitors 10 μF, 50 V Electrolytic Capacitors 1,200 pF, 100 mil Chip Capacitors 0.1 mF, 100 mil Chip Capacitors 55.5 nH, 5 Turn, Coilcraft Type N Flange Mounts 15 Ω Chip Resistor (0805) 1 kΩ, 1/8 W Resistor 15 Ω Chip Resistor (0805) 33 kΩ, 1/8 W Resistor 0.253″ x 0.080″ Microstrip 0.958″ x 0.080″ Microstrip 0.247″ x 0.080″ Microstrip 0.193″ x 0.080″ Microstrip 0.132″ x 0.080″ Microstrip 0.260″ x 0.223″ Microstrip 0.494″ x 0.080″ Microstrip 0.941″ x 0.080″ Microstrip 0.452″ x 0.080″ Microstrip Glass Teflon®, 31 mils, 2 oz. Copper Figure 10. 400 - 470 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 400 - 470 MHz 5 0 VDD = 12.5 Vdc 440 MHz 4 470 MHz 3 2 1 IRL, INPUT RETURN LOSS (dB) Pout , OUTPUT POWER (WATTS) 400 MHz −5 440 MHz −10 400 MHz −15 VDD = 12.5 Vdc 470 MHz 0 −20 0 0.02 0.04 0.06 0.08 Pin, INPUT POWER (WATTS) 0.10 Figure 11. Output Power versus Input Power 0.12 0 1 3 2 Pout, OUTPUT POWER (WATTS) 4 5 Figure 12. Input Return Loss versus Output Power MRF1513NT1 RF Device Data Freescale Semiconductor 5 TYPICAL CHARACTERISTICS, 400 - 470 MHz 70 18 470 MHz 60 470 MHz 17 16 GAIN (dB) Eff, DRAIN EFFICIENCY (%) 400 MHz 440 MHz 15 14 13 400 MHz 50 440 MHz 40 30 20 VDD = 12.5 Vdc 10 VDD = 12.5 Vdc 12 0 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 0 5 Figure 13. Gain versus Output Power 1 3 2 Pout, OUTPUT POWER (WATTS) 4 5 Figure 14. Drain Efficiency versus Output Power 70 6 5 Eff, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 400 MHz 440 MHz 4 470 MHz 3 VDD = 12.5 Vdc Pin = 18.7 dBm 2 65 470 MHz 60 440 MHz 55 400 MHz 50 VDD = 12.5 Vdc Pin = 18.7 dBm 45 1 40 0 100 200 300 400 IDQ, BIASING CURRENT (mA) 500 0 600 100 Figure 15. Output Power versus Biasing Current 600 500 Figure 16. Drain Efficiency versus Biasing Current 5 80 400 MHz 4 440 MHz Eff, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 400 200 300 IDQ, BIASING CURRENT (mA) 470 MHz 3 2 Pin = 18.7 dBm IDQ = 50 mA 1 70 470 MHz 60 440 MHz 400 MHz 50 40 Pin = 18.7 dBm IDQ = 50 mA 30 20 0 8 9 10 11 12 13 14 VDD, SUPPLY VOLTAGE (VOLTS) Figure 17. Output Power versus Supply Voltage 15 16 8 9 10 11 12 13 14 15 16 VDD, SUPPLY VOLTAGE (VOLTS) Figure 18. Drain Efficiency versus Supply Voltage MRF1513NT1 6 RF Device Data Freescale Semiconductor B2 VGG C9 + C8 C7 B1 R4 C16 C17 R3 + C15 VDD C14 L4 C6 RF OUTPUT Z10 C13 R2 Z6 RF INPUT N1 Z7 L2 Z8 L3 Z9 R1 L1 Z1 Z2 Z3 Z4 Z5 DUT N2 C10 C1 C3 C4 C11 C12 C5 C2 B1, B2 L4 N1, N2 R1 R2 R3 R4 Z1 Z2 Z3 Z4 Z5, Z6 Z7 Z8 Z9 Z10 Board Short Ferrite Beads, Fair Rite Products #2743021446 330 pF, 100 mil Chip Capacitors 0 to 20 pF Trimmer Capacitors 12 pF, 100 mil Chip Capacitor 130 pF, 100 mil Chip Capacitor 120 pF, 100 mil Chip Capacitors 10 μF, 50 V Electrolytic Capacitors 1,000 pF, 100 mil Chip Capacitors 0.1 μF, 100 mil Chip Capacitors 18 pF, 100 mil Chip Capacitor 26 nH, 4 Turn, Coilcraft 8 nH, 3 Turn, Coilcraft 55.5 nH, 5 Turn, Coilcraft C1, C13 C2, C4, C10, C12 C3 C5 C6, C17 C7, C14 C8, C15 C9, C16 C11 L1 L2 L3 33 nH, 5 Turn, Coilcraft Type N Flange Mounts 15 W Chip Resistor (0805) 56 W, 1/8 W Chip Resistor 10 W, 1/8 W Chip Resistor 33 kW, 1/8 W Chip Resistor 0.115″ x 0.080″ Microstrip 0.230″ x 0.080″ Microstrip 1.034″ x 0.080″ Microstrip 0.202″ x 0.080″ Microstrip 0.260″ x 0.223″ Microstrip 1.088″ x 0.080″ Microstrip 0.149″ x 0.080″ Microstrip 0.171″ x 0.080″ Microstrip 0.095″ x 0.080″ Microstrip Glass Teflon®, 31 mils, 2 oz. Copper Figure 19. 135 - 175 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 135 - 175 MHz 0 4 175 MHz 3 135 MHz IRL, INPUT RETURN LOSS (dB) Pout , OUTPUT POWER (WATTS) 5 155 MHz 2 1 −5 135 MHz −10 155 MHz 175 MHz −15 VDD = 12.5 Vdc VDD = 12.5 Vdc −20 0 0 0.05 0.10 0.15 Pin, INPUT POWER (WATTS) Figure 20. Output Power versus Input Power 0.20 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 5 Figure 21. Input Return Loss versus Output Power MRF1513NT1 RF Device Data Freescale Semiconductor 7 TYPICAL CHARACTERISTICS, 135 - 175 MHz 18 70 135 MHz Eff, DRAIN EFFICIENCY (%) 175 MHz 16 GAIN (dB) 135 MHz 60 155 MHz 17 15 14 13 155 MHz 50 175 MHz 40 30 20 VDD = 12.5 Vdc 10 VDD = 12.5 Vdc 0 12 0 1 2 3 Pout, OUTPUT POWER (WATTS) 4 5 Figure 22. Gain versus Output Power 4 5 80 Eff, DRAIN EFFICIENCY (%) 175 MHz 5 155 MHz 4 135 MHz 3 VDD = 12.5 Vdc Pin = 19.5 dBm 75 175 MHz 70 155 MHz 65 135 MHz 60 VDD = 12.5 Vdc Pin = 19.5 dBm 55 50 2 100 0 500 200 300 400 IDQ, BIASING CURRENT (mA) 0 600 200 300 400 IDQ, BIASING CURRENT (mA) 100 Figure 24. Output Power versus Biasing Current 600 500 Figure 25. Drain Efficiency versus Biasing Current 5 80 4 Eff, DRAIN EFFICIENCY (%) Pout , OUTPUT POWER (WATTS) 3 2 Pout, OUTPUT POWER (WATTS) Figure 23. Drain Efficiency versus Output Power 6 Pout , OUTPUT POWER (WATTS) 1 0 3 175 MHz 2 155 MHz 135 MHz Pin = 19.5 dBm IDQ = 50 mA 1 70 135 MHz 175 MHz 60 155 MHz 50 40 Pin = 19.5 dBm IDQ = 50 mA 30 20 0 8 9 10 11 12 13 14 VDD, SUPPLY VOLTAGE (VOLTS) Figure 26. Output Power versus Supply Voltage 15 16 8 9 10 11 12 13 14 15 16 VDD, SUPPLY VOLTAGE (VOLTS) Figure 27. Drain Efficiency versus Supply Voltage MRF1513NT1 8 RF Device Data Freescale Semiconductor TYPICAL CHARACTERISTICS MTTF FACTOR (HOURS X AMPS2) 108 107 106 90 100 110 120 130 140 150 160 170 180 190 200 210 TJ, JUNCTION TEMPERATURE (°C) This above graph displays calculated MTTF in hours x ampere2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by ID2 for MTTF in a particular application. Figure 28. MTTF Factor versus Junction Temperature MRF1513NT1 RF Device Data Freescale Semiconductor 9 Zin 470 Zin 450 ZOL* f = 520 MHz 470 f = 520 MHz f = 400 MHz Zin 135 ZOL* 135 ZOL* Zo = 10 Ω f = 175 MHz f = 400 MHz 450 Zo = 10 Ω f = 175 MHz VDD = 12.5 V, IDQ = 50 mA, Pout = 3 W VDD = 12.5 V, IDQ = 50 mA, Pout = 3 W Zin VDD = 12.5 V, IDQ = 50 mA, Pout = 3 W f MHz Zin Ω ZOL* Ω f MHz Zin Ω ZOL* Ω f MHz 450 4.64 +j5.82 13.11 +j2.15 400 4.72 +j4.38 12.57 +j1.88 135 16.55 +j1.82 22.01 +j10.32 470 5.42 +j6.34 12.16 +j3.26 440 4.88 +j6.34 11.21 +j5.87 155 15.59 +j5.38 22.03 +j8.07 500 5.96 +j5.45 11.03 +j5.42 470 3.22 +j5.24 9.82 +j8.63 175 15.55 +j9.43 22.08 +j6.85 520 4.28 +j4.94 10.99 +j7.18 = Complex conjugate of source impedance with parallel 15 Ω resistor and 120 pF capacitor in series with gate. (See Figure 1). Zin ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. = Complex conjugate of source impedance with parallel 15 Ω resistor and 130 pF capacitor in series with gate. (See Figure 10). ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. Zin Zin Ω ZOL* Ω = Complex conjugate of source impedance with parallel 15 Ω resistor and 130 pF capacitor in series with gate. (See Figure 19). ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability. Input Matching Network Output Matching Network Device Under Test Z in Z * OL Figure 29. Series Equivalent Input and Output Impedance MRF1513NT1 10 RF Device Data Freescale Semiconductor Table 5. Common Source Scattering Parameters (VDD = 12.5 Vdc) IDQ = 50 mA S11 S21 S12 S22 f MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.93 - 94 22.09 125 0.044 33 0.77 - 81 100 0.81 - 131 12.78 101 0.052 6 0.61 - 115 200 0.76 - 153 6.31 81 0.047 - 10 0.59 - 135 300 0.76 - 160 3.92 69 0.044 - 19 0.64 - 142 400 0.77 - 164 2.74 60 0.040 - 26 0.70 - 147 500 0.79 - 167 1.99 54 0.036 - 31 0.75 - 151 600 0.80 - 169 1.55 48 0.034 - 37 0.80 - 155 700 0.81 - 171 1.25 44 0.028 - 40 0.82 - 158 800 0.82 - 172 1.02 38 0.027 - 42 0.86 - 161 900 0.83 - 173 0.85 35 0.017 - 42 0.88 - 163 1000 0.84 - 175 0.70 29 0.018 - 49 0.91 - 166 IDQ = 500 mA S11 S21 S12 S22 f MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.84 - 127 32.57 112 0.025 17 0.64 - 130 100 0.80 - 152 17.23 97 0.025 13 0.64 - 153 200 0.78 - 166 8.62 85 0.025 -9 0.65 - 163 300 0.78 - 171 5.58 79 0.023 -9 0.67 - 166 400 0.78 - 173 4.08 72 0.022 -9 0.69 - 166 500 0.78 - 175 3.14 68 0.020 - 10 0.71 - 167 600 0.79 - 176 2.55 63 0.022 - 15 0.74 - 168 700 0.79 - 177 2.14 60 0.019 - 20 0.76 - 168 800 0.80 - 178 1.80 54 0.018 - 31 0.79 - 170 900 0.81 - 178 1.54 51 0.015 - 25 0.80 - 170 1000 0.82 - 179 1.31 46 0.012 - 36 0.81 - 172 IDQ = 1 A S11 S21 S12 S22 f MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.84 - 129 32.57 111 0.023 24 0.61 - 137 100 0.80 - 153 17.04 97 0.024 13 0.64 - 156 200 0.78 - 167 8.52 85 0.023 5 0.65 - 165 300 0.77 - 172 5.53 79 0.020 -7 0.67 - 167 400 0.77 - 174 4.06 73 0.020 - 11 0.69 - 167 500 0.78 - 175 3.13 69 0.021 -9 0.72 - 167 600 0.78 - 177 2.54 64 0.017 - 26 0.74 - 168 700 0.78 - 177 2.13 60 0.017 - 14 0.75 - 168 800 0.79 - 178 1.81 55 0.015 - 23 0.78 - 170 900 0.80 - 178 1.54 51 0.013 - 31 0.79 - 170 1000 0.80 - 179 1.30 46 0.011 - 17 0.80 - 172 MRF1513NT1 RF Device Data Freescale Semiconductor 11 APPLICATIONS INFORMATION DESIGN CONSIDERATIONS This device is a common - source, RF power, N - Channel enhancement mode, Lateral Metal - Oxide Semiconductor Field - Effect Transistor (MOSFET). Freescale Application Note AN211A, “FETs in Theory and Practice”, is suggested reading for those not familiar with the construction and characteristics of FETs. This surface mount packaged device was designed primarily for VHF and UHF portable power amplifier applications. Manufacturability is improved by utilizing the tape and reel capability for fully automated pick and placement of parts. However, care should be taken in the design process to insure proper heat sinking of the device. The major advantages of Lateral RF power MOSFETs include high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate - to - drain (Cgd), and gate - to - source (Cgs). The PN junction formed during fabrication of the RF MOSFET results in a junction capacitance from drain - to - source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the inter - terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF applications. Drain Cgd Gate Cds Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd Cgs Source DRAIN CHARACTERISTICS One critical figure of merit for a FET is its static resistance in the full - on condition. This on - resistance, RDS(on), occurs in the linear region of the output characteristic and is specified at a specific gate - source voltage and drain current. The drain - source voltage under these conditions is termed VDS(on). For MOSFETs, VDS(on) has a positive temperature coefficient at high temperatures because it contributes to the power dissipation within the device. BVDSS values for this device are higher than normally required for typical applications. Measurement of BVDSS is not recommended and may result in possible damage to the device. GATE CHARACTERISTICS The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The DC input resistance is very high - on the order of 109 Ω — resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage to the gate greater than the gate - to - source threshold voltage, VGS(th). Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination — The gates of these devices are essentially capacitors. Circuits that leave the gate open - circuited or floating should be avoided. These conditions can result in turn - on of the devices due to voltage build - up on the input capacitor due to leakage currents or pickup. Gate Protection — These devices do not have an internal monolithic zener diode from gate - to - source. If gate protection is required, an external zener diode is recommended. Using a resistor to keep the gate - to - source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate - drain capacitance. If the gate - to - source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate - threshold voltage and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent drain current (IDQ), whose value is application dependent. This device was characterized at IDQ = 50 mA, which is the suggested value of bias current for typical applications. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL Power output of this device may be controlled to some degree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. This characteristic is very dependent on frequency and load line. MRF1513NT1 12 RF Device Data Freescale Semiconductor MOUNTING The specified maximum thermal resistance of 4°C/W assumes a majority of the 0.065″ x 0.180″ source contact on the back side of the package is in good contact with an appropriate heat sink. As with all RF power devices, the goal of the thermal design should be to minimize the temperature at the back side of the package. Refer to Freescale Application Note AN4005/D, “Thermal Management and Mounting Method for the PLD - 1.5 RF Power Surface Mount Package” for additional information. AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for this device. For examples see Freescale Application Note AN721, “Impedance Matching Networks Applied to RF Power Transistors.” Large - signal impedances are provided, and will yield a good first pass approximation. Since RF power MOSFETs are triode devices, they are not unilateral. This coupled with the very high gain of this device yields a device capable of self oscillation. Stability may be achieved by techniques such as drain loading, input shunt resistive loading, or output to input feedback. The RF test fixture implements a parallel resistor and capacitor in series with the gate, and has a load line selected for a higher efficiency, lower gain, and more stable operating region. Two - port stability analysis with this device’s S - parameters provides a useful tool for selection of loading or feedback circuitry to assure stable operation. See Freescale Application Note AN215A, “RF Small - Signal Design Using Two - Port Parameters” for a discussion of two port network theory and stability. MRF1513NT1 RF Device Data Freescale Semiconductor 13 PACKAGE DIMENSIONS 0.146 3.71 A F 0.095 2.41 3 B D 1 2 0.35 (0.89) X 45_" 5 _ N K ÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ 4 2 1 3 S C Y Y E NOTES: 1. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1984. 2. CONTROLLING DIMENSION: INCH 3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W, AND X. STYLE 1: PIN 1. 2. 3. 4. DRAIN GATE SOURCE SOURCE ZONE X VIEW Y - Y mm SOLDER FOOTPRINT P U H G inches 10_DRAFT Q ZONE W 0.115 2.92 L 0.020 0.51 4 ZONE V R 0.115 2.92 CASE 466 - 03 ISSUE D PLD - 1.5 PLASTIC DIM A B C D E F G H J K L N P Q R S U ZONE V ZONE W ZONE X INCHES MIN MAX 0.255 0.265 0.225 0.235 0.065 0.072 0.130 0.150 0.021 0.026 0.026 0.044 0.050 0.070 0.045 0.063 0.160 0.180 0.273 0.285 0.245 0.255 0.230 0.240 0.000 0.008 0.055 0.063 0.200 0.210 0.006 0.012 0.006 0.012 0.000 0.021 0.000 0.010 0.000 0.010 MILLIMETERS MIN MAX 6.48 6.73 5.72 5.97 1.65 1.83 3.30 3.81 0.53 0.66 0.66 1.12 1.27 1.78 1.14 1.60 4.06 4.57 6.93 7.24 6.22 6.48 5.84 6.10 0.00 0.20 1.40 1.60 5.08 5.33 0.15 0.31 0.15 0.31 0.00 0.53 0.00 0.25 0.00 0.25 MRF1513NT1 14 RF Device Data Freescale Semiconductor PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes • AN211A: Field Effect Transistors in Theory and Practice • AN215A: RF Small - Signal Design Using Two - Port Parameters • AN721: Impedance Matching Networks Applied to RF Power Transistors • AN4005: Thermal Management and Mounting Method for the PLD 1.5 RF Power Surface Mount Package Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices REVISION HISTORY The following table summarizes revisions to this document. Revision Date 10 Feb. 2008 Description • Changed DC Bias IDQ value from 150 to 50 to match Functional Test IDQ specification, p. 12 • Added Product Documentation and Revision History, p. 15 11 June 2008 • Corrected specified performance values for power gain and efficiency on p. 1 to match typical performance values in the functional test table on p. 2 MRF1513NT1 RF Device Data Freescale Semiconductor 15 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. 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