a Single Supply, Rail to Rail Low Power FET-Input Op Amp AD820 CONNECTION DIAGRAMS FEATURES True Single Supply Operation Output Swings Rail-to-Rail Input Voltage Range Extends Below Ground Single Supply Capability from +3 V to +36 V Dual Supply Capability from ⴞ1.5 V to ⴞ18 V Excellent Load Drive Capacitive Load Drive Up to 350 pF Minimum Output Current of 15 mA Excellent AC Performance for Low Power 800 A Max Quiescent Current Unity Gain Bandwidth: 1.8 MHz Slew Rate of 3.0 V/s Excellent DC Performance 800 V Max Input Offset Voltage 1 V/ⴗC Typ Offset Voltage Drift 25 pA Max Input Bias Current Low Noise 13 nV/√Hz @ 10 kHz 8-Lead Plastic Mini-DIP AD820 8-Lead SOIC AD820 NULL 1 8 NC NC 1 –IN 2 7 +VS –IN 2 7 +VS +IN 3 6 VOUT +IN 3 6 VOUT 5 NULL –VS 4 –VS 4 TOP VIEW (Not to Scale) TOP VIEW (Not to Scale) 8 NC 5 NC NC = NO CONNECT allowing the AD820 to accommodate input signals below ground in the single supply mode. Output voltage swing extends to within 10 mV of each rail providing the maximum output dynamic range. PRODUCT DESCRIPTION Offset voltage of 800 µV max, offset voltage drift of 1 µV/°C, typ input bias currents below 25 pA and low input voltage noise provide dc precision with source impedances up to a Gigaohm. 1.8 MHz unity gain bandwidth, –93 dB THD at 10 kHz and 3 V/µs slew rate are provided for a low supply current of 800 µA. The AD820 drives up to 350 pF of direct capacitive load and provides a minimum output current of 15 mA. This allows the amplifier to handle a wide range of load conditions. This combination of ac and dc performance, plus the outstanding load drive capability, results in an exceptionally versatile amplifier for the single supply user. The AD820 is a precision, low power FET input op amp that can operate from a single supply of +3.0 V to 36 V, or dual supplies of ± 1.5 V to ± 18 V. It has true single supply capability with an input voltage range extending below the negative rail, The AD820 is available in three performance grades. The A and B grades are rated over the industrial temperature range of –40°C to +85°C. There is 3 V grade—the AD820A-3V, rated over the industrial temperature range. APPLICATIONS Battery Powered Precision Instrumentation Photodiode Preamps Active Filters 12- to 14-Bit Data Acquisition Systems Medical Instrumentation Low Power References and Regulators The AD820 is offered in two varieties of 8-lead package: plastic DIP, and surface mount (SOIC). 50 45 NUMBER OF UNITS 40 35 30 25 20 15 10 5 0 0 1 2 3 4 5 6 7 INPUT BIAS CURRENT – pA 8 9 10 Figure 1. Typical Distribution of Input Bias Current Figure 2. Gain of +2 Amplifier; VS = +5, 0, VIN = 2.5 V Sine Centered at 1.25 Volts REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 AD820–SPECIFICATIONS (V = 0, 5 volts @ T = +25ⴗC, V S Parameter DC PERFORMANCE Initial Offset Max Offset over Temperature Offset Drift Input Bias Current at T MAX Input Offset Current at T MAX Open-Loop Gain Conditions VO = 0.2 V to 4 V RL = 100k RL = 10k TMIN to TMAX RL = 1k TMIN to TMAX DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% INPUT CHARACTERISTICS Common-Mode Voltage Range1 TMIN to TMAX CMRR TMIN to TMAX Input Impedance Differential Common Mode OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX Operating Output Current TMIN to TMAX Short Circuit Current Capacitive Load Drive POWER SUPPLY Quiescent Current Power Supply Rejection TMIN to TMAX Min 400 400 80 80 15 10 RL = 10k to 2.5 V VO = 0.25 V to 4.75 V VO p-p = 4.5 V VO = 0.2 V to 4.5 V VCM = 0 V to +2 V CM = 0 V, VOUT = 0.2 V unless otherwise noted) AD820A Typ Max 0.1 0.5 2 2 0.5 2 0.5 VO = 0 V to 4 V TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz A –0.2 –0.2 66 66 Min 0.8 1.2 0.1 0.5 2 2 0.5 2 0.5 25 5 20 1000 500 400 80 80 15 10 150 30 1000 V/mV V/mV V/mV V/mV V/mV V/mV 150 30 µV p-p nV/√Hz nV/√Hz nV/√Hz nV/√Hz 18 0.8 18 0.8 fA p-p fA/√Hz –93 –93 dB 1.8 210 3 1.8 210 3 MHz kHz V/µs 1.4 1.8 1.4 1.8 µs µs 4 4 80 5 ISOURCE = 20 µA 10 ISINK = 2 mA 40 ISOURCE = 2 mA 80 ISINK = 15 mA 300 ISOURCE = 15 mA 800 –0.2 –0.2 72 66 4 4 80 7 10 14 20 55 80 110 160 500 1000 1500 1900 5 10 40 80 300 800 7 10 14 20 55 80 110 160 500 1000 1500 1900 mV mV mV mV mV mV mV mV mV mV mV mV mA mA mA pF 800 µA dB dB 15 12 25 350 620 80 25 350 800 66 66 620 80 V V dB dB Ω储pF Ω储pF 1013 储0.5 1013 储2.8 15 12 –2– 10 2.5 10 mV mV µV/°C pA nA pA nA 2 25 21 16 13 ISINK = 20 µA 70 70 0.4 0.9 Units 2 25 21 16 13 10 13储0.5 10 13储2.8 TMIN to TMAX VS+ = 5 V to 15 V AD820B Typ Max REV. B AD820 (VS = +5 volts @ TA = +25ⴗC, VCM = 0 V, VOUT = 0 V unless otherwise noted) Parameter DC PERFORMANCE Initial Offset Max Offset over Temperature Offset Drift Input Bias Current at T MAX Input Offset Current at T MAX Open-Loop Gain Conditions VO = 4 V to –4 V RL = 100k RL = 10k TMIN to TMAX RL = 1k TMIN to TMAX DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% INPUT CHARACTERISTICS Common-Mode Voltage Range1 TMIN to TMAX CMRR TMIN to TMAX Input Impedance Differential Common Mode OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX Operating Output Current TMIN to TMAX Short Circuit Current Capacitive Load Drive POWER SUPPLY Quiescent Current Power Supply Rejection TMIN to TMAX REV. B 400 400 80 80 20 10 RL = 10k VO = ± 4.5 V VO p-p = 9 V VO = 0 V to ± 4.5 V VCM = –5 V to +2 V AD820A Typ Max 0.1 0.5 2 2 0.5 2 0.5 VCM = –5 V to 4 V TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz Min –5.2 –5.2 66 66 Min 0.8 1.5 0.3 0.5 2 2 0.5 2 0.5 25 5 20 1000 400 400 80 80 20 10 150 30 1000 V/mV V/mV V/mV V/mV V/mV V/mV 150 30 µV p-p nV/√Hz nV/√Hz nV/√Hz nV/√Hz 18 0.8 18 0.8 fA p-p fA/√Hz –93 –93 dB 1.9 105 3 1.8 105 3 MHz kHz V/µs 1.4 1.8 1.4 1.8 µs µs 4 4 80 5 ISOURCE = 20 µA 10 ISINK = 2 mA 40 ISOURCE = 2 mA 80 ISINK = 15 mA 300 ISOURCE = 15 mA 800 –5.2 –5.2 72 66 4 4 80 7 10 14 20 55 80 110 160 500 1000 1500 1900 5 10 40 80 300 800 7 10 14 20 55 80 110 160 500 1000 1500 1900 mV mV mV mV mV mV mV mV mV mV mV mV mA mA mA pF 800 µA dB dB 15 12 30 350 650 80 30 350 800 70 70 620 80 V V dB dB Ω储pF Ω储pF 1013 储0.5 1013 储2.8 15 12 –3– 10 2.5 10 mV mV µV/°C pA nA pA nA 2 25 21 16 13 ISINK = 20 µA 70 70 0.4 1 Units 2 25 21 16 13 10 13储0.5 10 13储2.8 TMIN to TMAX VS+ = 5 V to 15 V AD820B Typ Max AD820–SPECIFICATIONS (V = ⴞ15 volts @ T = +25ⴗC, V S Parameter DC PERFORMANCE Initial Offset Max Offset over Temperature Offset Drift Input Bias Current at T MAX Input Offset Current at T MAX Open-Loop Gain Conditions VO = +10 V to –10 V RL = 100k RL = 10k TMIN to TMAX RL = 1k TMIN to TMAX OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX Operating Output Current TMIN to TMAX Short Circuit Current Capacitive Load Drive POWER SUPPLY Quiescent Current Power Supply Rejection TMIN to TMAX Min CM AD820A Typ 0.4 0.5 2 2 40 0.5 2 0.5 VCM = 0 V VCM = –10 V VCM = 0 V TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% INPUT CHARACTERISTICS Common-Mode Voltage Range1 TMIN to TMAX CMRR TMIN to TMAX Input Impedance Differential Common Mode A 500 500 100 100 30 20 = 0 V, VOUT = 0 V unless otherwise noted) Max Min 2 3 0.3 0.5 2 2 40 0.5 2 0.5 25 5 20 2000 500 500 100 100 30 20 500 45 AD820B Typ Max 1.0 2 10 2.5 10 2000 Units mV mV µV/°C pA pA nA pA nA V/mV V/mV V/mV V/mV V/mV V/mV 500 45 2 25 21 16 13 2 25 21 16 13 µV p-p nV/√Hz nV/√Hz nV/√Hz nV/√Hz 18 0.8 18 0.8 fA p-p fA/√Hz RL = 10k VO = ± 10 V –85 –85 dB VO p-p = 20 V 1.9 45 3 1.9 45 3 MHz kHz V/µs 4.1 4.5 4.1 4.5 µs µs VO = 0 V to ± 10 V VCM = –15 V to 12 V –15.2 –15.2 70 70 14 14 80 –15.2 –15.2 74 74 10 13储0.5 10 13储2.8 ISINK = 20 µA 5 ISOURCE = 20 µA 10 ISINK = 2 mA 40 ISOURCE = 2 mA 80 ISINK = 15 mA 300 ISOURCE = 15 mA 800 7 10 14 20 55 80 110 160 500 1000 1500 1900 5 10 40 80 300 800 –4– 700 80 7 10 14 20 55 80 110 160 500 1000 1500 1900 mV mV mV mV mV mV mV mV mV mV mV mV mA mA mA 900 µA dB dB 45 350 900 70 70 700 80 V V dB dB Ω储pF Ω储pF 20 15 45 350 70 70 90 1013 储0.5 1013 储2.8 20 15 TMIN to TMAX VS+ = 5 V to 15 V 14 14 REV. B AD820 (VS = 0, 3 volts @ TA = +25ⴗC, VCM = 0 V, VOUT = 0.2 V unless otherwise noted) Parameter DC PERFORMANCE Initial Offset Max Offset over Temperature Offset Drift Input Bias Current at T MAX Input Offset Current at T MAX Open-Loop Gain Conditions Min TMIN to TMAX RL = 10k TMIN to TMAX RL = 1k TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% INPUT CHARACTERISTICS Common-Mode Voltage Range1 TMIN to TMAX CMRR TMIN to TMAX Input Impedance Differential Common Mode OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX VOL–VEE TMIN to TMAX VCC–VOH TMIN to TMAX Operating Output Current TMIN to TMAX Short Circuit Current TMIN to TMAX Capacitive Load Drive POWER SUPPLY Quiescent Current Power Supply Rejection TMIN to TMAX REV. B 0.2 0.5 1 2 0.5 2 0.5 VCM = 0 V to +2 V VO = 0.2 V to 2 V RL = 100k AD820A-3V Typ 300 400 60 80 10 8 Max Units 1 1.5 mV mV µV/°C pA nA pA nA 25 5 20 1000 V/mV V/mV V/mV V/mV V/mV V/mV 150 30 2 25 21 16 13 µV p-p nV/√Hz nV/√Hz nV/√Hz nV/√Hz 18 0.8 fA p-p fA/√Hz –92 dB VO p-p = 2.5 V 1.5 240 3 MHz kHz V/µs VO = 0.2 V to 2.5 V 1 1.4 µs µs RL = 10k to 1.5 V VO = ± 1.25 V VCM = 0 V to +1 V –0.2 –0.2 60 60 2 2 74 Ω储pF Ω储pF 1013储0.5 1013储2.8 ISINK = 20 µA 5 ISOURCE = 20 µA 10 ISINK = 2 mA 40 ISOURCE = 2 mA 80 ISINK = 10 mA 200 ISOURCE = 10 mA 500 15 12 18 15 7 10 14 20 55 80 110 160 400 400 1000 1000 mV mV mV mV mV mV mV mV mV mV mV mV mA mA mA mA pF 800 µA dB dB 25 350 TMIN to TMAX VS+ = 3 V to 15 V –5– 70 70 620 80 V V dB dB AD820–SPECIFICATIONS NOTES 1 This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+ VS – 1 V) to +VS . Common-mode error voltage is typically less than 5 mV with the common-mode voltage set at 1 volt below the positive supply. 2 VOL–VEE is defined as the difference between the lowest possible output voltage (V OL) and the minus voltage supply rail (V EE). VCC–VOH is defined as the difference between the highest possible output voltage (V OH) and the positive supply voltage (V CC). Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS 1 NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 8-Lead Plastic DIP Package: θ JA = 90°C/Watt 8-Lead SOIC Package: θ JA = 160°C/Watt Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 Plastic DIP (N) . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Watts SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 Watts Input Voltage . . . . . . . . . . . . . . (+V S + 0.2 V) to – (20 V + VS) Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 30 V Storage Temperature Range (N) . . . . . . . . . –65°C to +125°C Storage Temperature Range (R) . . . . . . . . . –65°C to +150°C Operating Temperature Range AD820A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+260°C ORDERING GUIDE Model Temperature Range Package Description Package Options AD820AN AD820BN AD820AR AD820BR AD820AR-3V AD820AN-3V –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C 8-Lead Plastic Mini-DIP 8-Lead Plastic Mini-DIP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead Plastic Mini-DIP N-8 N-8 R-8 R-8 R-8 N-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD820 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –6– WARNING! ESD SENSITIVE DEVICE REV. B Typical Characteristics–AD820 50 5 VS = 0V, 5V INPUT BIAS CURRENT – pA NUMBER OF UNITS 40 30 20 10 0 –0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 OFFSET VOLTAGE – mV 0.3 0.4 VS = 0V, +5V AND 65V VS = 65V –5 0.5 –5 Figure 3. Typical Distribution of Offset Voltage (248 Units) –4 –3 –2 –1 0 1 2 3 COMMON-MODE VOLTAGE – Volts 4 5 Figure 6. Input Bias Current vs. Common-Mode Voltage; VS = +5 V, 0 V and VS = ± 5 V 48 1k VS = 65V VS = 615V INPUT BIAS CURRENT – pA 40 32 % IN BIN 0 24 16 100 10 1 8 0 –10 –8 –6 –4 –2 0 2 4 6 8 0.1 –16 10 –12 –8 –4 0 4 8 COMMON-MODE VOLTAGE – Volts OFFSET VOLTAGE DRIFT – mV/8C Figure 4. Typical Distribution of Offset Voltage Drift (120 Units) 12 16 Figure 7. Input Bias Current vs. Common-Mode Voltage; V S = ±15 V 50 100k 45 10k INPUT BIAS CURRENT – pA NUMBER OF UNITS 40 35 30 25 20 15 10 1k 100 10 1 5 0 0 1 2 3 4 5 6 7 INPUT BIAS CURRENT – pA 8 9 0.1 20 10 Figure 5. Typical Distribution of Input Bias Current (213 Units) REV. B 40 60 80 100 TEMPERATURE – 8C 120 140 Figure 8. Input Bias Current vs. Temperature; VS = 5 V, VCM = 0 –7– AD820–Typical Characteristics 40 10M POS RAIL RL = 2kV INPUT VOLTAGE – mV OPEN-LOOP GAIN –V/V 20 VS = 615V 1M VS = 0V, 5V VS = 0V, 3V 100k RL = 20kV NEG RAIL POS RAIL 0 POS RAIL –20 NEG RAIL RL = 100kV NEG RAIL –40 10k 100 1k 10k LOAD RESISTANCE – V 0 100k 120 180 240 300 OUTPUT VOLTAGE FROM VOLTAGE RAILS – mV Figure 9. Open-Loop Gain vs. Load Resistance Figure 12. Input Error Voltage with Output Voltage within 300 mV of Either Supply Rail for Various Resistive Loads; VS = ± 5 V 10M 1k INPUT VOLTAGE NOISE – nV/ Hz OPEN-LOOP GAIN – V/V 60 VS = 615V RL = 100kV 1M VS = 0V, 5V VS = 615V RL = 10kV VS = 0V, 5V 100k VS = 615V RL = 600V 100 10 VS = 0V, 5V 10k –60 1 –40 –20 0 20 40 60 80 100 120 10 1 140 100 FREQUENCY – Hz TEMPERATURE – 8C Figure 10. Open-Loop Gain vs. Temperature 10k Figure 13. Input Voltage Noise vs. Frequency –40 300 –50 200 RL = 10kV ACL = –1 –60 100 RL = 10kV RL = 100kV THD – dB INPUT VOLTAGE – mV 1k 0 –100 –70 –80 –90 RL = 600V –200 VS = 0V, 3V; VOUT = 2.5V p-p VS = 615V; VOUT = 20V p-p VS = 65V; VOUT = 9V p-p –100 VS = 0V, 5V; VOUT = 4.5V p-p –300 –16 –12 –8 –4 0 4 8 OUTPUT VOLTAGE – Volts 12 –110 100 16 Figure 11. Input Error Voltage vs. Output Voltage for Resistive Loads 1k 10k FREQUENCY – Hz 100k Figure 14. Total Harmonic Distortion vs. Frequency –8– REV. B AD820 100 100 80 80 100 60 60 GAIN 40 40 20 20 RL = 2kV CL = 100pF 0 0 100 80 70 1k 10k 100k FREQUENCY – Hz 1M 50 40 30 20 –20 10M 0 10 Figure 15. Open-Loop Gain and Phase Margin vs. Frequency COMMON-MODE ERROR VOLTAGE – mV OUTPUT IMPEDANCE – V 100 10 1 0.1 10k 100k FREQUENCY – Hz 1M 10M 10M POSITIVE RAIL NEGATIVE RAIL 3 +258C 2 +1258C 1 –558C +1258C –558C 0 1 2 3 COMMON-MODE VOLTAGE FROM SUPPLY RAILS – Volts Figure 19. Absolute Common-Mode Error vs. CommonMode Voltage from Supply Rails (VS – V CM) OUTPUT SATURATION VOLTAGE – mV 1000 12 1% 8 4 0 0.1% 0.01% ERROR –4 1% –12 1.0 2.0 3.0 SETTLING TIME – ms 4.0 100 VS – VOH VOL – VS 10 0 0.001 5.0 Figure 17. Output Swing and Error vs. Settling Time 0.01 0.1 1 LOAD CURRENT – mA 10 100 Figure 20. Output Saturation Voltage vs Load Current - REV. B 1M 4 –1 16 OUTPUT SWING FROM 0 TO 6Volts 10k 100k FREQUENCY – Hz 0 1k Figure 16. Output Impedance vs. Frequency –16 0.0 1k 5 ACL = +1 VS = 615V –8 100 Figure 18. Common-Mode Rejection vs. Frequency 1k 0.01 100 VS = 615V VS = 0V, 5V AND VS = 0V, 3V 60 10 –20 10 PHASE MARGIN IN DEGREES OPEN-LOOP GAIN – dB PHASE COMMON-MODE REJECTION – dB 90 –9– AD820–Typical Characteristics AD820 1000 120 110 POWER SUPPLY REJECTION – dB OUTPUT SATURATION VOLTAGE – mV ISOURCE = 10mA ISINK = 10mA 100 ISOURCE = 1mA ISINK = 1mA ISOURCE = 10mA 10 ISINK = 10mA 90 80 70 60 +PSRR –PSRR 50 40 30 20 10 1 –60 –40 –20 0 20 40 60 80 TEMPERATURE – 8C 100 120 0 10 140 Figure 21. Output Saturation Voltage vs. Temperature 100 1k 10k 100k FREQUENCY – Hz 1M 10M Figure 24. Power Supply Rejection vs. Frequency 30 80 R1 = 2kV 70 25 VS = 615V OUTPUT VOLTAGE – Volts SHORT CIRCUIT CURRENT LIMIT – mA 100 60 50 –OUT VS = 615V 40 VS = 0V, 5V + 30 VS = 0V, 3V – – 20 VS = 0V, 5V 10 + + VS = 0V, 3V VS = 615V 20 15 10 5 VS = 0V, 5V VS = 0V ,3V 0 –60 –40 –20 0 20 40 60 80 TEMPERATURE – 8C 100 120 0 10k 140 Figure 22. Short Circuit Current Limit vs. Temperature 800 10M Figure 25. Large Signal Frequency Response T = +1258C 700 QUIESCENT CURRENT – mA 100k 1M FREQUENCY – Hz T = +258C 600 T = –558C 500 400 300 200 100 0 0 4 8 12 16 20 24 28 TOTAL SUPPLY VOLTAGE – Volts 30 36 Figure 23. Quiescent Current vs. Supply Voltage vs. Temperature –10– REV. B AD820 +VS 0.01mF 3 7 VIN AD820 6 2 4 0.01mF RL 100pF VOUT –VS Figure 26. Unity-Gain Follower Figure 29. Large Signal Response Unity Gain Follower; VS = ± 15 V, RL = 10 kΩ Figure 27. 20 V, 25 kHz Sine Input; Unity Gain Follower; RL = 600 Ω, VS = ± 15 V Figure 30. Small Signal Response Unity Gain Follower; VS = ± 15 V, RL = 10 kΩ GND GND Figure 28. V S = +5 V, 0 V; Unity Gain Follower Response to 0 V to 4 V Step REV. B Figure 31. VS = +5 V, 0 V; Unity Gain Follower Response to 0 V to 5 V Step –11– AD820 +VS 0.01mF 7 3 VIN 6 AD820 2 RL 4 100pF VOUT GND Figure 32. Unity-Gain Follower 10kV Figure 35. VS = +5 V, 0 V; Unity Gain Follower Response to 40 mV Step Centered 40 mV Above Ground 20kV 100 VIN VOUT +VS 0.01mF 2 7 AD820 3 6 RL 100pF 4 GND Figure 33. Gain of Two Inverter Figure 36. VS = +5 V, 0 V; Gain of Two Inverter Response to 20 mV Step, Centered 20 mV Below Ground GND GND Figure 34. VS = +5 V, 0 V; Gain of Two Inverter Response to 2.5 V Step Centered –1.25 V Below Ground Figure 37. VS = 3 V, 0 V; Gain of Two Inverter, VIN = 1.25 V, 25 kHz, Sine Wave Centered at –0.75 V, RL = 600 Ω –12– REV. B AD820 APPLICATION NOTES INPUT CHARACTERISTICS A current limiting resistor should be used in series with the input of the AD820 if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV, or if an input voltage will be applied to the AD820 when ± VS = 0. The amplifier will be damaged if left in that condition for more than 10 seconds. A 1 kΩ resistor allows the amplifier to withstand up to 10 volts of continuous overvoltage, and increases the input voltage noise by a negligible amount. In the AD820, n-channel JFETs are used to provide a low offset, low noise, high impedance input stage. Minimum input common-mode voltage extends from 0.2 V below –VS to 1 V less than +VS. Driving the input voltage closer to the positive rail will cause a loss of amplifier bandwidth (as can be seen by comparing the large signal responses shown in Figures 28 and 31) and increased common-mode voltage error as illustrated in Figure 19. Input voltages less than –VS are a completely different story. The amplifier can safely withstand input voltages 20 volts below the minus supply voltage as long as the total voltage from the positive supply to the input terminal is less than 36 volts. In addition, the input stage typically maintains picoamp level input currents across that input voltage range. Since the input stage uses n-channel JFETs, input current during normal operation is negative; the current flows out from the input terminals. If the input voltage is driven more positive than +VS – 0.4 V, the input current will reverse direction as internal device junctions become forward biased. This is illustrated in Figure 6. The AD820 is designed for 13 nV/√Hz wideband input voltage noise and maintains low noise performance to low frequencies (refer to Figure 13). This noise performance, along with the AD820’s low input current and current noise means that the AD820 contributes negligible noise for applications with source resistances greater than 10 kΩ and signal bandwidths greater than 1 kHz. This is illustrated in Figure 39. 100k INPUT VOLTAGE NOISE – mVRMS The AD820 does not exhibit phase reversal for input voltages up to and including +VS. Figure 38a shows the response of an AD820 voltage follower to a 0 V to +5 V (+VS) square wave input. The input and output are superimposed. The output polarity tracks the input polarity up to +VS —no phase reversal. The reduced bandwidth above a 4 V input causes the rounding of the output wave form. For input voltages greater than +VS, a resistor in series with the AD820’s plus input will prevent phase reversal, at the expense of greater input voltage noise. This is illustrated in Figure 38b. 10k WHENEVER JOHNSON NOISE IS GREATER THAN AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE CONSIDERED NEGLIGIBLE FOR APPLICATION. 1kHz 1k RESISTOR JOHNSON NOISE 100 10 10Hz 1 AMPLIFIER-GENERATED NOISE GND 0.1 10k (a) 100k 1M 10M 100M SOURCE IMPEDANCE – V 1G 10G Figure 39. Total Noise vs. Source Impedance OUTPUT CHARACTERISTICS The AD820’s unique bipolar rail-to-rail output stage swings within 5 mV of the minus supply and 10 mV of the positive supply with no external resistive load. The AD820’s approximate output saturation resistance is 40 Ω sourcing and 20 Ω sinking. This can be used to estimate output saturation voltage when driving heavier current loads. For instance, when sourcing 5 mA, the saturation voltage to the positive supply rail will be 200 mV, when sinking 5 mA, the saturation voltage to the minus rail will he 100 mV. +VS GND (b) +5V RP VIN AD820 VOUT Figure 38. (a) Response with RP = 0; VIN from 0 to +VS Figure 36. (b) VIN = 0 to +VS + 200 mV VOUT = 0 to +V S RP = 49.9 kΩ REV. B The amplifier’s open-loop gain characteristic will change as a function of resistive load, as shown in Figures 9 through 12. For load resistances over 20 kΩ, the AD820’s input error voltage is virtually unchanged until the output voltage is driven to 180 mV of either supply. If the AD820’s output is driven hard against the output saturation voltage, it will recover within 2 µs of the input returning to the amplifier’s linear operating region. –13– AD820 Direct capacitive load will interact with the amplifier’s effective output impedance to form an additional pole in the amplifier’s feedback loop, which can cause excessive peaking on the pulse response or loss of stability. Worst case is when the amplifier is used as a unity gain follower. Figure 40 shows the AD820’s pulse response as a unity gain follower driving 350 pF. This amount of overshoot indicates approximately 20 degrees of phase margin—the system is stable, but is nearing the edge. Configurations with less loop gain, and as a result less loop bandwidth, will be much less sensitive to capacitance load effects. Figure 41 is a plot of capacitive load that will result in a 20 degree phase margin versus noise gain for the AD820. Noise gain is the inverse of the feedback attenuation factor provided by the feedback network in use. +VS 3 0.01mF 7 VIN 100V 6 AD820 VOUT 2 4 –VS 0.01mF 20pF 20kV Figure 42. Extending Unity Gain Follower Capacitive Load Capability Beyond 350 pF OFFSET VOLTAGE ADJUSTMENT The AD820’s offset voltage is low, so external offset voltage nulling is not usually required. Figure 43 shows the recommended technique for AD820’s packaged in plastic DIPs. Adjusting offset voltage in this manner will change the offset voltage temperature drift by 4 µV/°C for every millivolt of induced offset. The null pins are not functional for AD820s in the SO-8 “R” package. +VS 7 3 AD820 20kV Figure 40. Small Signal Response of AD820 as Unity Gain Follower Driving 350 pF Capacitive Load 4 –VS NOISE GAIN – 1+ RF RI 5 Figure 43. Offset Null APPLICATIONS Single Supply Half-Wave and Full-Wave Rectifiers 4 An AD820 configured as a unity gain follower and operated with a single supply can be used as a simple half-wave rectifier. The AD820’s inputs maintain picoamp level input currents even when driven well below the minus supply. The rectifier puts that behavior to good use, maintaining an input impedance of over 1011 Ω for input voltages from 1 volt from the positive supply to 20 volts below the negative supply. 3 2 1 300 6 1 5 2 1k 3k 10k CAPACITIVE LOAD FOR 208 PHASE MARGIN – pF 30k RF RI Figure 41. Capacitive Load Tolerance vs. Noise Gain The full and half-wave rectifier shown in Figure 44 operates as follows: when VIN is above ground, R1 is bootstrapped through the unity gain follower A1 and the loop of amplifier A2. This forces the inputs of A2 to be equal, thus no current flows through R1 or R2, and the circuit output tracks the input. When VIN is below ground, the output of A1 is forced to ground. The noninverting input of amplifier A2 sees the ground level output of A1, therefore A2 operates as a unity gain inverter. The output at node C is then a full-wave rectified version of the input. Node B is a buffered half-wave rectified version of the input. Input voltages up to ± 18 volts can be rectified, depending on the voltage supply used. Figure 42 shows a possible configuration for extending capacitance load drive capability for a unity gain follower. With these component values, the circuit will drive 5,000 pF with a 10% overshoot. –14– REV. B AD820 R1 100kV Low Power Three-Pole Sallen Key Low-Pass Filter R2 100kV The AD820’s high input impedance makes it a good selection for active filters. High value resistors can be used to construct low frequency filters with capacitors much less than 1 µF. The AD820’s picoamp level input currents contribute minimal dc errors. +VS +VS 0.01mF 0.01mF A 3 VIN 2 7 6 A1 7 3 4 4 C 6 A2 2 AD820 FULL-WAVE RECTIFIED OUTPUT AD820 B HALF-WAVE RECTIFIED OUTPUT Figure 46 shows an example, a 10 Hz three-pole Sallen Key Filter. The high value used for R1 minimizes interaction with signal source resistance. Pole placement in this version of the filter minimizes the Q associated with the two-pole section of the filter. This eliminates any peaking of the noise contribution of resistors R1, R2, and R3, thus minimizing the inherent output voltage noise of the filter. C2 0.022mF A +VS R1 243kV B VIN R2 243kV R3 243kV C3 0.022mF C1 0.022mF 0.01mF 7 3 6 AD820 VOUT 2 C 4 0.01mF –VS 0 –10 FILTER GAIN RESPONSE – dB Figure 44. Single Supply Half- and Full-Wave Rectifier 4.5 Volt Low Dropout, Low Power Reference The rail-to-rail performance of the AD820 can be used to provide low dropout performance for low power reference circuits powered with a single low voltage supply. Figure 45 shows a 4.5 volt reference using the AD820 and the AD680, a low power 2.5 volt bandgap reference. R2 and R3 set up the required gain of 1.8 to develop the 4.5 volt output. R1 and C2 form a lowpass RC filter to reduce the noise contribution of the AD680. U2 AD820 +5V 7 4 U1 AD680 C1 0.1mF 4 6 +2.5V 610mV R1 100kV 3 C2 0.1mF FILM C3 10mF/25V R3 100kV (25kV) REF COMMON Figure 45. Single Supply 4.5 Volt Low Dropout Reference With a 1 mA load, this reference maintains the 4.5 volt output with a supply voltage down to 4.7 volts. The amplitude of the recovery transient for a 1 mA to 10 mA step change in load current is under 20 mV, and settles out in a few microseconds. Output voltage noise is less than 10 µV rms in a 25 kHz noise bandwidth. REV. B –50 –60 –70 –80 1 10 FREQUENCY – Hz 100 Figure 46. 10 Hz Sallen Key Low-Pass Filter R2 80kV (20kV) 2 –40 –100 0.1 2 3 –30 –90 +2.5V OUTPUT +4.5V OUTPUT 6 –20 –15– 1k AD820 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). C1792b–0–8/99 Mini-DIP Package (N-8) 0.39 (9.91) MAX 8 5 0.25 0.31 (6.35) (7.87) 1 4 PIN 1 0.30 (7.62) REF 0.10 (2.54) BSC 0.035 6 0.01 (0.89 6 0.25) 0.165 6 0.01 (4.19 6 0.25) 0.011 6 0.003 (0.28 6 0.08) 0.18 6 0.03 (4.57 6 0.75) 0.125 (3.18) MIN 0.018 6 0.003 (0.46 6 0.08) 0.033 (0.84) NOM SEATING PLANE 158 08 SOIC Package (R-8) 0.150 (3.81) 0.157 (3.99) 0.150 (3.81) 8 5 1 4 PIN 1 0.197 (5.01) 0.189 (4.80) 0.010 (0.25) 0.004 (0.10) 0.244 (6.20) 0.228 (5.79) 0.020 (0.051) 3 458 CHAMF 0.190 (4.82) 0.170 (4.32) 88 0.102 (2.59) 08 0.094 (2.39) 0.098 (0.2482) 0.075 (0.1905) 108 08 0.030 (0.76) 0.018 (0.46) PRINTED IN U.S.A. 0.050 0.019 (0.48) SEATING (1.27) 0.014 (0.36) PLANE BSC 0.090 (2.29) –16– REV. B