ON NTD20N03L27G Power mosfet Datasheet

NTD20N03L27
Power MOSFET
20 Amps, 30 Volts, N−Channel DPAK
This logic level vertical power MOSFET is a general purpose part
that provides the “best of design” available today in a low cost power
package. Avalanche energy issues make this part an ideal design in.
The drain−to−source diode has a ideal fast but soft recovery.
http://onsemi.com
Features
20 A, 30 V, RDS(on) = 27 m
Pb−Free Packages are Available
Ultra−Low RDS(on), Single Base, Advanced Technology
SPICE Parameters Available
Diode is Characterized for use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperatures
High Avalanche Energy Specified
ESD JEDAC rated HBM Class 1, MM Class A, CDM Class 0
N−Channel
D
G
Typical Applications
S
Power Supplies
Inductive Loads
PWM Motor Controls
Replaces MTD20N03L in many Applications
MARKING
DIAGRAMS
4
Drain
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
Vdc
Drain−to−Gate Voltage (RGS = 1.0 M)
VDGR
30
Vdc
Rating
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tp10 ms)
20
24
ID
ID
20
16
60
Adc
PD
74
0.6
1.75
W
W/°C
W
Operating and Storage Temperature Range
TJ, Tstg
−55 to
150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 30 Vdc, VGS = 5 Vdc, L = 1.0 mH,
IL(pk) = 24 A, VDS = 34 Vdc)
EAS
288
mJ
RJC
RJA
RJA
1.67
100
71.4
TL
260
Total Power Dissipation @ TA = 25C
Derate above 25°C
Total Power Dissipation @ TC = 25°C (Note 1)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
IDM
August, 2004 − Rev. 2
3
2
1
3
Drain
Gate
Source
4
Drain
4
Apk
°C/W
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size and repetitive rating; pulse width limited by maximum junction
temperature.
 Semiconductor Components Industries, LLC, 2004
1 2
DPAK
CASE 369C
STYLE 2
Vdc
VGS
VGS
Drain Current
− Continuous @ TA = 25C
− Continuous @ TA = 100C
− Single Pulse (tp10 s)
4
1
AYWW
20
N3L
•
•
•
•
DPAK−3
CASE 369D
STYLE 2
1
2
AYWW
20
N3L
•
•
•
•
•
•
•
3
1 2 3
Gate Drain Source
20N3L
A
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
NTD20N03L27/D
NTD20N03L27
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Drain−to−Source Breakdown Voltage (Note 2)
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Positive)
V(BR)DSS
Min
Typ
Max
Unit
30
−
−
43
−
−
−
−
−
−
10
100
−
−
±100
1.0
−
1.6
5.0
2.0
−
−
−
28
23
31
27
−
−
0.48
0.40
0.54
−
gFS
−
21
−
mhos
pF
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
(VDS = 30 Vdc, VGS = 0 Vdc)
(VDS = 30 Vdc, VGS = 0 Vdc, TJ =150°C)
IDSS
Gate−Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
Adc
nAdc
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage (Note 2)
(VDS = VGS, ID = 250 Adc)
Threshold Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−Resistance (Note 2)
(VGS = 4.0 Vdc, ID = 10 Adc)
(VGS = 5.0 Vdc, ID = 10 Adc)
RDS(on)
Static Drain−to−Source On−Voltage (Note 2)
(VGS = 5.0 Vdc, ID = 20 Adc)
(VGS = 5.0 Vdc, ID = 10 Adc, TJ = 150°C)
VDS(on)
Forward Transconductance (Note 2) (VDS = 5.0 Vdc, ID = 10 Adc)
Vdc
mV/°C
m
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 25 Vdc,
Vdc VGS = 0 Vdc,
Vdc
f=1
1.0
0 MHz)
Transfer Capacitance
Ciss
−
1005
1260
Coss
−
271
420
Crss
−
87
112
td(on)
−
17
25
tr
−
137
160
td(off)
−
38
45
tf
−
31
40
QT
−
13.8
18.9
Q1
−
2.8
−
Q2
−
6.6
−
−
−
1.0
0.9
1.15
−
trr
−
23
−
ta
−
13
−
tb
−
10
−
QRR
−
0.017
−
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Vd ID = 20 Adc,
Ad
(VDD = 20 Vdc,
VGS = 5.0
5 0 Vdc,
Vdc
RG = 9.1 ) (Note 2)
Fall Time
Gate
Charge
Ga
eC
a ge
Vdc ID = 15 Adc,
Adc
(VDS = 48 Vdc,
VGS = 10 Vdc) (Note 2)
ns
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
VSD
Forward On−Voltage
(IS = 20 Adc, VGS = 0 Vdc) (Note 2)
(IS = 20 Adc, VGS = 0 Vdc, TJ = 125°C)
Reverse
e e se Recovery
eco e y Time
e
(IS =15
15 Adc, VGS = 0 Vdc,
dlS/dt = 100 A/s) (Note 2)
Reverse Recovery Stored Charge
Vdc
nss
C
2. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperature.
ORDERING INFORMATION
Device
NTD20N03L27
Package
Shipping†
DPAK
75 Units/Rail
NTD20N03L27G
DPAK
(Pb−Free)
75 Units/Rail
NTD20N03L27−1
DPAK−3
75 Units/Rail
DPAK
(Pb−Free)
75 Units/Rail
DPAK
2500 Tape & Reel
DPAK
(Pb−Free)
2500 Tape & Reel
NTD20N03L27−1G
NTD20N03L27T4
NTD20N03L27T4G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
2
NTD20N03L27
40
VGS = 10 V
35
VGS = 4 V
VGS = 8 V
30
ID, DRAIN CURRENT (AMPS)
−ID, DRAIN CURRENT (AMPS)
40
VGS = 4.5 V
VGS = 5 V
25
VGS = 3.5 V
20
VGS = 6 V
15
VGS = 3 V
10
TJ = 25°C
5
VGS = 2.5 V
0
0.2
0.4
0.6
1
0.8
1.2
1.4
1.6
1.8
24
TJ = 100°C
20
16
TJ = 25°C
TJ = −55°C
12
8
4
1
1.5
2
2.5
3
3.5
4
4.5
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
TJ = 100°C
0.03
TJ = 25°C
0.025
0.02
TJ = −55°C
0.015
0.01
0.005
0
5
12
8
15
22
18
25
28
32
35
38
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
−VGS, GATE−TO−SOURCE VOLTAGE (V)
VGS = 5 V
2
28
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.04
0.035
32
0
0.5
2
5
0.03
TJ = 25°C
VGS = 5 V
0.025
0.02
VGS = 10 V
0.015
0.01
4
0
8
12
16
20
24
28
32
36
40
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Drain Current and
Temperature
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.6
1000
ID = 10 A
VGS = 5 V
VGS = 0 V
1.4
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
0
VDS > = 10 V
36
1.2
1
0.8
0.6
−50
TJ = 125°C
100
TJ = 100°C
10
1
−25
0
25
50
75
100
125
150
0
3
6
9
12
15
18
21
24
27
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
http://onsemi.com
3
30
NTD20N03L27
VGS, GATE−TO−SOURCE VOLTAGE (V)
2500
C, CAPACITANCE (pF)
VGS − VDS
200
1500
Ciss
1000
Coss
500
Crss
0
10 8 6 4
2 0 2
4 6 8 10 12 14 16 18 20 23 25
Q
10
8
VGS
6
Q1
4
Q2
2
0
ID = 20 A
TJ = 25°C
0
2
4
6
8
10
12
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
14
IS, SOURCE CURRENT (AMPS)
20
tr
100
tf
td(off)
10
td(on)
VDS = 20 V
ID = 20 A
VGS = 5.0 V
TJ = 25°C
1
1
10
VGS = 0 V
TJ = 25°C
18
16
14
12
10
8
6
4
2
0
0.0
100
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE ()
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
t, TIME (ns)
12
350
ID = 24 A
300
250
200
150
100
50
0
25
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
4
150
1.0
NTD20N03L27
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
−T−
C
B
V
SEATING
PLANE
E
R
4
Z
A
S
1
2
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
3
U
K
F
J
L
H
D
G
2 PL
0.13 (0.005)
M
T
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.180 0.215
0.025 0.040
0.020
−−−
0.035 0.050
0.155
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
0.244
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.57
5.45
0.63
1.01
0.51
−−−
0.89
1.27
3.93
−−−
NTD20N03L27
PACKAGE DIMENSIONS
DPAK−3
CASE 369D−01
ISSUE B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
C
B
E
R
4
Z
A
S
1
2
3
−T−
SEATING
PLANE
K
J
F
H
D
G
3 PL
0.13 (0.005)
M
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
T
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
6
For additional information, please contact your
local Sales Representative.
NTD20N03L27/D
Similar pages