PHILIPS BUJ403BX Silicon diffused power transistor Datasheet

Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ403BX
GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in a plastic full-pack envelope intended
for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor
control systems, etc.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
VCESM
VCBO
VCEO
VEBO
IC
ICM
Ptot
VCEsat
hFEsat
tfi
Collector-emitter voltage peak value
Collector-base voltage (open emitter)
Collector-emitter voltage (open base)
Emitter-base voltage (open collector)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
DC current gain
Fall time
VBE = 0 V
18
0.14
21
140
1200
1200
525
6
10
32
1.0
25
203
V
V
V
V
A
A
W
V
PINNING - SOT186A
PIN
Ths ≤ 25 ˚C
IC = 2 A; IB = 0.4 A
IC = 2 A; VCE = 5 V
IC = 2.5 A; IB1 = 0.5 A
PIN CONFIGURATION
SYMBOL
DESCRIPTION
c
case
1
base
2
collector
3
emitter
ns
b
case isolated
e
1 2 3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
VCESM
VCEO
VCBO
VEBO
IC
ICM
IB
IBM
Ptot
Tstg
Tj
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Emitter-base voltage (open collector)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
VBE = 0 V
November 1999
Ths ≤ 25 ˚C
1
MIN.
MAX.
UNIT
16
-65
-
1200
525
1200
6
10
3
5
32
150
150
V
V
V
V
A
A
A
A
W
˚C
˚C
Rev 1.100
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ403BX
AVALANCHE ENERGY CAPABILITY
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
-
1.0
mJ
TYP.
MAX.
UNIT
-
3.95
K/W
55
-
K/W
MIN.
TYP.
MAX.
UNIT
-
-
0.2
0.5
mA
mA
525
-
0.1
1.0
-
mA
mA
V
19
30
17
0.14
0.89
28
45
21
1.0
1.5
65
25
V
V
TYP.
MAX.
UNIT
0.6
4.5
0.4
0.95
6.4
0.59
µs
µs
µs
1.67
140
2.3
203
µs
ns
1.9
144
2.7
216
µs
ns
VCC = 150V; VBB = -5V; LC =
15mH;LB = 1µH
EAS
Avalanche Energy Capability1
Ths ≤ 110 ˚C
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
Rth j-hs
Junction to heatsink
with heatsink compound
Rth j-a
Junction to ambient
in free air
STATIC CHARACTERISTICS
Ths = 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
2
ICES,ICBO
ICES
Collector cut-off current
ICEO
IEBO
VCEOsust
Collector cut-off current 2
Emitter cut-off current
Collector-emitter sustaining voltage
VCEsat
VBEsat
hFE
hFE
hFEsat
Collector-emitter saturation voltage
Base-emitter saturation voltage
DC current gain
DC current gain
VBE = 0 V; VCE = VCESMmax
VBE = 0 V; VCE = VCESMmax;
Tj = 125 ˚C
VCEO = VCEOMmax(550V)
VEB = 9 V; IC = 0 A
IB = 0 A; IC = 10 mA;
L = 25 mH
IC = 2.0 A;IB = 0.4 A
IC = 2.0 A;IB = 0.4 A
IC = 1 mA; VCE = 5 V
IC = 500 mA;VCE = 5 V
IC = 2.0 A; VCE = 5 V
DYNAMIC CHARACTERISTICS
Ths = 25 ˚C unless otherwise specified
SYMBOL
ton
ts
tf
PARAMETER
CONDITIONS
Switching times (resistive load)
ICon = 2.5 A; IBon = -IBoff = 0.5 A;
RL = 75 ohms; VBB2 = 4 V;
Turn-on time
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
tsi
tfi
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
tsi
tfi
Turn-off storage time
Turn-off fall time
ICon = 2.5 A; IBon = 0.5 A; LB = 1 µH;
-VBB = 5 V
ICon = 2.5 A; IBon = 0.5 A; LB = 1 µH;
-VBB = 5 V; Tj = 100 ˚C
1 Fig. 14 without clamping voltage (VCL). Probe point is used to measure the BVCE at avalanche.
2 Measured with half sine-wave voltage (curve tracer).
November 1999
2
Rev 1.100
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ403BX
ICon
90 %
+ 50v
100-200R
90 %
IC
10 %
ts
Horizontal
ton
tf
toff
Oscilloscope
IBon
IB
Vertical
10 %
300R
1R
tr
30ns
6V
30-60 Hz
-IBoff
Fig.4. Switching times waveforms with resistive load.
Fig.1. Test circuit for VCEOsust.
VCC
IC / mA
LC
250
IBon
100
LB
T.U.T.
10
0
-VBB
min
VCE / V
VCEOsust
Fig.2. Oscilloscope display for VCEOsust.
Fig.5. Test circuit inductive load.
VCC = 300 V; -VBE = 5 V; LC = 200 uH; LB = 1 uH
VCC
ICon
90 %
IC
RL
VIM
10 %
RB
0
T.U.T.
ts
toff
tp
IB
tf
t
IBon
T
t
-IBoff
Fig.6. Switching times waveforms with inductive load.
Fig.3. Test circuit resistive load. VIM = -6 to +8 V
VCC = 250 V; tp = 20 µs; δ = tp / T = 0.01.
RB and RL calculated from ICon and IBon requirements.
November 1999
3
Rev 1.100
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
120
BUJ403BX
Normalised Power Derating
PD%
VCEsat/V
2.0
110
100
90
1.6
80
IC=1A
IC=1A
70
2A
3A
4A
1.2
60
50
0.8
40
30
20
10
0.4
0
0
20
40
60
80
100
Tmb / C
120
140
0.0
0.01
0.10
1.00
IB/A
10.00
Fig.10. Collector-Emitter saturation voltage.
Solid lines = typ values, VCEsat = f(IB); Tj=25˚C.
Fig.7. Normalised power dissipation.
PD% = 100⋅PD/PD 25˚C = f (Ths)
VBESAT/V
1.4
HFE
80
125 C
50
1.2
30
20
-40 C
Tj=25 C
15
1
10
-40C
5
0.8
25C
2
0.6
0.01
0.05
0.1
0.3
IC/A
1
2
3
5
10
Tj = 100C
0.1
Fig.8. Typical DC current gain. hFE = f(IC)
parameter VCE = 1V
0.5
5
2
1
IC/A
10
Fig.11. Base-Emitter saturation voltage.
Solid lines = typ values, VBEsat = f(IC); at IC/IB =4.
VCESAT/V
0.6
HFE
80
125 C
50
0.5
30
20
Tj = 100C
-40 C
Tj=25 C
0.4
15
10
0.3
5
25C
0.2
-40C
0.1
2
0.01
0.05
0.1
0.5
1
2
3
5
0
0.2
10
IC/A
Fig.9. Typical DC current gain. hFE = f(IC)
parameter VCE = 5V
November 1999
0.4
0.6
1
IC/A
2
5
6
Fig.12. Collector-Emitter saturation voltage.
Solid lines = typ values, VCEsat = f(IC); at IC/IB =4.8
4
Rev 1.100
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
10
Zth / (K/W)
BUJ403BX
BU1706AX
VCC
0.5
1
0.1
0.2
0.1
0.05
LC
0.02
VCL(RBSOAR)
PD
tp
D=
tp
IBon
T
PROBE POINT
LB
0.01
D=0
0.001
1u
t
T
10u 100u 1m 10m 100m
t/s
1
10
-VBB
T.U.T.
100
Fig.13. Transient thermal impedance.
Zth j-hs = f(t); parameter D = tp/T
Fig.15. Test circuit for reverse bias safe operating
area.
Vcl ≤ 1200V; Vcc = 150V; VBB = -5V; LB = 1µH;Lc =
200µH
IC (A)
11
10
9
8
7
6
5
4
3
2
1
0
0
200
400
600
800
1,000
1,200
1,400
VCEclamp (V)
Fig.14. Reverse bias safe operating area. Tj ≤ Tj max
November 1999
5
Rev 1.100
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ403BX
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
10.3
max
4.6
max
3.2
3.0
2.9 max
2.8
Recesses (2x)
2.5
0.8 max. depth
6.4
15.8
19
max. max.
15.8
max
seating
plane
3 max.
not tinned
3
2.5
13.5
min.
1
0.4
2
3
M
1.0 (2x)
0.6
2.54
0.9
0.7
0.5
2.5
5.08
1.3
Fig.16. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Refer to mounting instructions for F-pack envelopes.
2. Epoxy meets UL94 V0 at 1/8".
November 1999
6
Rev 1.100
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ403BX
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
November 1999
7
Rev 1.100
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