ON NVMFS5C460NLWFT3G Single nâ channel power mosfet Datasheet

NVMFS5C460NL
Power MOSFET
40 V, 4.5 mW, 78 A, Single N−Channel
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS5C460NLWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
4.5 mW @ 10 V
40 V
78 A
7.2 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current RqJC
(Notes 1, 3)
TC = 25°C
Power Dissipation
RqJC (Note 1)
Continuous Drain
Current RqJA
(Notes 1, 2, 3)
Steady
State
Pulsed Drain Current
Value
Unit
VDSS
40
V
VGS
±20
V
ID
78
A
TC = 100°C
TC = 25°C
Steady
State
PD
ID
W
50
N−CHANNEL MOSFET
A
21
PD
1.8
D
1
520
TJ, Tstg
−55 to
+ 175
°C
IS
56
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 5 A)
EAS
107
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Source Current (Body Diode)
MARKING
DIAGRAM
W
3.6
IDM
Operating Junction and Storage Temperature
S (1,2,3)
15
TA = 100°C
TA = 25°C, tp = 10 ms
G (4)
25
TA = 100°C
TA = 25°C
D (5,6)
55
TC = 100°C
TA = 25°C
Power Dissipation
RqJA (Notes 1 & 2)
Symbol
A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
S
S
S
G
D
XXXXXX
AYWZZ
D
D
XXXXXX = 5C460L
XXXXXX = (NVMFS5C460NL) or
XXXXXX = 460LWF
XXXXXX = (NVMFS5C460NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
3.0
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
42
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2015
September, 2015 − Rev. 0
1
Publication Order Number:
NVMFS5C460NL/D
NVMFS5C460NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
40
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
21
VGS = 0 V,
VDS = 40 V
mV/°C
TJ = 25 °C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
100
nA
2.0
V
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
1.2
−5.1
mV/°C
VGS = 4.5 V
ID = 35 A
5.8
7.2
VGS = 10 V
ID = 35 A
3.7
4.5
gFS
VDS =15 V, ID = 35 A
72
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
1300
VGS = 0 V, f = 1 MHz, VDS = 25 V
CRSS
530
pF
22
Total Gate Charge
QG(TOT)
VGS = 10 V, VDS = 20 V; ID = 35 A
Total Gate Charge
QG(TOT)
11
Threshold Gate Charge
QG(TH)
2.5
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
3.0
Plateau Voltage
VGP
3.3
td(ON)
9.2
VGS = 4.5 V, VDS = 20 V; ID = 35 A
23
nC
nC
4.7
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 20 V,
ID = 35 A, RG = 1 W
tf
97
ns
17
4
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.86
TJ = 125°C
0.75
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 35 A
1.2
V
29
VGS = 0 V, dIs/dt = 100 A/ms,
IS = 35 A
QRR
14
ns
14
100
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS5C460NL
TYPICAL CHARACTERISTICS
100
ID, DRAIN CURRENT (A)
90
VGS = 4.5 V to 10 V
80
3.6 V
70
60
50
3.2 V
40
30
20
2.8 V
70
60
50
40
20
10
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
TJ = 125°C
0
4
5
Figure 2. Transfer Characteristics
16
14
12
10
8
6
4
2
3
4
5
7
6
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
8
TJ = 25°C
7
VGS = 4.5 V
6
5
4
VGS = 10 V
3
2
0
20
10
30
40
50
60
70
90 100
80
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.9
100000
TJ = 175°C
VGS = 10 V
ID = 35 A
1.6
1.5
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
3
Figure 1. On−Region Characteristics
18
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
−50
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
ID = 35 A
1.8
1.7
1
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
20
2
TJ = 25°C
30
0
0
VDS = 10 V
80
10
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
90
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
100
4.0 V
10000
TJ = 125°C
1000
TJ = 85°C
100
10
−25
0
25
50
75
100
125
150
175
5
10
15
20
25
30
35
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
40
NVMFS5C460NL
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
10000
CISS
1000
COSS
100
CRSS
10
VGS = 0 V
TJ = 25°C
f = 1 MHz
1
0
5
10
15
20
25
30
35
10
QT
9
8
7
6
5
QGD
QGS
4
3
VDS = 20 V
TJ = 25°C
ID = 35 A
2
1
0
40
0
5
10
15
20
25
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
1000
100
IS, SOURCE CURRENT (A)
VGS = 0 V
tr
tf
t, TIME (ns)
100
td(off)
td(on)
10
VGS = 4.5 V
VDS = 20 V
ID = 35 A
1
1
10
100
1
0.1
TJ = 125°C
0.01
0.001
TJ = 25°C
TJ = −55°C
0.2
0.4
0.6
0.8
1.0
1.2
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
1000
100
10
IPEAK, (A)
ID, DRAIN CURRENT (A)
10
10
TC = 25°C
VGS ≤ 10 V
Single Pulse
1
500 ms
1 ms
10 ms
0.1
0.01
0.1
1
TJ (initial)= 100°C
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
TJ (initial)= 25°C
10
1E−4
100
1E−3
VDS (V)
TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
10E−2
NVMFS5C460NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
RqJA (°C/W)
10
1
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
Marking
Package
Shipping†
NVMFS5C460NLT1G
5C460L
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS5C460NLWFT1G
460LWF
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
NVMFS5C460NLT3G
5C460L
DFN5
(Pb−Free)
5000 / Tape & Reel
NVMFS5C460NLWFT3G
460LWF
DFN5
(Pb−Free, Wettable Flanks)
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NVMFS5C460NL
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE L
2X
0.20 C
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
A
2
B
D1
2X
0.20 C
4X
E1
q
E
2
c
1
2
3
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
A1
4
TOP VIEW
3X
C
e
SEATING
PLANE
0.10 C
DETAIL A
A
0.10 C
SIDE VIEW
DETAIL A
2X
4.560
2X
b
0.10
C A B
0.05
c
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
RECOMMENDED
SOLDERING FOOTPRINT*
0.495
8X
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.30
5.15
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.15
6.30
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.61
0.71
1.20
1.35
1.50
0.51
0.61
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
1.530
e/2
L
1
4
3.200
K
4.530
E2
PIN 5
(EXPOSED PAD)
L1
M
1.330
2X
0.905
1
0.965
G
D2
4X
BOTTOM VIEW
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
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NVMFS5C460NL/D