Freescale MRF7S21210HSR3 Rf power field effect transistors n-channel enhancement-mode lateral mosfet Datasheet

Freescale Semiconductor
Technical Data
Document Number: MRF7S21210H
Rev. 1, 1/2009
RF Power Field Effect Transistors
N - Channel Enhancement - Mode Lateral MOSFETs
MRF7S21210HR3
MRF7S21210HSR3
Designed for CDMA base station applications with frequencies from 2110 to
2170 MHz. Can be used in Class AB and Class C for all typical cellular base
station modulations.
• Typical Single - Carrier W - CDMA Performance: VDD = 28 Volts, IDQ =
1400 mA, Pout = 63 Watts Avg., Full Frequency Band, 3GPP Test Model 1,
64 DPCH with 50% Clipping, Channel Bandwidth = 3.84 MHz, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCDF.
Power Gain — 18.5 dB
Drain Efficiency — 29%
Device Output Signal PAR — 5.9 dB @ 0.01% Probability on CCDF
ACPR @ 5 MHz Offset — - 33 dBc in 3.84 MHz Channel Bandwidth
• Capable of Handling 5:1 VSWR, @ 32 Vdc, 2140 MHz, 190 Watts CW
Output Power
• Typical Pout @ 1 dB Compression Point ] 190 Watts CW
Features
• 100% PAR Tested for Guaranteed Output Power Capability
• Characterized with Series Equivalent Large - Signal Impedance Parameters
• Internally Matched for Ease of Use
• Integrated ESD Protection
• Greater Negative Gate - Source Voltage Range for Improved Class C
Operation
• Designed for Digital Predistortion Error Correction Systems
• RoHS Compliant
• In Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel.
2110 - 2170 MHz, 63 W AVG., 28 V
SINGLE W - CDMA
LATERAL N - CHANNEL
RF POWER MOSFETs
CASE 465 - 06, STYLE 1
NI - 780
MRF7S21210HR3
CASE 465A - 06, STYLE 1
NI - 780S
MRF7S21210HSR3
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain - Source Voltage
VDSS
- 0.5, +65
Vdc
Gate - Source Voltage
VGS
- 6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
- 65 to +150
°C
Case Operating Temperature
TC
150
°C
TJ
225
°C
CW
253
1.5
W
W/°C
Symbol
Value (2,3)
Unit
Operating Junction
Temperature (1,2)
CW Operation @ TC = 25°C
Derate above 25°C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 80°C, 190 W CW
Case Temperature 72°C, 63 W CW
RθJC
0.33
0.37
°C/W
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes - AN1955.
© Freescale Semiconductor, Inc., 2008-2009. All rights reserved.
RF Device Data
Freescale Semiconductor
MRF7S21210HR3 MRF7S21210HSR3
1
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22 - A114)
1C (Minimum)
Machine Model (per EIA/JESD22 - A115)
A (Minimum)
Charge Device Model (per JESD22 - C101)
IV (Minimum)
Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
μAdc
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
μAdc
Gate - Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
μAdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 513 μAdc)
VGS(th)
1.2
2
2.7
Vdc
Gate Quiescent Voltage
(VDS = 28 Vdc, ID = 1400 mAdc)
VGS(Q)
—
2.7
—
Vdc
Fixture Gate Quiescent Voltage (1)
(VDD = 28 Vdc, ID = 1400 mAdc, Measured in Functional Test)
VGG(Q)
4
5.4
7
Vdc
Drain - Source On - Voltage
(VGS = 10 Vdc, ID = 5.13 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Reverse Transfer Capacitance
(VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Crss
—
2.02
—
pF
Output Capacitance
(VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Coss
—
257
—
pF
Input Capacitance
(VDS = 28 Vdc, VGS = 0 Vdc ± 30 mV(rms)ac @ 1 MHz)
Ciss
—
516
—
pF
Off Characteristics
On Characteristics
Dynamic Characteristics (2)
Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, Pout = 63 W Avg., f = 2112.5 MHz and f =
2167.5 MHz, Single - Carrier W - CDMA, 3GPP Test Model 1, 64 DPCH, 50% Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability on
CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Power Gain
Gps
17
18.5
20.5
dB
Drain Efficiency
ηD
26
29
—
%
PAR
5.5
5.9
—
dB
ACPR
—
- 33
- 31
dBc
IRL
—
- 15
-8
dB
Output Peak - to - Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Input Return Loss
1. VGG = 2 x VGS(Q). Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit
schematic.
2. Part internally matched both on input and output.
(continued)
MRF7S21210HR3 MRF7S21210HSR3
2
RF Device Data
Freescale Semiconductor
Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Typical Performances (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, 2110 - 2170 MHz Bandwidth
IMD Symmetry @ 130 W PEP, Pout where IMD Third Order
Intermodulation ^ 30 dBc
(Delta IMD Third Order Intermodulation between Upper and Lower
Sidebands > 2 dB)
IMDsym
—
15
—
MHz
VBWres
—
60
—
MHz
Gain Flatness in 60 MHz Bandwidth @ Pout = 63 W Avg.
GF
—
1.2
—
dB
Average Deviation from Linear Phase in 60 MHz Bandwidth
@ Pout = 190 W CW
Φ
—
1.1
—
°
Delay
—
2.5
—
ns
Part - to - Part Insertion Phase Variation @ Pout = 190 W CW,
f = 2140 MHz, Six Sigma Window
ΔΦ
—
26
—
°
Gain Variation over Temperature
( - 30°C to +85°C)
ΔG
—
0.019
—
dB/°C
ΔP1dB
—
0.011
—
dBm/°C
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Average Group Delay @ Pout = 190 W CW, f = 2140 MHz
Output Power Variation over Temperature
( - 30°C to +85°C)
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
3
Z19
R1
VBIAS
VSUPPLY
+
R2
C1
C2
Z17
C3
C10
R3
RF
INPUT
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z10 Z11 Z12 Z13
DUT
C6
C12
C19
Z9
Z8
C5
C11
C13
RF
C15 Z16 OUTPUT
Z14 Z15
C14
Z18
Z20
+
C9
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
C8
C7
0.402″ x 0.066″ Microstrip
0.840″ x 0.076″ Microstrip
0.059″ x 0.118″ Microstrip
0.059″ x 0.118″ Microstrip
0.029″ x 0.076″ Microstrip
0.194″ x 0.076″ Microstrip
0.051″ x 0.533″ Microstrip
0.114″ x 0.533″ Microstrip
0.139″ x 1.268″ Microstrip
0.304″ x 1.201″ Microstrip
C16
Z11
Z12
Z13
Z14
Z15
Z16
Z17
Z18
Z19, Z20
PCB
C17
C18
C20
0.044″ x 0.613″ Microstrip
0.398″ x 0.102″ Microstrip
0.071″ x 0.220″ Microstrip
0.071″ x 0.220″ Microstrip
0.439″ x 0.066″ Microstrip
0.764″ x 0.066″ Microstrip
0.353″ x 0.090″ Microstrip
0.797″ x 0.090″ Microstrip
0.660″ x 0.120″ Microstrip
Taconic RF35, 0.030”, εr = 3.5
Figure 1. Test Circuit Schematic — MRF7S21210HR3
Table 5. Test Circuit Component Designations and Values — MRF7S21210HR3
Part
Description
Part Number
Manufacturer
C1, C9, C11, C12, C17, C18
10 μF, 50 V Chip Capacitors
C5750X5R1H106MT
TDK
C2, C8
100 nF Chip Capacitors
12065C104KAT
AVX
C3, C7, C10, C13, C14, C16
6.8 pF Chip Capacitors
ATC100B6R8BT500XT
ATC
C5
5.6 pF Chip Capacitor
ATC100B5R6BT500XT
ATC
C6
0.8 pF Chip Capacitor
ATC100B0R8BT500XT
ATC
C15
0.6 pF Chip Capacitor
ATC100B0R6BT500XT
ATC
C19, C20
470 μF Electrolytic Capacitors
2222 12018471
BC Components
R1, R2
10 KΩ, 1/4 W Chip Resistors
WCR120610KL
Welwyn
R3
10 Ω, 1/4 W Chip Resistor
232272461009
Phycomp
C4 not used in MRF7S21210HR3 part.
MRF7S21210HR3 MRF7S21210HSR3
4
RF Device Data
Freescale Semiconductor
C10
R1
R3
R2
C1
C11 C12
C19
C3
C13
CUT OUT AREA
C2
C5
C6
C15
C14
C20
C8
C9
C7
C17
C18
C16
MRF7S21210H
Rev. 0
C4 not used in MRF7S21210HR3 part.
Figure 2. Test Circuit Component Layout — MRF7S21210HR3
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
5
Z20
R1
VBIAS
VSUPPLY
+
R2
C1
C2
Z18
C3
C10
R3
RF
INPUT
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z11 Z12 Z13 Z14
DUT
C4
C6
C12
C19
Z10
Z9
C5
C11
C13
RF
C15 Z17 OUTPUT
Z15 Z16
C14
Z19
Z21
+
C9
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
Z11
C8
C7
0.402″ x 0.066″ Microstrip
0.840″ x 0.076″ Microstrip
0.029″ x 0.076″ Microstrip
0.059″ x 0.118″ Microstrip
0.059″ x 0.118″ Microstrip
0.029″ x 0.076″ Microstrip
0.194″ x 0.076″ Microstrip
0.510″ x 0.533″ Microstrip
0.114″ x 0.533″ Microstrip
0.139″ x 1.268″ Microstrip
0.304″ x 1.201″ Microstrip
C16
Z12
Z13
Z14
Z15
Z16
Z17
Z18
Z19
Z20, Z21
PCB
C17
C18
C20
0.044″ x 0.613″ Microstrip
0.398″ x 0.102″ Microstrip
0.071″ x 0.220″ Microstrip
0.071″ x 0.220″ Microstrip
0.439″ x 0.066″ Microstrip
0.764″ x 0.066″ Microstrip
0.353″ x 0.090″ Microstrip
0.797″ x 0.090″ Microstrip
0.660″ x 0.120″ Microstrip
Taconic RF35, 0.030”, εr = 3.5
Figure 3. Test Circuit Schematic — MRF7S21210HSR3
Table 6. Test Circuit Component Designations and Values — MRF7S21210HSR3
Part
Description
Part Number
Manufacturer
C1, C9, C11, C12, C17, C18
10 μF, 50 V Chip Capacitors
C5750X5R1H106MT
TDK
C2, C8
100 nF Chip Capacitors
12065C104KAT
AVX
C3, C7, C10, C13, C14, C16
6.8 pF Chip Capacitors
ATC100B6R8BT500XT
ATC
C4
0.3 pF Chip Capacitor
ATC100B0R3BT500XT
ATC
C5
5.6 pF Chip Capacitor
ATC100B5R6BT500XT
ATC
C6
0.2 pF Chip Capacitor
ATC100B0R2BT500XT
ATC
C15
0.4 pF Chip Capacitor
ATC100B0R4BT500XT
ATC
C19, C20
470 μF Electrolytic Capacitors
2222 12018471
BC Components
R1, R2
10 KΩ, 1/4 W Chip Resistors
WCR120610KL
Welwyn
R3
10 Ω, 1/4 W Chip Resistor
232272461009
Phycomp
MRF7S21210HR3 MRF7S21210HSR3
6
RF Device Data
Freescale Semiconductor
C10
R1
R3
R2
C1
C11 C12
C19
C3
C5
C4
C13
CUT OUT AREA
C2
C6
C15
C14
C20
C8
C9
C7
C17
C18
C16
MRF7S21210HS
Rev. 0
Figure 4. Test Circuit Component Layout — MRF7S21210HSR3
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
7
TYPICAL CHARACTERISTICS
30
Gps
17
28
VDD = 28 Vdc, Pout = 63 W (Avg.)
IDQ = 1400 mA, Single−Carrier W−CDMA
3.84 MHz Channel Bandwidth, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCDF
16
15
29
ACPR
27
14
13
−29
0
−31
−4
−33
IRL
12
−35
11 PARC
10
2060 2080
−37
2100
2120
2140
2160
2180
2200
−8
−12
−16
−39
2220
−20
−1
−1.2
−1.4
−1.6
PARC (dB)
Gps, POWER GAIN (dB)
18
IRL, INPUT RETURN LOSS (dB)
19
ηD, DRAIN
EFFICIENCY (%)
31
ηD
ACPR (dBc)
20
−1.8
−2
f, FREQUENCY (MHz)
Note: Measurement conducted with device soldered on Freescale test fixture.
Figure 5. Output Peak - to - Average Ratio Compression (PARC)
Broadband Performance @ Pout = 63 Watts Avg.
IMD, INTERMODULATION DISTORTION (dBc)
19
IDQ = 2100 mA
1750 mA
1400 mA
16
1050 mA
15
VDD = 28 Vdc, f = 2140 MHz
CW Measurements
700 mA
14
1
100
10
−20
−30
IM3−L
IM3−U
IM5−U
−40
IM5−L
−50
IM7−L
−60
IM7−U
−70
1
300
10
100
Pout, OUTPUT POWER (WATTS) CW
TWO−TONE SPACING (MHz)
Figure 6. CW Power Gain versus Output Power
Figure 7. Intermodulation Distortion Products
versus Tone Spacing
19
1
Gps, POWER GAIN (dB)
18.5
18
17.5
17
16.5
16
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
−1 dB = 48.327 W
ACPR
0
45
−25
40
−30
ηD
−1
−2
35
30
−2 dB = 67.216 W
−3 dB = 89.144 W
Gps
−3
−4
−5
30
25
PARC
VDD = 28 Vdc, IDQ = 1400 mA, f = 2140 MHz
Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF
50
70
90
110
−35
−40
ACPR (dBc)
17
VDD = 28 Vdc, Pout = 130 W (PEP), IDQ = 1400 mA
Two−Tone Measurements
(f1 + f2)/2 = Center Frequency of 2140 MHz
ηD, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
18
−10
−45
20
−50
15
−55
130
Pout, OUTPUT POWER (WATTS)
Figure 8. Output Peak - to - Average Ratio
Compression (PARC) versus Output Power
MRF7S21210HR3 MRF7S21210HSR3
8
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS
22
25_C
Gps
18
60
0
50
−10
85_C
40
85_C
16
14
TC = −30_C
30
25_C
−30_C
20
ACPR
12
10
ηD
Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF
10
1
10
100
0
300
−20
−30
−40
ACPR (dBc)
−30_C
ηD, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
VDD = 28 Vdc, IDQ = 1400 mA, f = 2140 MHz
Single−Carrier W−CDMA, 3.84 MHz
20 Channel Bandwidth
−50
−60
Pout, OUTPUT POWER (WATTS) AVG.
Figure 9. Single - Carrier W - CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
0
20
−4
12
−8
8
−12
S11
4
0
1750
−16
VDD = 28 Vdc
IDQ = 1400 mA
1850
1950
2050
2150
2250
S11 (dB)
S21 (dB)
S21
16
2350
2450
−20
2550
f, FREQUENCY (MHz)
Figure 10. Broadband Frequency Response
MTTF (HOURS)
108
107
106
105
90
110
130
150
170
190
210
230
250
TJ, JUNCTION TEMPERATURE (°C)
This above graph displays calculated MTTF in hours when the device
is operated at VDD = 28 Vdc, Pout = 63 W Avg., and ηD = 29%.
MTTF calculator available at http://www.freescale.com/rf. Select
Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
Figure 11. MTTF versus Junction Temperature
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
9
W - CDMA TEST SIGNAL
100
−10
3.84 MHz
Channel BW
−20
10
1
−40
Input Signal
−50
0.1
(dB)
PROBABILITY (%)
−30
0.01
−70
W−CDMA. ACPR Measured in 3.84 MHz
Channel Bandwidth @ ±5 MHz Offset.
Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF
0.001
0.0001
0
2
4
6
−60
−80
−ACPR in 3.84 MHz
Integrated BW
−90
8
10
−ACPR in 3.84 MHz
Integrated BW
−100
PEAK−TO−AVERAGE (dB)
Figure 12. CCDF W - CDMA 3GPP, Test Model 1,
64 DPCH, 50% Clipping, Single - Carrier Test Signal
−110
−9
−7.2 −5.4 −3.6 −1.8
0
1.8
3.6
5.4
7.2
9
f, FREQUENCY (MHz)
Figure 13. Single - Carrier W - CDMA Spectrum
MRF7S21210HR3 MRF7S21210HSR3
10
RF Device Data
Freescale Semiconductor
Zo = 5 Ω
f = 2220 MHz
f = 2220 MHz
f = 2060 MHz
Zsource
Zload
f = 2060 MHz
VDD = 28 Vdc, IDQ = 1400 mA, Pout = 63 W Avg.
f
MHz
Zsource
W
Zload
W
2060
4.34 - j1.26
1.52 - j1.46
2080
4.34 - j1.20
1.47 - j1.35
2100
4.34 - j1.14
1.42 - j1.23
2120
4.33 - j1.09
1.37 - j1.11
2140
4.34 - j1.05
1.32 - j0.99
2160
4.33 - j0.96
1.27 - j0.87
2180
4.33 - j0.92
1.23 - j0.75
2200
4.33 - j0.92
1.19 - j0.64
2220
4.32 - j0.87
1.15 - j0.52
Zsource = Test circuit impedance as measured from
gate to ground.
Zload
= Test circuit impedance as measured from
drain to ground.
Output
Matching
Network
Device
Under
Test
Input
Matching
Network
Z
source
Z
load
Figure 14. Series Equivalent Source and Load Impedance
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
11
ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS
60
Pout, OUTPUT POWER (dBm)
59
Ideal
P3dB = 55.47 dBm (352 W)
58
57
P1dB = 54.61 dBm (289 W)
56
55
Actual
54
53
52
VDD = 28 Vdc, IDQ = 1400 mA, Pulsed CW
10 μsec(on), 10% Duty Cycle, f = 2140 MHz
51
50
31
32
33
34
35
36
37
38
39
40
41
Pin, INPUT POWER (dBm)
NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V
Test Impedances per Compression Level
P1dB
Zsource
Ω
Zload
Ω
5.21 - j0.31
1.23 - j1.06
Figure 15. Pulsed CW Output Power
versus Input Power @ 28 V
MRF7S21210HR3 MRF7S21210HSR3
12
RF Device Data
Freescale Semiconductor
PACKAGE DIMENSIONS
B
G
Q
bbb
2X
1
M
T A
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M−1994.
2. CONTROLLING DIMENSION: INCH.
3. DELETED
4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY
FROM PACKAGE BODY.
3
B
K
2
(FLANGE)
D
bbb
M
T A
B
M
M
M
R
(INSULATOR)
bbb
N
M
T A
B
M
M
M
ccc
M
T A
M
aaa
M
T A
M
S
(LID)
ccc
H
M
T A
B
M
DIM
A
B
C
D
E
F
G
H
K
M
N
Q
R
S
aaa
bbb
ccc
(LID)
B
M
(INSULATOR)
B
M
C
F
E
A
T
A
SEATING
PLANE
(FLANGE)
CASE 465 - 06
ISSUE G
NI - 780
MRF7S21210HR3
INCHES
MIN
MAX
1.335
1.345
0.380
0.390
0.125
0.170
0.495
0.505
0.035
0.045
0.003
0.006
1.100 BSC
0.057
0.067
0.170
0.210
0.774
0.786
0.772
0.788
.118
.138
0.365
0.375
0.365
0.375
0.005 REF
0.010 REF
0.015 REF
MILLIMETERS
MIN
MAX
33.91
34.16
9.65
9.91
3.18
4.32
12.57
12.83
0.89
1.14
0.08
0.15
27.94 BSC
1.45
1.70
4.32
5.33
19.66
19.96
19.60
20.00
3.00
3.51
9.27
9.53
9.27
9.52
0.127 REF
0.254 REF
0.381 REF
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
4X U
(FLANGE)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M−1994.
2. CONTROLLING DIMENSION: INCH.
3. DELETED
4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY
FROM PACKAGE BODY.
4X Z
(LID)
B
1
2X
2
B
(FLANGE)
K
D
bbb
M
T A
B
M
N
M
ccc
M
R
(LID)
M
T A
M
B
M
ccc
M
T A
M
M
B
M
aaa
M
T A
M
S
(INSULATOR)
bbb
M
T A
(LID)
B
M
(INSULATOR)
B
M
H
C
3
E
A
A
(FLANGE)
F
T
SEATING
PLANE
CASE 465A - 06
ISSUE H
NI - 780S
MRF7S21210HSR3
DIM
A
B
C
D
E
F
H
K
M
N
R
S
U
Z
aaa
bbb
ccc
INCHES
MIN
MAX
0.805
0.815
0.380
0.390
0.125
0.170
0.495
0.505
0.035
0.045
0.003
0.006
0.057
0.067
0.170
0.210
0.774
0.786
0.772
0.788
0.365
0.375
0.365
0.375
−−− 0.040
−−− 0.030
0.005 REF
0.010 REF
0.015 REF
MILLIMETERS
MIN
MAX
20.45
20.70
9.65
9.91
3.18
4.32
12.57
12.83
0.89
1.14
0.08
0.15
1.45
1.70
4.32
5.33
19.61
20.02
19.61
20.02
9.27
9.53
9.27
9.52
−−−
1.02
−−−
0.76
0.127 REF
0.254 REF
0.381 REF
STYLE 1:
PIN 1. DRAIN
2. GATE
5. SOURCE
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
13
PRODUCT DOCUMENTATION
Refer to the following documents to aid your design process.
Application Notes
• AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
• EB212: Using Data Sheet Impedances for RF LDMOS Devices
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
July 2008
• Initial Release of Data Sheet
1
Jan. 2009
• Added MRF7S21210HR3 part to data sheet, p. 1
• Added Fig. 1, Test Circuit Schematic and Microstrip list for MRF7S21210HR3, p. 4
• Added Fig. 2, Test Circuit Component Part Layout for MRF7S21210HR3, p. 5
• Table 6, Test Circuit Component Designations and Values - MRF7S21210HSR3, changed Part Number
and Manufacturer for R1, R2 from CRCW12061002FKEA, Vishay to WCR120610KL, Welwyn and for R3
from CRCW12061000FKEA, Vishay to 232272461009, Phycomp, p. 6
• Added Fig. 11, MTTF versus Junction Temperature, p. 9
• Added 465 - 06 (NI - 780) package isometric, p. 1, and Mechanical Outline, p. 12
MRF7S21210HR3 MRF7S21210HSR3
14
RF Device Data
Freescale Semiconductor
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MRF7S21210HR3 MRF7S21210HSR3
Document
Number:
RF
Device
Data MRF7S21210H
Rev. 1, 1/2009
Freescale
Semiconductor
15
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