ON NTLJD3183CZTBG Power mosfet 20 v/−20 v, 4.7 a/−4.0 a, î¼coolâ ¢ complementary, 2x2 mm, wdfn package Datasheet

NTLJD3183CZ
Power MOSFET
20 V/−20 V, 4.7 A/−4.0 A, mCoolt
Complementary, 2x2 mm, WDFN Package
Features
• WDFN 2x2 mm Package with Exposed Drain Pads for Excellent
•
•
•
•
•
Thermal Conduction
Lowest RDS(on) in 2x2 mm Package
Footprint Same as SC−88 Package
Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
ESD Protected
This is a Pb−Free Device
V(BR)DSS
N−Channel
20 V
Applications
P−Channel
−20 V
• Optimized for Battery and Load Management Applications in
•
•
•
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Portable Equipment
Load Switch
Level Shift Circuits
DC−DC Converters
D2
Parameter
t≤5s
N−Channel
Continuous Drain
Current (Note 2)
P−Channel
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
Steady
State
Steady
State
Symbol
Value
Unit
VDSS
VGS
ID
V
V
A
PD
20
±8.0
3.8
2.7
4.7
−3.2
−2.3
−4.0
1.5
W
ID
2.3
2.6
A
TA = 85°C
1.9
TA = 25°C
ID
−2.2
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 25°C
ID
TA = 85°C
Steady
TA = 25°C
State
N−Ch
Pulsed Drain Current
tp = 10 ms
P−Ch
Operating Junction and Storage Temperature
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
December, 2008 − Rev. 0
4.7 A
86 mW @ 2.5 V
4.2 A
120 mW @ 1.8 V
3.5 A
100 mW @ −4.5 V
−4.0 A
144 mW @ −2.5 V
−3.3 A
200 mW @ −1.8 V
−2.8 A
MARKING
DIAGRAM
WDFN6
CASE 506AN
Pin 1
1 JNMG
2
G
3
6
5
4
JN = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
A
PIN CONNECTIONS
D1
S1
1
6
D1
G1
2
5
G2
D2
3
4
S2
D2
A
−1.6
PD
0.71
W
IDM
18
−16
−55 to
150
260
A
TJ, TSTG
TL
°C
(Top View)
ORDERING INFORMATION
Device
1
Package
Shipping†
NTLJD3183CZTAG
WDFN6 3000/Tape & Reel
(Pb−Free)
NTLJD3183CZTBG
WDFN6 3000/Tape & Reel
(Pb−Free)
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size
of 30 mm2, 2 oz Cu.
© Semiconductor Components Industries, LLC, 2008
ID MAX
D1
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Drain−to−Source Voltage
Gate−to−Source Voltage
N−Channel
Steady
Continuous Drain
State
Current (Note 1)
t≤5s
P−Channel
Steady
Continuous Drain
State
Current (Note 1)
t≤5s
Steady
Power Dissipation
State
(Note 1)
RDS(on) MAX
68 mW @ 4.5 V
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTLJD3183CZ/D
NTLJD3183CZ
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Junction−to−Ambient – Steady State (Note 3)
RqJA
83
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
177
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
54
Unit
SINGLE OPERATION (SELF−HEATED)
°C/W
DUAL OPERATION (EQUALLY HEATED)
Junction−to−Ambient – Steady State (Note 3)
RqJA
58
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
133
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
40
°C/W
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
V(BR)DSS
N
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
VGS = 0 V
P
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
V(BR)DSS/TJ
N
Ref to 25°C
P
IDSS
IGSS
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
N
ID = 250 mA
20
ID = −250 mA
−20
V
ID = 250 mA
15
ID = −250 mA
13
1.0
TJ = 25°C
mA
−1.0
10
TJ = 85°C
−10
±10
VDS = 0 V, VGS = ±8.0 V
P
mV/°C
mA
±10
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
VGS(TH)
N
VGS = VDS
P
Gate Threshold Temperature
Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
N
Ref to 25°C
P
RDS(on)
gFS
ID = 250 mA
0.4
1.0
ID = −250 mA
−0.4
−1.0
ID = 250 mA
−3.0
ID = −250 mA
2.0
mV/°C
N
VGS = 4.5 V , ID = 2.0 A
34
68
P
VGS = −4.5 V , ID = −2.0 A
68
100
N
VGS = 2.5 V , ID = 2.0 A
42
86
P
VGS = −2.5 V, ID = −2.0 A
90
144
N
VGS = 1.8 V , ID = 1.7 A
53
120
P
VGS = −1.8 V, ID = −1.7 A
125
200
N
VDS = 5.0 V, ID = 2.0 A
7.0
P
VDS = −5.0 V , ID = −2.0 A
6.5
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2
V
mW
S
NTLJD3183CZ
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
Test Conditions
Min
Typ
Max
Unit
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Output Capacitance
CISS
COSS
N
VDS = 10 V
355
P
VDS = −10 V
450
VDS = 10 V
70
VDS = −10 V
90
VDS = 10 V
50
N
P
Reverse Transfer Capacitance
f = 1.0 MHz, VGS = 0 V
CRSS
N
QG(TOT)
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
4.6
7.0
P
VGS = −4.5 V, VDS = −10 V, ID = −3.8 A
5.2
7.8
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
0.3
P
VGS = −4.5 V, VDS = −10 V, ID = −3.8 A
0.3
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
0.6
P
VGS = −4.5 V, VDS = −10 V, ID = −3.8 A
0.84
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
1.15
P
VGS = −4.5 V, VDS = −10 V, ID = −3.8 A
1.5
P
Total Gate Charge
Threshold Gate Charge
pF
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
VDS = −10 V
62
nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
N
VGS = 4.5 V, VDD = 5 V,
ID = 2.0 A, RG = 2.0 W
td(OFF)
5.5
15
tf
14
td(ON)
6.6
tr
td(OFF)
ns
6.2
VGS = −4.5 V, VDD = −5 V,
ID = −2.0 A, RG = 2.0 W
P
tf
9.0
14
12.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
N
IS = 1.0 A
0.65
1.0
IS = −1.0 A
−0.73
−1.0
IS = 1.0 A
0.55
IS = −1.0 A
−0.62
N
IS = 1.0 A
21
P
IS = −1.0 A
23
N
IS = 1.0 A
10.5
P
IS = −1.0 A
13
IS = 1.0 A
10.5
P
IS = −1.0 A
10
N
IS = 1.0 A
7.0
P
IS = −1.0 A
10
P
N
P
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
tRR
ta
tb
QRR
N
VGS = 0 V, TJ = 25 °C
VGS = 0 V, TJ = 125 °C
VGS = 0 V,
dIS / dt = 100 A/ms
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
V
ns
nC
NTLJD3183CZ
N−CHANNEL TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
10
ID, DRAIN CURRENT (AMPS)
8
1.6 V
6
TJ = 25°C
1.4 V
4
2
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
1.8 V
VGS = 2 V to 5 V
1.2 V
1.0 V
0
1
2
3
5
4
VDS ≥ 5 V
8
6
4
TJ = 25°C
2
TJ = 125°C
0
0
0.5
2
2.5
Figure 2. Transfer Characteristics
0.06
TJ = 125°C
0.04
TJ = 25°C
0.02
TJ = −55°C
0
2.0
4.0
6.0
8.0
3
0.12
TJ = 25°C
0.10
0.08
VGS = 1.8 V
0.06
VGS = 2.5 V
0.04
VGS = 4.5 V
0.02
0
1
2
3
ID, DRAIN CURRENT (AMPS)
4
5
6
7
8
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
100000
VGS = 0 V
ID = 2 A
VGS = 4.5 V
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
1.5
Figure 1. On−Region Characteristics
VGS = 4.5 V
1.5
1
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.08
1.75
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
10
1.25
1.0
10000
TJ = 150°C
1000
TJ = 125°C
0.75
0.5
−50
−25
0
25
50
75
100
125
150
100
0
4
8
12
16
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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20
NTLJD3183CZ
N−CHANNEL TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
TJ = 25°C
VDS = VGS = 0 V
800
V GS, GATE-TO-SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
1000
600
Ciss
400
Crss
200
Coss
0
10
5
VGS
0
VDS
5
10
15
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
4
3
VGS
2
QGS
QGD
1
0
ID = 3.8 A
TJ = 25°C
0
1
3
2
4
QG, TOTAL GATE CHARGE (nC)
5
2.5
VDD = 5.0 V
ID = 2.0 A
VGS = 4.5 V
IS, SOURCE CURRENT (AMPS)
100
tf
td(off)
tr
10
td(on)
1
10
RG, GATE RESISTANCE (OHMS)
2
VGS = 0 V
TJ = 25°C
1.5
1
0.5
0
0
100
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
0.6
0.2
0.4
0.8
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
10
100 ms
1 ms
10 ms
1
0.1
0.01
VGS = 20 V
SINGLE PULSE
TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
1.0
Figure 10. Diode Forward Voltage versus Current
100
ID, DRAIN CURRENT (AMPS)
t, TIME (ns)
QT
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
Figure 7. Capacitance Variation
1
5
dc
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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5
100
NTLJD3183CZ
P−CHANNEL TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
−ID, DRAIN CURRENT (AMPS)
−2.0 V
6
−1.8 V
−1.6 V
4
−1.4 V
2
−1.2 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
8
TJ = 25°C
−2.2 V
VGS = −2.5 V to −5 V
−1.0 V
0
1
2
3
4
5
VDS ≥ 5 V
6
4
TJ = 25°C
2
TJ = 125°C
0
0
0.5
VGS = −4.5 V
TJ = 125°C
0.06
TJ = 25°C
0.04
TJ = −55°C
0.02
2.0
2.5
4.0
6.0
8.0
TJ = 25°C
0.28
0.24
VGS = −1.8 V
0.20
0.16
VGS = −2.5 V
0.12
0.08
VGS = −4.5 V
0.04
0
1.5
100000
−IDSS, LEAKAGE (nA)
1.25
1.0
0.75
25
50
75
100
4.5
5.5
6.5
7.5
Figure 15. On−Resistance versus Drain
Current and Gate Voltage
VGS = 0 V
ID = −2 A
VGS = −4.5 V
0
3.5
2.5
−ID, DRAIN CURRENT (AMPS)
Figure 14. On−Resistance versus Drain
Current
−25
3
0.32
−ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
2
Figure 13. Transfer Characteristics
0.08
0.5
−50
1.5
Figure 12. On−Region Characteristics
0.1
1.5
1
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.12
1.75
TJ = −55°C
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
8
125
150
10000
TJ = 150°C
1000
100
TJ = 125°C
0
4
8
12
16
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 16. On−Resistance Variation with
Temperature
Figure 17. Drain−to−Source Leakage Current
versus Voltage
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6
20
NTLJD3183CZ
P−CHANNEL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
TJ = 25°C
VGS = 0 V
-V GS, GATE-TO-SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
600
Ciss
400
200
Coss
0
0
Crss
5
10
15
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
20
5
QT
4
3
VGS
QGS
2
1
0
ID = −3.8 A
TJ = 25°C
0
Figure 18. Capacitance Variation
3
5
2
4
QG, TOTAL GATE CHARGE (nC)
6
2
100
−IS, SOURCE CURRENT (AMPS)
VDD = −5.0 V
ID = −2.0 A
VGS = −4.5 V
td(off)
tf
tr
10
td(on)
1
10
RG, GATE RESISTANCE (OHMS)
VGS = 0 V
TJ = 25°C
1.5
1
0.5
0
0
100
Figure 20. Resistive Switching Time
Variation versus Gate Resistance
0.6
0.2
0.4
0.8
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
10
100 ms
1 ms
10 ms
1
0.1
0.01
VGS = 20 V
SINGLE PULSE
TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
1.0
Figure 21. Diode Forward Voltage versus Current
100
−ID, DRAIN CURRENT (AMPS)
t, TIME (ns)
1
Figure 19. Gate−To−Source and
Drain−To−Source
Voltage versus Total Charge
1000
1
QGD
dc
1
10
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 22. Maximum Rated Forward Biased
Safe Operating Area
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7
100
NTLJD3183CZ
EFFECTIVE TRANSIENT THERMAL RESISTANCE
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
1000
100
D = 0.5
0.2
0.1
10
*See Note 2 on Page 1
P(pk)
0.05
0.02
1 0.01
t1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.1
0.000001
0.00001
0.0001
0.001
0.01
t, TIME (s)
0.1
Figure 23. Thermal Response
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8
1
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) RqJA(t)
10
100
1000
NTLJD3183CZ
PACKAGE DIMENSIONS
WDFN6, 2x2
CASE 506AN−01
ISSUE D
D
PIN ONE
REFERENCE
EXPOSED Cu
PLATING
ÍÍÍ
ÍÍÍ
ÍÍÍ
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÉÉÉ ÇÇ
ÇÇÇ
ÇÇÇ ÉÉ
A
B
MOLD CMPD
DETAIL B
OPTIONAL
CONSTRUCTIONS
E
DIM
A
A1
A3
b
D
D2
E
E2
e
F
K
L
L1
0.10 C
0.10 C
TOP VIEW
L1
DETAIL A
A3
DETAIL B
0.10 C
L
L
OPTIONAL
CONSTRUCTIONS
A
0.08 C
NOTE 4
A1
C
SIDE VIEW
0.10 C A
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
SEATING
PLANE
1.74
B
1
3
1.10
6X
DETAIL A
E2
6
K
4
2X
0.77
D2
F
D2
L
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
2.00 BSC
0.57
0.67
2.00 BSC
0.90
1.10
0.65 BSC
0.15 BSC
0.25 REF
0.30
0.20
--0.10
6X
0.47
2.30
0.10 C A
B
PACKAGE
OUTLINE
b
0.10 C A
e
0.05 C
1
B
NOTE 3
6X
BOTTOM VIEW
0.35
0.65
PITCH
DIMENSIONS: MILLIMETERS
ON Semiconductor and
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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NTLJD3183CZ/D