AD ADM1485JRZ 5 v low power eia rs-485 transceiver Datasheet

a
FEATURES
Meets EIA RS-485 Standard
30 Mbps Data Rate
Single 5 V Supply
–7 V to +12 V Bus Common-Mode Range
High Speed, Low Power BiCMOS
Thermal Shutdown Protection
Short-Circuit Protection
Driver Propagation Delay: 10 ns
Receiver Propagation Delay: 15 ns
High-Z Outputs with Power Off
Superior Upgrade for LTC1485
APPLICATIONS
Low Power RS-485 Systems
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
GENERAL DESCRIPTION
The ADM1485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and
complies with both RS-485 and RS-422 EIA Standards. The part
contains a differential line driver and a differential line receiver.
Both the driver and the receiver may be enabled independently.
When disabled, the outputs are three-stated.
The ADM1485 operates from a single 5 V power supply. Excessive
power dissipation caused by bus contention or by output shorting
is prevented by a thermal shutdown circuit. This feature forces
the driver output into a high impedance state if, during fault conditions, a significant temperature increase is detected in the internal
driver circuitry.
Up to 32 transceivers may be connected simultaneously on a bus,
but only one driver should be enabled at any time. It is important,
therefore, that the remaining disabled drivers do not load the bus.
To ensure this, the ADM1485 driver features high output
impedance when disabled and also when powered down.
5 V Low Power
EIA RS-485 Transceiver
ADM1485
FUNCTIONAL BLOCK DIAGRAM
8-Lead
ADM1485
RO
R
VCC
RE
B
DE
A
DI
D
GND
This minimizes the loading effect when the transceiver is not being
used. The high impedance driver output is maintained over the
entire common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM1485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology. All inputs and outputs contain
protection against ESD; all driver outputs feature high source
and sink current capability. An epitaxial layer is used to guard
against latch-up.
The ADM1485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at typical data rates
of 30 Mbps while low skew minimizes EMI interference.
The part is fully specified over the commercial and industrial
temperature range and is available in PDIP, SOIC, and small
MSOP packages.
REV. '
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/461-3113
© 2012 Analog Devices, Inc. All rights reserved.
ADM1485–SPECIFICATIONS (V
CC
Parameter
Typ
Min
= 5 V ⴞ 5%. All specifications TMIN to TMAX, unless otherwise noted.)
DRIVER
Differential Output Voltage, VOD
VOD3
Δ|VOD| for Complementary Output States
Common-Mode Output Voltage VOC
Δ|VOD| for Complementary Output States
Output Short-Circuit Current (VOUT = High)
Output Short-Circuit Current (VOUT = Low)
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH
Logic Input Current (DE, DI)
RECEIVER
Differential Input Threshold Voltage, VTH
Input Voltage Hysteresis, ΔVTH
Input Resistance
Input Current (A, B)
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH
Logic Enable Input Current (RE)
CMOS Output Voltage Low, VOL
CMOS Output Voltage High, VOH
Short-Circuit Output Current
Three-State Output Leakage Current
2.0
1.5
1.5
35
35
Max
Unit Test Conditions/Comments
5.0
5.0
5.0
5.0
0.2
3
0.2
250
250
0.8
V
V
V
V
V
V
V
mA
mA
V
V
μA
R = ∞, Test Circuit 1
VCC = 5 V, R = 50 Ω (RS-422), Test Circuit 1
R = 27 Ω (RS-485), Test Circuit 1
VTST = –7 V to +12 V, Test Circuit 2
R = 27 Ω or 50 Ω, Test Circuit 1
R = 27 Ω or 50 Ω, Test Circuit 1
R = 27 Ω or 50 Ω
–7 V ≤ VO ≤ +12 V
–7 V ≤ VO ≤ +12 V
–7 V ≤ VCM ≤ +12 V
VCM = 0 V
–7 V ≤ VCM ≤ +12 V
VIN = +12 V
VIN = –7 V
85
± 1.0
V
mV
kΩ
mA
mA
V
V
μA
V
V
mA
μA
2.2
1
mA
mA
Digital Inputs = GND or VCC
Digital Inputs = GND or VCC
2.0
± 1.0
–0.2
+0.2
70
12
1
–0.8
0.8
2.0
±1
0.4
4.0
7
POWER SUPPLY CURRENT
ICC (Outputs Enabled)
ICC (Outputs Disabled)
1.0
0.6
IOUT = +4.0 mA
IOUT = –4.0 mA
VOUT = GND or VCC
0.4 V ≤ VOUT ≤ 2.4 V
Specifications subject to change without notice.
TIMING SPECIFICATIONS (V
CC
= 5 V ⴞ 5%. All specifications TMIN to TMAX, unless otherwise noted.)
Parameter
DRIVER
Propagation Delay Input to Output tPLH, tPHL
Driver O/P to O/P tSKEW
Driver Rise/Fall Time tR, tF
Driver Enable to Output Valid
Driver Disable Timing
Matched Enable Switching
|tAZH –tBZL|, |tBZH –tAZL|
Matched Disable Switching
|tAHZ –tBLZ|, |tBHZ –tALZ|
RECEIVER
Propagation Delay Input to Output tPLH, tPHL
Skew |tPLH –tPHL|
Receiver Enable tEN1
Receiver Disable tEN2
Tx Pulse Width Distortion
Rx Pulse Width Distortion
Min
Typ
Max
Unit Test Conditions/Comments
2
10
1
8
10
10
0
15
5
15
25
25
2
ns
ns
ns
ns
ns
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3
RL = 110 Ω, CL = 50 pF, Test Circuit 4
RL = 110 Ω, CL = 50 pF, Test Circuit 4
RL = 110 Ω, CL = 50 pF, Test Circuit 4*
0
2
ns
RL = 110 Ω, CL = 50 pF, Test Circuit 4*
15
30
5
20
20
ns
ns
ns
ns
ns
ns
CL = 15 pF, Test Circuit 5
CL = 15 pF, Test Circuit 5
CL = 15 pF, RL = 1 kΩ, Test Circuit 6
CL = 15 pF, RL = 1 kΩ, Test Circuit 6
8
5
5
1
1
*Guaranteed by characterization.
Specifications subject to change without notice.
–2–
REV. '
ADM1485
ABSOLUTE MAXIMUM RATINGS*
PIN FUNCTION DESCRIPTIONS
(TA = 25°C, unless otherwise noted.)
Pin Mnemonic Function
No.
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Inputs
Driver Input (DI) . . . . . . . . . . . . . . . .–0.3 V to VCC + 0.3 V
Control Inputs (DE, RE) . . . . . . . . . .–0.3 V to VCC + 0.3 V
Receiver Inputs (A, B) . . . . . . . . . . . . . . . . . . –9 V to +14 V
Outputs
Driver Outputs (A, B) . . . . . . . . . . . . . . . . . . –9 V to +14 V
Receiver Output . . . . . . . . . . . . . . . . .–0.5 V to VCC + 0.5 V
Power Dissipation 8-Lead MSOP . . . . . . . . . . . . . . . 900 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . 206°C/W
Power Dissipation 8-Lead PDIP . . . . . . . . . . . . . . . . 500 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . 130°C/W
Power Dissipation 8-Lead SOIC . . . . . . . . . . . . . . . . 450 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . 170°C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . . 0°C to 70°C
Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods of time may affect device reliability.
1
RO
2
RE
3
DE
4
DI
5
6
GND
A
7
8
B
VCC
Receiver Output. When enabled if A > B
by 200 mV, then RO = High. If A < B by
200 mV, then RO = Low.
Receiver Output Enable. A low level
enables the receiver output, RO. A high
level places it in a high impedance state.
Driver Output Enable. A high level enables
the driver differential outputs, A and B. A low
level places it in a high impedance state.
Driver Input. When the driver is enabled,
a logic low on DI forces A low and B high
while a logic high on DI forces A high and
B low.
Ground Connection, 0 V.
Noninverting Receiver Input A/Driver
Output A.
Inverting Receiver Input B/Driver Output B
Power Supply, 5 V ± 5%.
PIN CONFIGURATION
RO 1
RE 2
Table I. Transmitting
Inputs
ADM1485
VCC
7
B
TOP VIEW
DE 3 (Not to Scale) 6 A
Outputs
DI 4
DE
DI
B
A
1
1
0
1
0
X
0
1
Z
1
0
Z
Table II. Receiving
RE
Inputs
A-B
Outputs
RO
0
0
0
1
≥ +0.2 V
≤ –0.2 V
Inputs Open
X
1
0
1
Z
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM1485 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. '
8
–3–
5 GND
ADM1485
Test Circuits
VCC
A
R
RL
S1
0V OR 3V
VOD
S2
DE
R
CL
B
VOC
VOUT
DE IN
Test Circuit 4. Driver Enable/Disable
Test Circuit 1. Driver Voltage Measurement
375⍀
A
VOD3
VTST
60⍀
VOUT
RE
B
CL
375⍀
Test Circuit 5. Receiver Propagation Delay
Test Circuit 2. Driver Voltage Measurement
VCC
+1.5V
A
S1
CL1
RL
S2
–1.5V
RLDIFF
RE
CL2
B
CL
VOUT
RE IN
Test Circuit 3. Driver Propagation Delay
Test Circuit 6. Receiver Enable/Disable
Switching Characteristics
3V
1.5V
0V
1.5V
tPLH
tPHL
A, B
B
0V
0V
tPLH
tPHL
1/2VO
VO
A
tSKEW = 円tPLH – tPHL円
VO
VOH
90% POINT
90% POINT
RO
0V
–VO
10% POINT
1.5V
tSKEW = 円tPLH – tPHL円
tR
VOL
tF
Figure 3. Receiver Propagation Delay
Figure 1. Driver Propagation Delay, Rise/Fall Timing
3V
3V
DE
1.5V
1.5V
RE
1.5V
1.5V
0V
0V
tZL
tLZ
tZL
2.3V
A, B
VOL + 0.5V
tLZ
1.5V
R
tZH
tHZ
tZH
VOH
VOL + 0.5V
O/P LOW
VOL
A, B
1.5V
10% POINT
VOL
tHZ
O/P HIGH
VOH – 0.5V
2.3V
R
0V
1.5V
VOH
VOH – 0.5V
0V
Figure 2. Driver Enable/Disable Timing
Figure 4. Receiver Enable/Disable Timing
–4–
REV. '
Typical Performance Characteristics–ADM1485
0.40
50
I = 8mA
45
0.35
OUTPUT VOLTAGE – V
OUTPUT CURRENT – mA
40
35
30
25
20
15
10
0.30
0.25
0.20
5
0
0
0.25
0.50
0.75
1.25
1.50
1.00
OUTPUT VOLTAGE – V
1.75
0.15
–50
2.00
0
90
–2
80
–4
70
–6
–8
–10
–12
–14
25
50
TEMPERATURE – ⴗC
75
100
125
60
50
40
30
20
–16
–18
3.50
0
TPC 4. Receiver Output Low Voltage vs. Temperature
OUTPUT CURRENT – mA
OUTPUT CURRENT – mA
TPC 1. Output Current vs. Receiver Output Low Voltage
–25
10
0
3.75
4.00
4.25
4.50
OUTPUT VOLTAGE – V
4.75
5.00
0
TPC 2. Output Current vs. Receiver Output High Voltage
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT VOLTAGE – V
3.5
4.0
4.5
TPC 5. Output Current vs. Driver Differential
Output Voltage
2.15
4.55
I = 8mA
DIFFERENTIAL VOLTAGE – V
OUTPUT VOLTAGE – V
4.50
4.45
4.40
4.35
4.30
4.25
2.10
2.05
2.00
1.95
4.20
4.15
–50
–25
0
25
50
75
TEMPERATURE – ⴗC
100
1.90
–50
125
TPC 3. Receiver Output High Voltage vs. Temperature
REV. '
–25
0
25
50
75
TEMPERATURE – ⴗC
100
TPC 6. Driver Differential Output
Voltage vs. Temperature, RL = 26.8 Ω
–5–
125
ADM1485
0.7
100
90
0.6
0.5
70
| tPLH – tPHL |
60
TIME – ns
OUTPUT CURRENT – mA
80
50
40
0.4
0.3
30
0.2
20
0.1
10
0
0
0.5
1.5
2.5
2.0
3.0
OUTPUT VOLTAGE – V
1.0
3.5
4.0
0
–50
4.5
TPC 7. Output Current vs. Driver Output Low Voltage
–25
0
25
50
75
TEMPERATURE – ⴗC
100
125
TPC 10. Rx Skew vs. Temperature
6
0
–10
5
–30
4
–40
TIME – ns
OUTPUT CURRENT – mA
–20
–50
–60
–70
3
| tPHLA – tPHLB |
2
–80
–90
1
–100
| tPLHA – tPLHB |
–110
–120
0
0.5
1.0
2.0
3.0
1.5
2.5
3.5
OUTPUT VOLTAGE – V
4.0
4.5
0
–50
5.0
0
25
50
75
TEMPERATURE – ⴗC
100
125
TPC 11. Tx Skew vs. Temperature
TPC 8. Output Current vs. Driver Output High Voltage
1.4
1.1
1.2
1.0
DRIVER ENABLED
1.0
0.9
0.8
PWD
SUPPLY CURRENT – mA
–25
0.8
| tPLH – tPHL |
0.6
0.7
0.4
DRIVER DISABLED
0.6
0.2
0.5
–50
–25
0
25
50
TEMPERATURE – ⴗC
75
100
0
–50
125
–25
0
25
50
75
TEMPERATURE – ⴗC
100
125
150
TPC 12. Tx Pulse Width Distortion
TPC 9. Supply Current vs. Temperature
–6–
REV. '
ADM1485
A
DI
4
A
B
B
1, 2
1, 2
RO
3
TPC 13. Unloaded Driver Differential Outputs
TPC 16. Driver/Receiver Propagation Delays High to Low
A
A
B
B
1, 2
1, 2
TPC 14. Loaded Driver Differential Outputs
TPC 17. Driver Output at 30 Mbps
DI
4
A
B
1, 2
RO
3
TPC 15. Driver/Receiver Propagation Delays Low to High
REV. '
–7–
ADM1485
APPLICATION INFORMATION
Differential Data Transmission
Differential data transmission is used to reliably transmit data at
high rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts and
noise signals that appear as common-mode voltages on the line.
There are two main standards approved by the Electronics
Industries Association (EIA) that specify the electrical characteristics of transceivers used in differential data transmission.
As with any transmission line, it is important that reflections are
minimized. This can be achieved by terminating the extreme ends
of the line using resistors equal to the characteristic impedance
of the line. Stub lengths of the main line should also be kept as
short as possible. A properly terminated transmission line appears
purely resistive to the driver.
RT
The RS-422 standard specifies data rates up to 10 MBaud and
line lengths up to 4000 ft. A single driver can drive a transmission
line with up to 10 receivers.
In order to cater to true multipoint communications, the RS-485
standard was defined. This standard meets or exceeds all the
requirements of the RS-422 but also allows for up to 32 drivers
and 32 receivers to be connected to a single bus. An extended common-mode range of –7 V to +12 V is defined. The most
significant difference between the RS-422 and the RS-485 is the
fact that the drivers may be disabled, thereby allowing more than
one (32 in fact) to be connected to a single line. Only one driver
should be enabled at a time, but the RS-485 standard contains
additional specifications to guarantee device safety in the event of
line contention.
Table III. Comparison of RS-422 and RS-485 Interface Standards
Specification
RS-422
RS-485
Transmission Type
Maximum Cable Length
Minimum Driver Output Voltage
Driver Load Impedance
Receiver Input Resistance
Receiver Input Sensitivity
Receiver Input Voltage Range
No. of Drivers/Receivers per Line
Differential
4000 ft.
±2 V
100 Ω
4 kΩ min
± 200 mV
–7 V to +7 V
1/10
Differential
4000 ft.
± 1.5 V
54 Ω
12 kΩ min
± 200 mV
–7 V to +12 V
32/32
Cable and Data Rate
The transmission line of choice for RS-485 communications is a
twisted pair. Twisted pair cable tends to cancel common-mode
noise and also causes cancellation of the magnetic fields generated
by the current flowing through each wire, thereby reducing the
effective inductance of the pair.
The ADM1485 is designed for bidirectional data communications
on multipoint transmission lines. A typical application showing
a multipoint transmission network is illustrated in Figure 5.
An RS-485 transmission line can have as many as 32 transceivers
on the bus. Only one driver can transmit at a particular time,
but multiple receivers may be enabled simultaneously.
RT
D
D
R
R
R
D
R
D
Figure 5. Typical RS-485 Network
Thermal Shutdown
The ADM1485 contains thermal shutdown circuitry that protects
the part from excessive power dissipation during fault conditions.
Shorting the driver outputs to a low impedance source can result
in high driver currents. The thermal sensing circuitry detects the
increase in die temperature and disables the driver outputs. The
thermal sensing circuitry is designed to disable the driver outputs
when a die temperature of 150°C is reached. As the device cools,
the drivers are re-enabled at 140°C.
Propagation Delay
The ADM1485 features very low propagation delay, ensuring
maximum baud rate operation. The driver is well balanced,
ensuring distortion free transmission.
Another important specification is a measure of the skew between
the complementary outputs. Excessive skew impairs the noise
immunity of the system and increases the amount of electromagnetic interference (EMI).
Receiver Open-Circuit Fail-Safe
The receiver input includes a fail-safe feature that guarantees a
logic high on the receiver when the inputs are open circuit or
floating.
–8–
REV. '
ADM1485
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497)
5
1
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
012407-A
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 6. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
3.20
3.00
2.80
1
5
5.15
4.90
4.65
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.40
0.25
6°
0°
0.23
0.09
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 7. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
REV. F
–9–
0.80
0.55
0.40
10-07-2009-B
0.15
0.05
COPLANARITY
0.10
ADM1485
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
070606-A
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
Figure 8. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model1
ADM1485JNZ
ADM1485JRZ
ADM1485JR-REEL
ADM1485JRZ-REEL
ADM1485ANZ
ADM1485ARMZ
ADM1485ARMZ-REEL
ADM1485ARMZ-REEL7
ADM1485ARZ
ADM1485ARZ-REEL
ADM1485ARZ-REEL7
ADM1485JCHIPS
1
Temperature Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead PDIP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Package Option
N-8
R-8
R-8
R-8
N-8
RM-8
RM-8
RM-8
R-8
R-8
R-8
Die
Brand
M42
M42
M42
Z = RoHS Compliant Part.
–10–
REV. F
ADM1485
REVISION HISTORY
8/12—Rev. E to Rev. F
Changed Data Rates of Up to 5 Mbps to Typical Data Rates
of 30 Mbps .......................................................................................... 1
Updated Outline Dimensions ......................................................... 9
Changes to Ordering Guide ..........................................................10
9/03—Data Sheet changed from REV. D to REV. E.
Change to SPECIFICATIONS ......................................................... 2
Changes to ORDERING GUIDE ................................................... 3
Updated OUTLINE DIMENSIONS .............................................. 9
7/03—Data Sheet changed from REV. C to REV. D.
Changes to SPECIFICATIONS ...................................................... 2
Changes to ABSOLUTE MAXIMUM RATINGS ......................... 3
Updated ORDERING GUIDE......................................................... 3
1/03—Data Sheet changed from REV. B to REV. C.
Change to SPECIFICATIONS ......................................................... 2
Change to ORDERING GUIDE ...................................................... 3
12/02—Data Sheet changed from REV. A to REV. B.
Deleted Q-8 Package .......................................................... Universal
Edits to FEATURES .......................................................................... 1
Edits to GENERAL DESCRIPTION .............................................. 1
Edits, additions to SPECIFICATIONS ........................................... 2
Edits, additions to ABSOLUTE MAXIMUM RATINGS............. 3
Additions to ORDERING GUIDE .................................................. 3
TPCs updated and reformatted ....................................................... 5
Addition of 8-Lead MSOP Package ................................................ 9
Update to OUTLINE DIMENSIONS ............................................. 9
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00063-0-8/12(F)
REV. F
–11–