ON NTD4905N Power mosfet 30 v, 67 a, single n−channel, dpak/ipak Datasheet

NTD4905N
Power MOSFET
30 V, 67 A, Single N−Channel, DPAK/IPAK
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These are Pb−Free Devices
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V(BR)DSS
Applications
RDS(on) MAX
4.5 mW @ 10 V
30 V
• CPU Power Delivery
• DC−DC Converters
ID MAX
67 A
7.0 mW @ 4.5 V
D
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
TA = 25°C
Unit
VDSS
30
V
VGS
"20
V
ID
16.3
A
TA = 100°C
PD
2.63
W
Continuous Drain
Current (RqJA) (Note
2)
TA = 25°C
ID
12
A
Continuous Drain
Current (RqJC)
(Note 1)
8.3
TA = 25°C
PD
1.4
W
TC = 25°C
ID
66
A
TC = 100°C
Power Dissipation
(RqJC) (Note 1)
Pulsed Drain Current
TA = 100°C
tp=10ms
Current Limited by Package
PD
44
W
TA = 25°C
IDM
264
A
TA = 25°C
IDmaxPkg
90
A
TJ, Tstg
−55 to
175
°C
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
L = 0.1 mH, IL(pk) = 35 A, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
4
1 2
1
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
2 3
1
2
3
CASE 369AD
CASE 369D
IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)
47
TC = 25°C
Operating Junction and Storage Temperature
4
4
TA = 25°C
Power Dissipation
(RqJA) (Note 2)
S
11.5
Power Dissipation
(RqJA) (Note 1)
Steady
State
N−Channel
G
IS
40
A
dV/dt
6.5
V/ns
EAS
61
mJ
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
4
Drain
YWW
49
05NG
Gate−to−Source Voltage
Continuous Drain
Current (RqJA)
(Note 1)
Value
YWW
49
05NG
Drain−to−Source Voltage
Symbol
YWW
49
05NG
Parameter
2
1 2 3
1 Drain 3
Gate Source Gate Drain Source 1 2 3
Gate Drain Source
Y
WW
4905N
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
June, 2009 − Rev. 0
1
Publication Order Number:
NTD4905N/D
NTD4905N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
RqJC
3.4
°C/W
Junction−to−Case (Drain)
Junction−to−Tab (Drain)
RqJC−TAB
4.3
Junction−to−Ambient − Steady State (Note 1)
RqJA
57
Junction−to−Ambient − Steady State (Note 2)
RqJA
109
1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
15
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = "20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
"100
nA
2.2
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
gFS
1.6
4.0
VGS = 10 V
VGS = 4.5 V
Forward Transconductance
1.0
ID = 30 A
3.9
ID = 15 A
3.9
ID = 30 A
5.4
ID = 15 A
5.4
VDS = 1.5 V, ID = 30 A
mV/°C
4.5
mW
7.0
65
S
2340
pF
CHARGES AND CAPACITANCES
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1.0 MHz,
VDS = 15 V
763
27
14
VGS = 4.5 V, VDS = 15 V,
ID = 30 A
nC
3.7
6.8
2.2
VGS = 10 V, VDS = 15 V,
ID = 30 A
33
nC
13.8
ns
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
tr
td(off)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
20.5
21.3
tf
5.4
td(on)
9.7
tr
td(off)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
19.7
27.8
3.6
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTD4905N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
TJ = 25°C
0.86
1.1
V
TJ = 125°C
0.74
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Time
VGS = 0 V,
IS = 30 A
ns
37.5
VGS = 0 V, dIs/dt= 100 A/ms,
IS = 30 A
19
18.5
QRR
31
nC
Source Inductance (Note 5)
LS
2.85
nH
Drain Inductance, DPAK
LD
0.0164
Drain Inductance, IPAK (Note 5)
LD
Gate Inductance (Note 5)
LG
4.9
Gate Resistance
RG
1.0
PACKAGE PARASITIC VALUES
TA = 25°C
5. Assume terminal length of 110 mils.
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3
1.88
2.0
W
NTD4905N
TYPICAL PERFORMANCE CURVES
3.8 V
TJ = 25°C
3.6 V
80
70
3.4 V
60
3.2 V
50
3.0 V
40
30
2.8 V
20
2.6 V
1
3
2
4
5
50
TJ = 125°C
40
TJ = 25°C
30
20
TJ = −55°C
2
3
2.5
3.5
4
Figure 2. Transfer Characteristics
ID = 30 A
TJ = 25°C
0.009
0.007
0.005
3
4
5
6
7
8
9
10
0.007
TJ = 25°C
0.006
VGS = 4.5 V
0.005
0.004
VGS = 10 V
0.003
20
30
40
50
60
70
80
90
100 110
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10,000
VGS = 0 V
ID = 30 A
VGS = 10 V
1.8
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
60
Figure 1. On−Region Characteristics
0.011
2.0
70
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.013
2.2
80
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.015
0.003
90
10
0
2.4 V
0
VDS ≥ 10 V
100
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
4 V to 6 V
90
10
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
110
10 V
ID, DRAIN CURRENT (AMPS)
110
100
1.6
1.4
1.2
1.0
TJ = 150°C
1000
TJ = 125°C
100
TJ = 85°C
0.8
0.6
−50 −25
10
0
25
50
75
100
125
150
175
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Drain Voltage
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4
30
NTD4905N
2800
C, CAPACITANCE (pF)
TJ = 25°C
VGS = 0 V
Ciss
2400
VGS , GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES
2000
1600
1200
Coss
800
400
Crss
0
3600
t, TIME (ns)
10
15
20
25
30
8
5
QGS
4
3
2
1
0
td(off)
tf
tr
td(on)
10
VDD = 15 V
VGS = 10 V
ID = 30 A
TJ = 25°C
0
10
RG, GATE RESISTANCE (OHMS)
100 ms
VGS = 10 V
SINGLE PULSE
TC = 25°C
1 ms
10 ms
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
I D, DRAIN CURRENT (AMPS)
10 ms
0.1
35
40
20
15
10
TJ = 125°C
5
TJ = 25°C
0.8
0.9
0.5
0.6
0.7
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
1.0
Figure 10. Diode Forward Voltage vs. Current
100
0.1
10
15
20
25
30
QG, TOTAL GATE CHARGE (nC)
VGS = 0 V
0
0.4
100
1000
1
5
25
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
10
QGD
30
VDD = 15 V
ID = 15 A
VGS = 10 V
1
VGS
7
6
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
100
1
QT
9
Figure 7. Capacitance Variation
3200
1000
5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
IS, SOURCE CURRENT (AMPS)
0
12
11
10
70
ID = 35 A
60
50
40
30
20
10
0
25
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
175
NTD4905N
TYPICAL PERFORMANCE CURVES
100
R(t) (C/W)
10
50% (DUTY CYCLE)
20%
10%
5.0%
2.0%
1.0
1.0%
0.1
SINGLE PULSE
0.01
PSi TAB-A
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1.0
10
100
1000
PULSE TIME (s)
Figure 13. FET Thermal Response
90
VDS = 1.5 V
80
70
GFS (S)
60
50
40
30
20
10
0
0
10
20
30
50
40
ID (A)
60
70
80
90
Figure 14. GFS vs ID
ORDERING INFORMATION
Package
Shipping†
NTD4905NT4G
DPAK
(Pb−Free)
2500 / Tape & Reel
NTD4905N−1G
IPAK
(Pb−Free)
75 Units / Rail
NTD4905N−35G
IPAK Trimmed Lead
(Pb−Free)
75 Units / Rail
Order Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NTD4905N
PACKAGE DIMENSIONS
DPAK
CASE 369AA−01
ISSUE A
−T−
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
E
R
4
A
S
1
2
3
DIM
A
B
C
D
E
F
H
J
L
R
S
U
V
Z
Z
H
U
F
J
L
D 2 PL
0.13 (0.005)
M
T
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.101
5.80
0.228
3.0
0.118
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.025 0.035
0.018 0.024
0.030 0.045
0.386 0.410
0.018 0.023
0.090 BSC
0.180 0.215
0.024 0.040
0.020
−−−
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.63
0.89
0.46
0.61
0.77
1.14
9.80 10.40
0.46
0.58
2.29 BSC
4.57
5.45
0.60
1.01
0.51
−−−
0.89
1.27
3.93
−−−
NTD4905N
PACKAGE DIMENSIONS
C
B
V
IPAK (STRAIGHT LEAD DPAK)
CASE 369D−01
ISSUE B
E
R
4
1
2
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
Z
A
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3
−T−
SEATING
PLANE
K
J
F
D
G
H
M
T
3.5 MM IPAK, STRAIGHT LEAD
CASE 369AD−01
ISSUE O
E
E2
A1
D2
D
L1
NOTES:
1.. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2.. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM TERMINAL TIP.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD GATE OR MOLD FLASH.
L
T
SEATING
PLANE
A
E3
L2
A1
b1
2X
e
A2
3X
E2
b
0.13
M
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
3 PL
0.13 (0.005)
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
T
D2
DIM
A
A1
A2
b
b1
D
D2
E
E2
E3
e
L
L1
L2
MILLIMETERS
MIN
MAX
2.19
2.38
0.46
0.60
0.87
1.10
0.69
0.89
0.77
1.10
5.97
6.22
4.80
−−−
6.35
6.73
4.70
−−−
4.45
5.46
2.28 BSC
3.40
3.60
−−−
2.10
0.89
1.27
OPTIONAL
CONSTRUCTION
ON Semiconductor and
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NTD4905N/D