HD74LV221A Dual Monostable Multivibrators REJ03D0326–0600Z (Previous ADE-205-271D (Z)) Rev.6.00 Jun. 23, 2004 Description The HD74LV221A features output pulse-duration control by three methods. In the first method, the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. The basic pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. Pulse duration can be reduced by taking CLR low. Features • • • • • VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74LV221AFPEL HD74LV221ARPEL HD74LV221ATELL SOP–16 pin (JEITA) SOP–16 pin (JEDEC) TSSOP–16 pin FP–16DAV FP–16DNV TTP–16DAV FP RP T EL (2,000 pcs/reel) EL (2,500 pcs/reel) ELL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs Outputs CLR A B Q Q L X X H H ↑ X H X L ↓ L X X L ↑ H H L L L H H H Note: H: L: X: ↑: ↓: High level Low level Immaterial Low to high transition High to low transition : High level pulse : Low level pulse Rev.6.00 Jun. 23, 2004 page 1 of 13 HD74LV221A Pin Arrangement 16 VCC 1A 1 1B 2 15 1Rext / Cext 1CLR 3 14 1Cext 1Q 4 13 1Q 2Q 5 12 2Q 2Cext 6 11 2CLR 2Rext / Cext 7 10 2B GND 8 9 2A (Top view) Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input voltage range*1 Output voltage range*1, 2 VCC VI VO V V V Input clamp current Output clamp current Continuous output current IIK IOK IO Continuous current through VCC or GND ICC or IGND –0.5 to 7.0 –0.5 to 7.0 –0.5 to VCC + 0.5 –0.5 to 7.0 –20 ±50 ±25 ±50 Maximum power dissipation at 3 Ta = 25°C (in still air)* PT Storage temperature Tstg 785 500 –65 to 150 mA mA mA mA mW Conditions Output: H or L VCC: OFF VI < 0 VO < 0 or VO > VCC VO = 0 to VCC SOP TSSOP °C Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Rev.6.00 Jun. 23, 2004 page 2 of 13 HD74LV221A Recommended Operating Conditions Item Symbol Min Typ Max Unit Supply voltage range VCC Input voltage range Output voltage range Output current VI VO IOH 2.0 0 0 — — — — — — — — 0 0 0 — — — — — — — — — — — — — — 5.5 5.5 VCC –50 –2 –6 –12 50 2 6 12 200 100 20 V V V µA mA IOL µA mA Input transition rise or fall rate ∆t /∆v External timing resistance Rext 5 1 — — — — kΩ External timing capacitance Power-up ramp rate Operating free-air temperature Cext ∆t /∆VCC Ta — 1 –40 unlimited — — — — 85 F ms/V °C ns/V Conditions VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.0 V VCC ≥ 2.3 V Note: Unused or floating inputs must be held high or low. Logic Diagram A Q Q Q Q B CLR CLR Rev.6.00 Jun. 23, 2004 page 3 of 13 HD74LV221A DC Electrical Characteristics Ta = –40 to 85°C Item Symbol VCC (V) Min Typ Max Unit Input voltage VIH 1.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 — — — — VCC – 0.1 2.0 2.48 3.8 — — — — — — — — — — — — — — — — — — — — — — — — — — — — 0.5 VCC × 0.3 VCC × 0.3 VCC × 0.3 — — — — 0.1 0.4 0.44 0.55 ±1 ±2.5 V Input current Input current Rext / Cext IIN IIN 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Min to Max 2.3 3.0 4.5 Min to Max 2.3 3.0 4.5 0 to 5.5 5.5 Quiescent supply current ICC 5.5 — — Active state supply current (per circuit) ∆ICC — — Output leakage current IOFF 2.3 3.0 4.5 5.5 0 — Input capacitance CIN 3.3 — VIL Output voltage VOH VOL Test Conditions µA µA IOH = –50 µA IOH = –2 mA IOH = –6 mA IOH = –12 mA IOL = 50 µA IOL = 2 mA IOL = 6 mA IOL = 12 mA VIN = 5.5 V or GND VIN = VCC or GND 20 µA VIN = VCC or GND, IO = 0 µA VIN = VCC or GND Rext/Cext = 0.5 VCC — 220 280 650 975 5 µA VI or VO = 0 V to 5.5 V 4.0 — pF VI = VCC or GND V V Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Rev.6.00 Jun. 23, 2004 page 4 of 13 HD74LV221A Switching Characteristics VCC = 2.5 ± 0.2 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Propagation delay time tPLH tPHL tw twQ 13.3 15.5 10.9 12.5 13.5 15.9 — 170 100 31.4 36.0 25.0 32.8 33.4 38.0 — 260 110 1.0 1.0 1.0 1.0 1.0 1.0 6.5 — 90 37.0 42.0 29.5 34.5 39.0 44.0 — 320 110 ns Pulse width — — — — — — 6.0 — 90 ns ns µs 0.9 1.0 1.1 0.9 1.1 ms — ±1 — — — % Output pulse width ∆twQ Test Conditions FROM (Input) TO (Output) CL = 15 pF A or B Q or Q CL = 50 pF CL = 15 pF CLR Q or Q CL = 50 pF CL = 15 pF CLR Q or Q (Trigger) CL = 50 pF A, B or CLR CL = 50 pF, Cext = 28 pF, Rext = 2 kΩ CL = 50 pF, Cext = 0.01 µF, Rext = 10 kΩ CL = 50 pF, Cext = 0.1 µF, Rext = 10 kΩ CL = 50 pF VCC = 3.3 ± 0.3 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Propagation delay time tPLH tPHL tw twQ 9.9 11.6 8.3 9.7 9.9 11.6 — 150 100 20.6 24.1 15.8 19.3 22.4 25.9 — 240 110 1.0 1.0 1.0 1.0 1.0 1.0 5.0 — 90 24.0 27.5 18.5 22.0 26.0 29.5 — 300 110 ns Pulse width — — — — — — 5.0 — 90 ns ns µs 0.9 1.0 1.1 0.9 1.1 ms — ±1 — — — % Output pulse width ∆twQ Rev.6.00 Jun. 23, 2004 page 5 of 13 Test Conditions FROM (Input) TO (Output) CL = 15 pF A or B Q or Q CL = 50 pF CL = 15 pF CLR Q or Q CL = 50 pF CL = 15 pF CLR Q or Q (Trigger) CL = 50 pF A, B or CLR CL = 50 pF, Cext = 28 pF, Rext = 2 kΩ CL = 50 pF, Cext = 0.01 µF, Rext = 10 kΩ CL = 50 pF, Cext = 0.1 µF, Rext = 10 kΩ CL = 50 pF HD74LV221A Switching Characteristics (cont) VCC = 5.0 ± 0.5 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Propagation delay time tPLH tPHL tw twQ 7.3 8.7 6.2 7.4 7.3 8.6 — 140 100 12.0 14.0 9.4 11.4 12.9 14.9 — 200 110 1.0 1.0 1.0 1.0 1.0 1.0 5.0 — 90 14.0 16.0 11.0 13.0 15.0 17.0 — 240 110 ns Pulse width — — — — — — 5.0 — 90 ns ns µs 0.9 1.0 1.1 0.9 1.1 ms — ±1 — — — % Output pulse width ∆twQ Test Conditions FROM (Input) TO (Output) CL = 15 pF A or B Q or Q CL = 50 pF CL = 15 pF CLR Q or Q CL = 50 pF CL = 15 pF CLR Q or Q (Trigger) CL = 50 pF A, B or CLR CL = 50 pF, Cext = 28 pF, Rext = 2 kΩ CL = 50 pF, Cext = 0.01 µF, Rext = 10 kΩ CL = 50 pF, Cext = 0.1 µF, Rext = 10 kΩ CL = 50 pF Operating Characteristics CL = 50 pF Ta = 25°C Item Symbol VCC (V) Min Typ Max Unit Test Conditions Power dissipation capacitance CPD 3.3 5.0 — — 74.0 86.0 — — pF f = 10 MHz Test Circuit VCC Cext − VCC Cext = 28 pF or 100 pF or 0.01 µF or 0.1 µF Rext = 1 kΩ or 2 kΩ or 10 kΩ + Cext Rext/ Cext A Refer to Function Table Input Rext VCC Output Q C L = 15 pF or 50 pF B Q CLR GND Output C L = 15 pF or 50 pF Note : C L includes the probe and jig capacitance. Rev.6.00 Jun. 23, 2004 page 6 of 13 HD74LV221A Timing diagram t rr A B CLR Rext/ Cext Q tw tw t w +t rr Caution in use In order to prevent any malfunctions due to noise, connect a high frequency performance capacitor between Vcc and GND, and keep the wiring between the External components and Cext, Rext/Cext pins as short as possible. Large values of Cext may cause problems when powering down the HD74LV221A because of the amount of energy stored in the capacitor. When a system containing this device is powered down, the capacitor may discharge from Vcc through the protection diodes at pin 7 or pin 15. Current through the input protection diodes must be limited to 20 mA; therefore, the turn-off time of the Vcc power supply must not be faster than t = Vcc • Cext/(20 mA). For example, if Vcc = 5 V and Cext = 22 µF, the Vcc supply must turn off no faster than t = (5 V) • (22 µF)/ 20 mA = 5.5 ms. This is usually not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of Vcc to zero volts occurs, the HD74LV221A may sustain damage. To avoid this possibility, use an external calmping diode. The input pins for unused circuit should be used under conditions to fix the outputs to avoid malfunction cased by noises. Also, it's recommended that Rext / Cext terminals are open and external parts are not connected to. Rev.6.00 Jun. 23, 2004 page 7 of 13 HD74LV221A • Waveform − 1 Input A tf VCC 90% 50% 10% GND tr VCC 90% 50% Input B 10% GND tf tr 90% 50% Input CLR 10% tr 90% 50% 10% 90% 50% 10% VCC GND t w (L) t PLH (trigger) t PHL VOH Output Q 50% VCC 50% VCC VOL t PHL (trigger) t PLH VOH Output Q 50% VCC 50% VCC VOL Rev.6.00 Jun. 23, 2004 page 8 of 13 HD74LV221A • Waveform − 2 tf tr 90% 50% Input A 10% tr 90% 50% 10% t w (H) tf GND t w (L) tr tf 90% 50% Input B VCC 90% 50% 10% 90% 50% 10% 10% t w (L) VCC 90% 50% 10% GND t w (H) VOH Output Q 50% VCC 50% VCC VOL t w (out) VOH 50% VCC Output Q 50% VCC VOL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t r ≤ 3 ns, t f ≤ 3 ns 2. The output are measured one at a time with one transition per measurement. Application Data Vcc = 2.5 V t WQ (µs) 10000.0 1000.0 Output pulse width 100.0 10.0 Rext 1 kΩ 10 kΩ 100 kΩ 1 MΩ 1.0 0.1 10 2 10 3 10 4 Timing capacitance Rev.6.00 Jun. 23, 2004 page 9 of 13 10 5 Cext (pF) 10 6 10 7 HD74LV221A Vcc = 3.3 V t WQ (µs) 10000.0 1000.0 Output pulse width 100.0 10.0 Rext 1 kΩ 10 kΩ 100 kΩ 1 MΩ 1.0 0.1 10 2 10 3 10 4 Timing capacitance 10 5 10 6 10 7 Cext (pF) Vcc = 5.0 V t WQ (µs) 10000.0 1000.0 Output pulse width 100.0 10.0 Rext 1 kΩ 10 kΩ 100 kΩ 1 MΩ 1.0 0.1 10 2 10 3 10 4 Timing capacitance Rev.6.00 Jun. 23, 2004 page 10 of 13 10 5 Cext (pF) 10 6 10 7 HD74LV221A Rext = 2 kΩ 1.4 Coefficient of output pulse width K Cext 1000 pF 10000 pF 100000 pF 1000000 pF 1.3 1.2 1.1 1.0 0.9 0.8 2.0 2.5 3.0 3.5 4.0 Supply voltage 4.5 5.0 5.5 6.0 VCC (V) Rext = 10 kΩ 1.4 Coefficient of output pulse width K Cext 1000 pF 10000 pF 100000 pF 1000000 pF 1.3 1.2 1.1 1.0 0.9 0.8 2.0 2.5 3.0 3.5 4.0 Supply voltage Rev.6.00 Jun. 23, 2004 page 11 of 13 4.5 VCC (V) 5.0 5.5 6.0 HD74LV221A Package Dimensions As of January, 2003 Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.40 ± 0.06 0.20 7.80 +– 0.30 1.15 0 ˚ – 8˚ 0.10 ± 0.10 0.80 Max *0.20 ± 0.05 2.20 Max 5.5 16 0.70 ± 0.20 0.15 0.12 M Package Code JEDEC JEITA Mass (reference value) *Ni/Pd/Au plating FP-16DAV — Conforms 0.24 g As of January, 2003 Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.40 ± 0.06 0.15 *0.20 ± 0.05 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0˚ – 8˚ 0.67 0.60 +– 0.20 0.25 M *Ni/Pd/Au plating Rev.6.00 Jun. 23, 2004 page 12 of 13 Package Code JEDEC JEITA Mass (reference value) FP-16DNV Conforms Conforms 0.15 g HD74LV221A As of January, 2003 Unit: mm 4.40 5.00 5.30 Max 16 9 1 8 0.65 1.0 0.13 M 6.40 ± 0.20 *Ni/Pd/Au plating Rev.6.00 Jun. 23, 2004 page 13 of 13 0.10 *0.15 ± 0.05 1.10 Max 0.65 Max 0.07 +0.03 –0.04 *0.20 ± 0.05 0˚ – 8˚ 0.50 ± 0.10 Package Code JEDEC JEITA Mass (reference value) TTP-16DAV — — 0.05 g Sales Strategic Planning Div. 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