AD AD8363ACPZ-WP 50 hz to 6 ghz 50 db trupwr detector Datasheet

Preliminary Technical Data
50 Hz to 6 GHz
50 dB TruPwr™ Detector
AD8363
FEATURES
Accurate RMS-to-DC conversion from 50 Hz to 6 GHz
Single ended input dynamic range of >50 dB
Waveform and modulation independent, such as
WiMAX/GSM/CDMA/WCDMA/TDMA
Linear-in-decibels output, scaled 50 mV/dB
Log conformance error of <0.3 dB
Temperature stability of <±0.5 dB
Voltage supply range of 4.5 V to 5.5 V
Operating temperature range of −40°C to +125°C
Power-down capability
APPLICATIONS
Power amplifier linearization/control loops
Transmitter power controls
Transmitter signal strength indication (TSSI)
RF instrumentation
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The AD8363 is a true RMS responding power detector that has
more than 50 dB measurement range when driven with a
single-ended 50 Ω source. The device provides a solution in a
variety of high frequency communication systems, and in
instrumentation, requiring an accurate response to signal
power. The AD8363 is easy to use with its single-ended 50 Ω
input, only requiring a single 5 V supply, and a few capacitors.
The AD8363 can operate from arbitrarily low frequencies to 6
GHz and can accept inputs that have RMS values from less than
-50 dBm to at least 0 dBm, with large crest factors, exceeding
the requirements for accurate measurement of WiMAX,
WCDMA, and CDMA signals.
The AD8363 can determine the true power of a high frequency
signal having a complex low frequency modulation envelope, or
can be used as a simple low frequency RMS voltmeter. The
high-pass corner generated by its internal offset-nulling loop
can be lowered by a capacitor added on the CHPF pin.
Used as a power measurement device, VOUT is connected to
VSET. The output is then proportional to the logarithm of the
RMS value of the input. In other words, the reading is
presented directly in decibels and is conveniently scaled 1 V per
decade, or 50 mV/dB; other slopes are easily arranged. In
controller mode, the voltage applied to VSET determines the
power level required at the input to null the deviation from the
set point. The output buffer can provide high load currents.
The AD8363 has 1.5 mW power consumption when powered
down by a logic high applied to pin 1, TCM2. It powers up
within about 30 μs to its nominal operating current of 60 mA at
25°C. The AD8363 is supplied in a 4 mm x 4 mm, 16-lead
LFCSP for operation over the temperature range of −40°C to
+125°C. An evaluation board is available.
Rev. PrB
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
AD8363
Preliminary Technical Data
SPECIFICATIONS
Pins 3, 10 - VPOS = VS = 5 V, T = 25°C, ZO = 50 Ω, Single ended input drive, VOUT tied to VSET, VTGT = 1.4, CLPF= 3.9 nF, CHPF=2.7 nF,
Error referred to best-fit line (linear regression), unless otherwise noted.
Table 1.
Parameter
OVERALL FUNCTION
Maximum Input Frequency
RF INPUT INTERFACE
Input Impedance
Common Mode Voltage
100 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
±1.0 dB Dynamic Range
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
Logarithmic Slope
Logarithmic Intercept
Deviation from CW Response
Input Impedance
900 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
±1.0 dB Dynamic Range
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
Logarithmic Slope
Logarithmic Intercept
Deviation from CW Response
Input Impedance
1900 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
±1.0 dB Dynamic Range
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
Logarithmic Slope
Logarithmic Intercept
Deviation from CW Response
Conditions
Min
Pins INHI, INLO, ac-coupled
Single-ended drive
Pin 16 - TCM1=0.47V, Pin 1 - TCM2= 1.0V
PIN = -10 dBm
PIN = -40 dBm
CW input, TA = +25°C
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = -40 dBm
13 dB peak-to-rms ratio (WCDMA), over 40 dB dynamic range
12 dB peak-to-rms ratio (WiMAX), over 40 dB dynamic range
14.0 dB peak-to-rms ratio (16C CDMA2K), over 40 dB dynamic range
256 QAM CF=8
Single-ended drive
TCM1= 0.48V, TCM2= 1.2V
PIN = -10 dBm
PIN = -40 dBm
CW input, TA = +25°C
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = -40 dBm
13 dB peak-to-rms ratio (WCDMA), over 40 dB dynamic range
12 dB peak-to-rms ratio (WiMAX), over 40 dB dynamic range
14.0 dB peak-to-rms ratio (16C CDMA2K), over 40 dB dynamic range
256 QAM CF=8
Single-ended drive
TCM1=0.51V, TCM2= 0.51V
PIN = -10 dBm
PIN = -40 dBm
CW input, TA = +25°C
Typ
Max
Unit
6
GHz
50/TBD
2.7
Ω/pF
V
2.48
0.93
62
8
-54
V
V
dB
±0.5
±0.6
dB
dB
mV/dB
dBm
dB
dB
dB
dB
Ω/pF
51.8
-58
±0.1
±0.1
±0.1
±0.1
50/TBD
2.5
0.91
52
-2
-54
V
V
dB
± 0.5
± 0.7
dB
dB
mV/dB
dBm
dB
dB
dB
dB
Ω/pF
51.9
-57.5
±0.1
±0.1
±0.1
±0.1
50/TBD
2.38
0.8
42
-10
-52
V
V
dB
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = -40 dBm
± 0.5
± 0.6
13 dB peak-to-rms ratio (WCDMA), over 40 dB dynamic range
52
-55
±0.1
dB
dB
mV/dB
dBm
dB
Rev. PrB| Page 2 of 14
Preliminary Technical Data
Parameter
Input Impedance
2140 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
±1.0 dB Dynamic Range
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
Logarithmic Slope
Logarithmic Intercept
Deviation from CW Response
Input Impedance
2600 MHz
Output Voltage: High Power in
Output Voltage: Low Power in
±1.0 dB Dynamic Range
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
Logarithmic Slope
Logarithmic Intercept
Deviation from CW Response
Input Impedance
3.8 GHz
Output Voltage: High Power in
Output Voltage: Low Power in
±1.0 dB Dynamic Range
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
Logarithmic Slope
Logarithmic Intercept
Deviation from CW Response
5.8 GHz
Output Voltage: High Power in
Output Voltage: Low Power in
±1.0 dB Dynamic Range
AD8363
Conditions
12 dB peak-to-rms ratio (WiMAX), over 40 dB dynamic range
14.0 dB peak-to-rms ratio (16C CDMA2K), over 40 dB dynamic range
256 QAM CF=8
Single-ended drive
TCM1=0.49V, TCM2=1.2V
PIN = -10 dBm
PIN = -40 dBm
CW input, TA = +25°C
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = -40 dBm
13 dB peak-to-rms ratio (WCDMA), over 40 dB dynamic range
12 dB peak-to-rms ratio (WiMAX), over 40 dB dynamic range
14.0 dB peak-to-rms ratio (16C CDMA2K), over 40 dB dynamic range
256 QAM CF=8
Single-ended drive
TCM1=, TCM2=
PIN = -10 dBm
PIN = -40 dBm
CW input, TA = +25°C,
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = -40 dBm
13 dB peak-to-rms ratio (WCDMA), over 40 dB dynamic range
12 dB peak-to-rms ratio (WiMAX), over 40 dB dynamic range
14.0 dB peak-to-rms ratio (16C CDMA2K), over 40 dB dynamic range
256 QAM CF=8
Single-ended drive
TCM1=0.56V, TCM2=1.0V
PIN = -15 dBm
PIN = -40 dBm
CW input, TA = +25°C,
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = -40 dBm
13 dB peak-to-rms ratio (WCDMA), over 40 dB dynamic range
12 dB peak-to-rms ratio (WiMAX), over 40 dB dynamic range
14.0 dB peak-to-rms ratio (16C CDMA2K), over 40 dB dynamic range
256 QAM CF=8
TCM1=0.88V, TCM2= 1.0V
PIN = -20 dBm
PIN = -40 dBm
CW input, TA = +25°C
Rev. PrB | Page 3 of 14
Min
Typ
±0.1
±0.1
±0.1
50/TBD
Max
Unit
dB
dB
dB
Ω/pF
2.31
0.72
40
-10
-50
V
V
dB
±0.6
±0.5
dB
dB
mV/dB
dBm
dB
dB
dB
dB
Ω/pF
52.5
-53.5
±0.1
±0.1
±0.1
±0.1
50/TBD
2.15
0.52
35
-12
-40
V
V
dB
TBD
TBD
53.2
-49.9
±0.1
±0.1
±0.1
±0.1
50/TBD
dB
dB
mV/dB
dBm
dB
dB
dB
dB
Ω/pF
2.0
0.5
33
-16
-49
V
V
dB
+/- 1.0
+/- 0.8
54.7
-50
±0.1
±0.1
±0.1
±0.1
dB
dB
mV/dB
dBm
dB
dB
dB
dB
1.5
0.35
30
V
V
dB
AD8363
Parameter
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
Logarithmic Slope
Logarithmic Intercept
Deviation from CW Response
OUTPUT INTERFACE
Output Swing
SETPOINT INPUT
Voltage Range
Input Resistance
Logarithmic Scale Factor
Logarithmic Intercept
TEMPERATURE COMPENSATION
Input Voltage Range
Input Resistance
VOLTAGE REFERENCE
Output Voltage
Current Limit Source/Sink
TEMPERATURE REFERENCE
Output Voltage
Temperature Coefficient
POWER-DOWN INTERFACE
Logic Level to Enable
Logic Level to Disable
Input Current
Enable Time
Disable Time
POWER SUPPLY INTERFACE
Supply Voltage
Quiescent Current
Supply Current
Preliminary Technical Data
Conditions
Min
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = -40 dBm
Typ
-17
-47
Max
Unit
54.5
-47
±0.1
±0.1
±0.1
±0.1
dB
dB
mV/dB
dBm
dB
dB
dB
dB
Voltage Range Min RL≥200 to ground
Voltage Range Max RL≥200 to ground
Source/Sink Current Out held at Vs/2K, to 1%change
.09
Vs-.15
10
v
V
mA
Pin VSET
Log conformance error ≤1 dB, Min 2140 MHz
Log conformance error ≤1 dB, Max 2140 MHz
TBD
TBD
V
72
19
−TBD
kΩ
dB/V
dBm
± 0.6
± 0.7
13 dB peak-to-rms ratio (WCDMA), over 40 dB dynamic range
12 dB peak-to-rms ratio (WiMAX), over 40 dB dynamic range
14.0 dB peak-to-rms ratio (16C CDMA2K), over 40 dB dynamic range
256 QAM CF=8
Pin 6 - VOUT
f = 2140MHz, −40°C ≤ TA ≤ +85°C
f = 2140 MHz, −40°C ≤ TA ≤ +85°C, referred to 50 Ω
Pin 16 - TCM1, Pin 1 - TCM2
0
TCM2
TCM1
Pin 11 - VREF
RF in = −55 dBm
1% change
Pin 8 TEMP
TA = 25°C, RL ≥ 10 kΩ
−40°C ≤ TA ≤ +85°C, RL ≥ 10 kΩ
Pin TCM2 (Pin1)
Logic LO enables Max
Logic HI disables Min
Logic HI TCM2 = 5 V
Logic LO TCM2 = 0 V
TCM2 LO to OUT at .5 dB of final value,
CLPF = 470 pF, CHPF = 220 pF, RF in = 0 dBm
TCM2 HI to OUT at 10% final value,
CLPF = 470 pF, CHPF = 220 pF, RF in = 0 dBm
>1
3
2.5
V
MΩ
3kΩ
2.3
5/0.08
V
mA
1.35
4.8
V
mV/°C
< Vs -.9
Vs -.8
<1
<1
30
V
V
μA
μA
μs
20
μs
Pin VPOS
4.5
25C RF in =-55 dBm
+85 C
When disabled
Rev. PrB| Page 4 of 14
5
60
72
310
5.5
V
mA
mA
μA
Preliminary Technical Data
AD8363
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage VPOS
Input Power (Into Input of Device)
Equivalent Voltage
Internal Power Dissipation
θJA
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering 60 sec)
Rating
5.5 V
23 dBm Evaluate
2 V rms
500 mW
125°C/W
150°C
−40°C to +125°C
−65°C to +150°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrB | Page 5 of 14
AD8363
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
12
11
10
9
VTGT VREF VPOS COMM
13 NCON
TEMP
14 INHI
8
VSET 7
AD8363
15 INLO
VOUT 6
16 TCM1
CLPF 5
TCM2 CHPF VPOS COMM
1
2
3
4
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin
No.
1
Mnemonic
Description
TCM2/PWDN
2
CHPF
3, 10
4, 9
5
VPOS
COMM
CLPF
6
VOUT
7
VSET
8
11
12
TEMP
VREF
VTGT
13
14
NCON
INHI
15
16
INLO
TCM1
A dual function pin used for controlling the amount of nonlinear intercept temperature
compensation and/or shutting down the device. This pin can be connected to the
VREF pin through a voltage divider if the shut down function is not used
Connect to VPOS via a capacitor to determine -3 dB point of the input signal high-pass
filter.
Supply for the device. Connect to +5 V power supply.
System Common Connection. Connect via low impedance to system common.
Connection for Loop Filter Integration (Averaging) Capacitor. Connect a groundreferenced capacitor to this pin. A resistor may be connected in series with this
capacitor to improve loop stability and response time.
Output pin in Measurement Mode (error Amplifier output). In measurement mode,
normally connected directly to VSET. This pin can be used to drive a gain control when
the device is used in controller mode.
The voltage applied to this pin sets the decibel value of the required RF input voltage
that results in zero current flow in the loop integrating capacitor pin, CLPF.
The controls the VGA gain such that a 50mV change in VSET reduces the gain by
approximately 1dB.
Temperature Sensor Output.
General-Purpose Reference Voltage Output of 1.16 V.
Voltage applied to this pin determines the target power at the input of the RF squaring
circuit. The intercept voltage is proportional to the voltage applied to this pin. The use
of a lower target voltage increases the crest factor capacity; however, this may affect
the system loop response.
Not connected.
Single-ended RF input pin. RF input signal is normally AC coupled to this pin through a
coupling capacitor.
Grounded for single ended input
Connect to VREF through a voltage divider or an external DC source. Is used to adjust
Intercept temperature compensation (3K impedance)
Connect via low impedance to system common
Paddle
Rev. PrB| Page 6 of 14
Preliminary Technical Data
AD8363
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, ZO = 50 Ω, Single ended input drive, VOUT tied to VSET, VTGT = 1.4V, CLPF= 3.9 nF, CHPF=2.7 nF, TA = +25°C (Black), –40°C
(Blue), +85°C (red)
3.0
2.5
4
3.6
2.8
2
1.6
-0.5
Error (dB)
1.0
0.5
2.4
Error (dB)
Output Voltage, VOUT (V)
2.0
1.5
3.2
0.0
-1.0
1.2
0.8
-1.5
-2.0
0.4
0
-2.5
-60
-50
-40
-30
-20
-10
0
-3.0
-60
10
-50
-40
-30
-20
-10
0
10
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
Figure 3. VOUT Voltage and Log Conformance vs. Input Amplitude at 100 MHz,
Typical Device, TCM1 = 0.47 V, TCM2 = 1.0 V, Sine Wave, -40C, 25C, 85C
Figure 6. Distribution of VOUT Voltage and Error over Temperature After
Ambient Normalization vs. Input Amplitude for at Least 30Devices from
Multiple Lots, Frequency = 100 MHz, TCM1 = 0.47 V, TCM2 = 1.0 V, Sine Wave40C, 25C, 85C
3.0
4
2.5
3.6
2.0
1.5
2.8
0.5
2
1.6
-0.5
Error (dB)
1.0
2.4
Error (dB)
Output Voltage, VOUT (V)
3.2
0.0
-1.0
1.2
0.8
-1.5
-2.0
0.4
0
-2.5
-60
-50
-40
-30
-20
-10
0
-3.0
10
-60
-50
-40
Input Amplitude, INHI (dBm)
Figure 4. VOUT Voltage and Log Conformance vs. Input Amplitude at 900 MHz,
Typical Device, TCM1 = 0.48 V, TCM2 = 1.2 V, Sine Wave -40C, 25C, 85C
-20
-10
0
10
Figure 7. Distribution of Error over Temperature After Ambient Normalization vs.
Input Amplitude, with reference to 25C, for at Least 30Devices from Multiple
Lots, Frequency = 100 MHz, TCM1 = 0.47 V, TCM2 = 1.0 V, Sine Wave-40C, 25C,
85C
3.0
3.0
2.0
2.0
1.0
1.0
Error (dB)
Error (dB)
-30
Input Amplitude, INHI (dBm)
0.0
0.0
-1.0
-1.0
-2.0
-2.0
-3.0
-3.0
-60
-50
-40
-30
-20
-10
0
10
Input Amplitude, INHI (dBm)
-60
-50
-40
-30
-20
-10
0
10
Input Amplitude, INHI (dBm)
Figure 5. Distribution of VOUT Voltage and Error over Temperature After
Ambient Normalization vs. Input Amplitude for at Least 30 Devices from
Multiple Lots, Frequency =900 MHz, TCM1 = 0.48 V, TCM2 = 1.2 V, Sine Wave40C, 25C, 85C
Rev. PrB | Page 7 of 14
Figure 8. Distribution of Error over Temperature After Ambient Normalization vs.
Input Amplitude, with reference to 25C, for at Least 30Devices from Multiple
Lots,, Frequency =900 MHz, TCM1 = 0.48 V, TCM2 = 1.2 V, Sine Wave-40C, 25C,
85C
Preliminary Technical Data
3.0
3.0
2.0
2.0
1.0
1.0
Error (dB)
Error (dB)
AD8363
0.0
0.0
-1.0
-1.0
-2.0
-2.0
-3.0
-3.0
-60
-50
-40
-30
-20
-10
-60
0
-50
-40
-20
-10
0
Figure 12. Distribution of VOUT Voltage and Error over Temperature After
Ambient Normalization vs. Input Amplitude for at Least 18Devices from
Multiple Lots, Frequency = 1.9 GHz, TCM1 = 0.51 V, TCM2 = 0.51 V, Sine Wave40C, 25C, 85C
3.0
3.0
2.0
2.0
1.0
1.0
Error (dB)
Error (dB)
Figure 9. VOUT Voltage and Log Conformance vs. Input Amplitude at 1.90 GHz,
Typical Device, TCM1 = 0.51 V, TCM2 = 0.51 V, Sine Wave, -40C, 25C, 85C
0.0
0.0
-1.0
-1.0
-2.0
-2.0
-3.0
-3.0
-60
-50
-40
-30
-20
-10
0
-60
10
-50
-40
-30
-20
-10
0
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
Figure 10. VOUT Voltage and Log Conformance vs. Input Amplitude at 2.14 GHz,
Typical Device, TCM1 = 0.49 V, TCM2 = 1.2 V, Sine Wave, -40C, 25C, 85C
Figure 13. Distribution of Error over Temperature After Ambient Normalization
vs. Input Amplitude, with reference to 25C, for at Least 18 Devices from Multiple
Lots, Frequency = 1.9 GHz, TCM1 = 0.51 V, TCM2 = 0.51 V, Sine Wave-40C, 25C,
85C
3.0
3.0
2.0
2.0
1.0
1.0
Error (dB)
Error (dB)
-30
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
0.0
0.0
-1.0
-1.0
-2.0
-2.0
-3.0
-3.0
-60
-50
-40
-30
-20
-10
0
10
-60
-50
-40
-30
-20
-10
0
10
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
Figure 11. Distribution of VOUT Voltage and Error over Temperature After
Ambient Normalization vs. Input Amplitude for at Least 18Devices from
Multiple Lots, Frequency = 2.14 GHz, TCM1 = 0.49 V, TCM2 = 1.2 V, Sine Wave40C, 25C, 85C
Rev. PrB| Page 8 of 14
Figure 14. Distribution of Error over Temperature After Ambient Normalization
vs. Input Amplitude, with reference to 25C, for at Least 18 Devices from Multiple
Lots, Frequency = 2.14 GHz, TCM1 = 0.49 V, TCM2 = 1.2 V, Sine Wave-40C, 25C,
85C
Preliminary Technical Data
AD8363
4
2.5
3.0
3.6
2.0
1.5
2.8
0.5
2
1.6
-0.5
Error (dB)
1.0
2.4
Error (dB)
Output Voltage, VOUT (V)
3.2
0.0
-1.0
1.2
0.8
-1.5
-2.0
0.4
0
-3.0
-2.5
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
-55
5
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
5
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
Figure 15. VOUT Voltage and Log Conformance vs. Input Amplitude at 2.6 GHz,
Typical Device, TADJ = TBD V, Sine Wave-40C, 25C, 85C
4
Figure 18. Distribution of VOUT Voltage and Error over Temperature After
Ambient Normalization vs. Input Amplitude for at Least 17 Devices from
Multiple Lots, Frequency = 2.6 GHz, TCM1 = 0.52 V, TCM2 = 1.1 V, Sine Wave40C, 25C, 85C
3.0
2.5
2.5
3.6
2.0
3.2
1.5
0.5
2
1.6
-0.5
1.2
Output Voltage, VOUT (V)
2.4
Error (dB)
Output Voltage, VOUT (V)
1.5
2.8
1.0
0.5
0.0
-0.5
-1.0
-1.5
0.8
-1.5
-2.0
0.4
-2.5
0
-3.0
-2.5
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-55
-5
-50
-45
-40
-35
Figure 16. VOUT Voltage and Log Conformance vs. Input Amplitude at 3.8 GHz,
Typical Device, TCM1 = 0.56 V, TCM2 = 1.0 V, Sine Wave-40C, 25C, 85C
-25
-20
-15
-10
-5
0
5
Figure 19. Distribution of Error over Temperature After Ambient Normalization
vs. Input Amplitude, with reference to 25C, for at Least 17 Devices from Multiple
Lots, Frequency = 2.6 GHz, TCM1 = 0.52 V, TCM2 = 1.1 V, Sine Wave-40C, 25C,
85C
3.0
3.0
2.0
2.0
1.0
1.0
Error (dB)
Error (dB)
-30
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
0.0
0.0
-1.0
-1.0
-2.0
-2.0
-3.0
-3.0
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
Figure 17. Distribution of VOUT Voltage and Error over Temperature After
Ambient Normalization vs. Input Amplitude for at Least 37 Devices from
Multiple Lots, Frequency = 3.8 GHz, TCM1 = 0.56 V, TCM2 = 1.0 V, Sine Wave40C, 25C, 85C
Rev. PrB | Page 9 of 14
Figure 20. Distribution of Error over Temperature After Ambient Normalization
vs. Input Amplitude, with reference to 25C, for at Least 37 Devices from Multiple
Lots, Frequency = 3.8 GHz, TCM1 = 0.56 V, TCM2 = 1.0 V, Sine Wave-40C, 25C,
85C
AD8363
Preliminary Technical Data
4
3.0
2.5
3.6
2.0
1.5
2.8
0.5
2
1.6
-0.5
Error (dB)
1.0
2.4
Error (dB)
Output Voltage, VOUT (V)
3.2
0.0
-1.0
1.2
0.8
-1.5
-2.0
0.4
0
-3.0
-2.5
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-55
-5
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
Input Amplitude, INHI (dBm)
Input Amplitude, INHI (dBm)
Figure 21. VOUT Voltage and Log Conformance vs. Input Amplitude at 5.8 GHz,
Typical Device, TCM1 = 0.88 V, TCM2 = 1.0 V, Sine Wave-40C, 25C, 85C
Figure 24. Distribution of VOUT Voltage and Error over Temperature After
Ambient Normalization vs. Input Amplitude for at Least 37 Devices from
Multiple Lots, Frequency = 5.8 GHz, TCM1 = 0.88 V, TCM2 = 1.0 V, Sine Wave40C, 25C, 85C
3
3.0
2.5
2.0
2
1.5
1.0
Vout (v)
CW Error
Error 256 QAM
Error QPSK
0
Error (dB)
1
0.5
0.0
-0.5
-1.0
-1
-1.5
-2.0
-2
-2.5
-3.0
-3
-55
-60
-50
-40
-30
-20
-10
0
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
10
Input Amplitude, INHI (dBm)
Pin (dBm)
Figure 22. Error from CW Linear Reference vs. Input Amplitude with Different
Waveforms, 256 QAM, QPSK, Frequency 2140 MHz
Figure 25. Distribution of Error over Temperature After Ambient Normalization
vs. Input Amplitude, with reference to 25C, for at Least 37 Devices from Multiple
Lots, Frequency = 5.8 GHz, TCM1 = 0.88 V, TCM2 = 1.0 V, Sine Wave-40C, 25C,
85C
3.50
3.00
7.00
8.00
1.50
1.00
0.50
0.00
-16.00
1.12E-03
1.08E-03
1.04E-03
1.00E-03
9.60E-04
9.20E-04
8.80E-04
8.40E-04
8.00E-04
7.60E-04
7.20E-04
6.80E-04
Rev. PrB| Page 10 of 14
-13.00
-1.00
6.40E-04
Figure 23. Output Response to RF Burst Input for Various RF Input Levels, Carrier
Frequency 2.14 GHz, CLPF = 470 pF, CHPF=220pF
-10.00
0.00
6.00E-04
P_INHI = -40dbm
-7.00
1.00
5.60E-04
P_INHI = -30dbm
-4.00
2.00
5.20E-04
P_INHI = -20dbm
-1.00
3.00
4.80E-04
P_INHI = -10dbm
2.00
4.00
4.40E-04
3.00E-04
2.80E-04
2.60E-04
2.40E-04
2.20E-04
2.00E-04
1.80E-04
1.60E-04
1.40E-04
1.20E-04
1.00E-04
8.00E-05
6.00E-05
4.00E-05
2.00E-05
0.00E+00
-2.00E-05
-4.00E-05
Time (in seconds)
P_INHI = 0dbm
TCM2 High
5.00
4.00E-04
-0.50
5.00
TCM2 Low
Pulse Voltage, TCM2 (V)
6.00
2.00
Output Voltage, VOUT (V)
Output Voltage, VOUT (V)
2.50
Time (in Seconds)
P_INHI = 0dbm
P_INHI = -40dbm
P_INHI = -10dbm
P_INHI = -50dbm
P_INHI = -20dbm
Pulse on TCM2 (pin1)
P_INHI = -30dbm
Figure 26. Output Response Using Power-Down Mode for Various RF Input
Levels, Carrier Frequency 2.14 GHz, CLPF= 470pF, CHPF = 220pF
Preliminary Technical Data
AD8363
Table 4. Pin Function Descriptions
Component
Function/Notes
Default Value
C6, C10, C11,
C12
Input:
C10=0.1uF, C12=0.1uF,
C6=Open, C11=Open
R7, R10, R11
VTGT:
The AD8363 was designed to be driven single ended. At frequencies below 2.6 GHz, more
dynamic range can be achieved by driving Pin 14 (INHI). In order to do this, C10 and C12
should be populated with an appropriate valued capacitor for the frequency of operation. C6
and C11 should be left open. For frequencies above 2.6 GHz, greater dynamic range can be
achieved by Driving Pin 15 (INLO). This can be done by using an appropriate valued capacitor
for C6 and C11, while leaving C10 and C12 open.
R10=845Ω, R11= 1.4KΩ
R10 and R11 are set up to provide 1.4V to VTGT from VREF. An external voltage can be used if
R10 and R11 are removed.
C4, C5, C7, C13,
R14, R16
Power Supply Decoupling:
R1, R2, R6, R13,
R15
Output Interface--Measurement Mode:
C9, C8, R5
C3
The nominal supply decoupling consists of a 100 pF filter capacitor placed physically close to
the AD8363, a 0 Ω series resistor, and a 0.1 uF capacitor placed closer to the power supply
input pin. The 0 Ω resistor can be replaced with a larger value resistor to add more filtering, at
the expense of a voltage drop.
In measurement mode, a portion of the output voltage is fed back to the VSET pin via R6. The
magnitude of the slope at VOUT can be increased by reducing the portion of VOUT that is fed
back to VSET, using a voltage divider created by R6 and R2 . If a fast responding output is
expected, the 0 Ω resistor on R15 can be removed to reduce parasitics on the output.
Output Interface--Controller Mode:
In this mode, R6 must be open and R13 must have a 0 Ω resistor. In controller mode, the
AD8363 can control the gain of an external component. A setpoint voltage is applied to the
VSET pin, the value of which corresponds to the desired RF input signal level applied to the
AD8363 RF input. If a fast responding output is expected, the 0 Ω resistor on R15 can be
removed to reduce parasitics on the output.
Low-pass filter capacitors:
The low-pass filter capacitors reduce the noise on the output and affect the pulse response
time of the AD8363. The smallest CLPF capacitance should be 400 pF
CHPF capacitor
C4=100 pF, C5=100 pF,
C7= 0.1uF, C13= 0.1uF,
R14= 0 Ω, R16= 0 Ω
R1=0 Ω, R2=Open,
R6=0 Ω, R13 = Open ,
R15 = 0 Ω
C8=Open, C9=0.1uF,
R5=0 Ω
C3= 2700 pF
The CHPF capacitor introduces a high-pass filter effect into the AD8363 transfer function and
can affect the response time. It should be tied to VPOS.
R9, R12
TCM2/PWDN:
R9= Open, R12= Open
The TCM2/PWDN pin controls the amount of nonlinear intercept temperature compensation
and/or shuts down the device. The evaluation board is configured to control this from a test
loop but VREF can be used through a voltage divider created from R9 and R12.
R17, R18
TCM1:
R17=Open, R18=Open
TCM1 controls the intercept temperature compensation (3K impedance). The evaluation board
is configured to control this from a test loop but VREF can be used through a voltage divider
created from R17 and R18
Paddle
The paddle should be tied to both a thermal and electrical ground
Rev. PrB | Page 11 of 14
AD8363
Preliminary Technical Data
EVALUATION BOARD
VREF
VPOS2
TESTLOO P
TESTLOO P
RED
ORANGE
C7
VTGT
0. 1UF
C040 2
TESTLOO P
AGND C
ORANGE
VPOSC
R040 2
R7
0
R14
0
R8
0
R11
R10
R040 2
R040 2
C5
R040 2
R040 2
1. 4K
C040 2
845
VREFC
100PF
AGND C
AGND C
AGND C
R2
OPEN
AGND C
TEMP
12
TESTLOO P
VI OLET
R040 2
TESTLOO P
VSET
C040 2
VOUT
COMM2
C11
9
VPOS2
VREF
AGND C
OPEN
10
WHI TE
VTGT
C10
11
R13
TESTLOO P
YELLOW
R040 2
OPEN
8
0
CLPF
OPEN
5
C9
0. 1uF
C040 2
AGND C
1
TC2_PWD
N
3
2
4
Paddl e
AGND
R18
OPEN
AGND C
R040 2
AGND C
R5
0
TESTLOO P
ORANGE
VREFC
C4
C040 2
C040 2
AGND C
R040 2
R9
OPEN
C8
OPEN
R040 2
C3
C040 2
R12
OPEN
VOUTP
R040 2
DUT1
TCM1
R040 2
AGND C
R040 2
R1
VOUT
CHPF
R17
R040 2
7
I NLO
TCM2_PWD
N
C12
0. 1UF
OPEN
TC1
VSET
16CSP4X4
AD8363
TESTLOO P
ORANGE
16
C040 2
C040 2
C6
I NHI
R15
0
6
15
14
C040 2
R6
0
TEMP
COMM1
IN
NC1
VPOS1
13
0. 1UF
2700PF
AGND C
100PF
AGND C
R040 2
GND
R16
0
AGND C
VPOSC
R040 2
VREFC
VPOS1
Fig 27 Evaluation Board Schematic
Rev. PrB | Page 12 of 14
BLACK
C040 2
AGND C
TESTLOO P
TESTLOO P
BLACK
C13
0. 1UF
RED
GND1
TESTLOO P
AGND C
AGND C
Preliminary Technical Data
AD8363
ASSEMBLY DRAWINGS
Fig 28 Evaluation Board Layout, Top
Fig 30 Evaluation Board Layout, Bottom
Fig 29 Evaluation Board Assembly, Top
Fig 31 Evaluation Board Assembly, Bottom
Rev. PrB | Page 13 of 14
AD8363
Preliminary Technical Data
OUTLINE DIMENSIONS
4.00
BSC SQ
PIN 1
INDICATOR
0.65 BSC
TOP
VIEW
12° MAX
1.00
0.85
0.80
0.60 MAX
PIN 1
INDICATOR
0.60 MAX
13
12
16
1
EXPOSED
PAD
3.75
BSC SQ
0.75
0.60
0.50
(BOTTOM VIEW)
2.25
2.10 SQ
1.95
4
9
8
5
0.25 MIN
1.95 BSC
0.80 MAX
0.65 TYP
0.05 MAX
0.02 NOM
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
COPLANARITY
0.08
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
Ordering Quantity
AD8363ACPZ-R7
40°C to +125°C
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
CP-16-4
1500
AD8363ACPZ-R2
40°C to +125°C
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
CP-16-4
250
AD8363ACPZ-WP
40°C to +125°C
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
CP-16-4
64
AD8363-EVALZ
Evaluation Board
Rev. A | Page 14 of 14
PR07368-0-8/08(PrB)
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