M62353P/FP/GP 8-bit 8ch D/A Converter with Buffer Amplifiers REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Description The M62353 is an integrated circuit semiconductor of CMOS structure with 8 channels of built-in D/A converters with output buffer operational amplifiers. The 3-wire serial interface method is used for the transfer format of digital data to allow connection with microcomputer with minimum wiring. It is able to cascading serial use with DO terminal. The output buffer operational amplifier operates in the whole voltage range from power supply to ground for both input/output. Features • 12-bit serial data input (3-wire serial data transfer method) • Highly stable output buffer operational amplifier allow operation in the all voltage range from power supply to ground. Application Adjustment/control of industrial or home-use electronic equipment, such as VTR camera, VTR set, TV, and CRT display. Block Diagram GND AO1 DI CLK LD DO AO8 VCC 16 15 14 13 12 11 10 9 + − + − 12-bit shift register D0 1 2 3 4 5 6 D7 D8 9 10 D11 Ch1 8 8-bit R-2R + segment D/A converter D/A 8-bit latch Address decoder (8) L ........ .... (8) (8) 8-bit latch Ch2 L 3 8-bit R-2R + segment D/A converter (8) L 4 L 5 L 6 L 7 D/A D/A D/A D/A D/A + − + − + − + − + − + − 1 2 3 4 5 6 7 8 VSS (VrefL) AO2 AO3 AO4 AO5 AO6 AO7 VDD (VrefU) Buffer OP AMP REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 1 of 9 M62353P/FP/GP Pin Arrangement M62353P/FP/GP VSS (VrefL) 1 16 GND AO2 2 15 AO1 AO3 3 14 DI AO4 4 13 CLK AO5 5 12 LD AO6 6 11 DO AO7 VDD (VrefU) 7 10 8 9 AO8 VCC (Top view) Outline: PRDP0016AA-A (16P4) PRSP0016DE-A (16P2N-A) PLSP0016JA-A (16P2E-A) Pin Description Pin No. 14 11 13 12 15 2 3 4 5 6 7 10 9 16 8 1 Pin Name Dl DO CLK LD AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 VCC GND VDD VSS Function Serial data input terminal Serial data output terminal Serial clock input terminal LD terminal input high level then latch circuit data load 8-bit D/A converter output terminal Power supply terminal Digital and analog common GND D/A converter upper reference voltage input terminal D/A converter lower reference voltage input terminal REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 2 of 9 M62353P/FP/GP Block Diagram for Explanation of Terminals DI CLK VCC GND 9 16 14 12-bit shift register 13 D0 D1 D2 D3 D4 D5 D6 D7 (8) D0 ..... D7 D10 D11 ............................... 8 ............................... DO 12 LD ..... D7 8-bit latch 8-bit R-2R + segment D/A converter + − + − ......................................... 11 1 2 3 4 5 6 7 8 D0 8-bit latch 8-bit R-2R + segment D/A converter A8 A1 8 D9 Address decoder (8) 1 D8 15 1 10 AO8 AO1 VDD (VrefU) VSS (VrefL) Absolute Maximum Ratings Item Supply voltage D/A converter upper reference voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 3 of 9 Symbol VCC VDD VIN VO Pd Topr Tstg Ratings –0.3 to +7.0 –0.3 to +7.0 –0.3 to VCC + 0.3 –0.3 to VCC + 0.3 450 (P) / 300 (FP) / 150 (GP) –20 to +85 –40 to +125 Unit V V V V mV °C °C M62353P/FP/GP Electrical Characteristics Digital Part (VCC, VrefU = +5 V ± 10%, VCC ≥ VrefU, GND, VrefL = 0 V, Ta = –20°C to +85°C, unless otherwise noted.) Item Limits Typ Symbol Min Max Unit Supply voltage Circuit current VCC ICC 4.5 — 5.0 1.0 5.5 2.5 V mA Input leak current Input low voltage Input high voltage Output low voltage Output high voltage IILK VIL VIH VOL VOH –10 — 0.8 VCC — VCC – 0.4 — — — — — 10 0.2 VCC — 0.4 — µA V V V V Test Conditions CLK = 1 MHz operation IOA = 0 µA VIN = 0 to VCC IOL = 2.5 mA IOH = –400 µA Analog Part (VCC, VrefU = + 5 V ± 10%, VCC ≥ VrefU, Ta = –20°C to +85°C, unless otherwise noted.) Item Min Limits Typ Max Unit Current dissipation IDD — 0.9 1.7 mA D/A converter upper reference voltage range VDD 3.5 — VCC V D/A converter lower reference voltage range VSS GND — VCC – 3.5 V Buffer amplifier output voltage range VAO IAO — — — VCC – 0.1 VCC – 0.2 1 V Buffer amplifier output drive range 0.1 0.2 –1 mA Differential nonlinearity error Nonlinearity error Zero code error Full scale error Output capacitive load SDL –1.0 — 1.0 LSB SL SZERO SFULL CO –1.5 –2 –2 — — — — — — 5 1.5 2 2 0.1 — LSB LSB LSB µF Ω Buffer amplifier output impedance Symbol RO REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 4 of 9 Test Conditions VrefU = 5 V, VrefL = 0 V Data condition; at maximum current The output dose not necessarily be the value within the reference voltage setting range. The output value is determined by the buffer amplifier output voltage range (VAO) IOA = ±100 µA IOA = ±500 µA Upper side saturation voltage = 0.3 V Lower side saturation voltage = 0.2 V VrefU = 4.79 V VrefL = 0.95 V VCC = 5.5 V (15 mV/LSB) Without load (IAO = ±0 µA) M62353P/FP/GP AC Characteristics (VCC, VrefU = +5 V ± 10%, VCC ≥ VrefU, GND, VrefL = 0 V, Ta = –20 to +85°C, unless otherwise noted.) Item Clock "L" pulse width Clock "H" pulse width Clock rise time Clock fall time Data setup time Data hold time LD setup time LD hold time LD "H" pulse width Data output delay time D/A output setting time Symbol Min Limits Typ Max Unit tCKL tCKH tCR tCF tDCH tCHD tCHL tLDC tLDH tDO tLDD 200 200 — — 30 60 200 100 100 70 — — — — — — — — — — — — — — 200 200 — — — — — 350 300 ns ns ns ns ns ns ns ns ns ns µs tCKH tCF Test Conditions CL ≤ 100 pF CL ≤ 100 pF VAO: 0.5 ↔ 4.5 V The time until the output becomes the final value of 1/2 LSB Timing Chart tCR CLK tCKL tLDC DI tLDH tDCH tCHD tCHL LD tLDD D/A output tDO DO output REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 5 of 9 M62353P/FP/GP Digital Data Format First MSB Last LSB D0 D1 D2 D3 D4 D5 D6 D7 DAC data D8 D9 D10 D11 DAC select data DAC Data D0 0 1 0 1 : 0 1 D1 0 0 1 1 : 1 1 Note: D2 0 0 0 0 : 1 1 D3 0 0 0 0 : 1 1 D4 0 0 0 0 : 1 1 D5 0 0 0 0 : 1 1 D6 0 0 0 0 : 1 1 D7 0 0 0 0 : 1 1 D/A Output (VrefU – VrefL) / 256 × 1 + VrefL (VrefU – VrefL) / 256 × 2 + VrefL (VrefU – VrefL) / 256 × 3 + VrefL (VrefU – VrefL) / 256 × 4 + VrefL : (VrefU – VrefL) / 256 × 255 + VrefL VrefU VrefU = VDD, VrefL = VSS DAC Select Data D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DAC Selection Don’t care AO1 select AO2 select AO3 select AO4 select AO5 select AO6 select AO7 select AO8 select Don’t care Don’t care Don’t care Don’t care Don’t care Don’t care Don’t care Timing Chart (Model) MSB DI D11 LSB D10 CLK LD D/A output REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 6 of 9 D9 D8 ............. .................. D2 D1 D0 M62353P/FP/GP Typical Characteristics Lower Side Saturation Voltage vs. Output Sink Current Upper Side Saturation Voltage vs. Output Source Current 150 Lower Side Saturation Voltage VAOSATL (mV) Upper Side Saturation Voltage VCC-VAOSATU (mV) 150 100 50 100 50 0 0 0 200 400 600 800 1000 Output Source Current IAOD (µA) REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 7 of 9 0 200 400 600 800 1000 Output Sink Current IAOS (µA) M62353P/FP/GP Package Dimensions RENESAS Code PRDP0016AA-A Previous Code 16P4 MASS[Typ.] 1.0g 9 1 8 c *1 E 16 e1 JEITA Package Code P-DIP16-6.3x19-2.54 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. *2 D e1 D E A A1 A2 bp b2 b3 c L A1 A A2 Reference Symbol *3 e *3 bp b3 b2 SEATING PLANE e L JEITA Package Code P-SOP16-5.3x10.1-1.27 RENESAS Code PRSP0016DE-A Previous Code 16P2N-A Min 7.32 18.8 6.15 Nom 7.62 19.0 6.3 Max 7.92 19.2 6.45 4.5 0.51 0.4 0.9 1.4 0.22 0° 2.29 3.0 3.3 0.5 1.0 1.5 0.27 2.54 0.6 1.3 1.8 0.34 15° 2.79 MASS[Typ.] 0.2g E 9 *1 HE 16 Dimension in Millimeters F NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 1 8 Index mark A2 A1 c D Reference Symbol L A *2 e y *3 bp Detail F D E A2 A1 A bp c HE e y L REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 8 of 9 Dimension in Millimeters Min Nom Max 10.0 10.1 10.2 5.2 5.3 5.4 1.8 0.1 0.2 0 2.1 0.35 0.4 0.5 0.18 0.2 0.25 0° 8° 7.5 7.8 8.1 1.12 1.27 1.42 0.1 0.4 0.6 0.8 M62353P/FP/GP JEITA Package Code P-LSSOP16-4.4x5-0.65 RENESAS Code PLSP0016JA-A MASS[Typ.] 0.06g 9 E 16 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. *1 HE Previous Code 16P2E-A F 1 8 Index mark c A2 A1 Reference Dimension in Millimeters Symbol *2 A L D *3 e bp y Detail F D E A2 A A1 bp c HE e y L REJ03D0870-0300 Rev.3.00 Mar 25, 2008 Page 9 of 9 Min 4.9 4.3 Nom Max 5.0 5.1 4.4 4.5 1.15 1.45 0 0.1 0.2 0.17 0.22 0.32 0.13 0.15 0.2 0° 10° 6.2 6.4 6.6 0.53 0.65 0.77 0.10 0.3 0.5 0.7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. 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