AD ADL5321 2.3 ghz to 4.0 ghz rf driver amplifier Datasheet

2.3 GHz to 4.0 GHz
RF Driver Amplifier
ADL5321
Operation: 2.3 GHz to 4.0 GHz
Gain of 14 dB at 2.6 GHz
OIP3 of 41 dBm at 2.6 GHz
P1dB of 25.7 dBm at 2.6 GHz
Noise figure: 4.0 dB at 2.6 GHz
Power supply: 5 V
Power supply current: 90 mA typical
Internal active biasing
Thermally efficient SOT-89 package
ESD rating of ±2 kV (Class 3A)
FUNCTIONAL BLOCK DIAGRAM
GND
(2)
ADL5321
BIAS
1
2
3
RFIN
GND
RFOUT
07307-001
FEATURES
Figure 1.
GENERAL DESCRIPTION
The ADL5321 is a broadband, linear driver RF amplifier that
operates at frequencies from 2.3 GHz to 4.0 GHz. The device
can be used in a wide variety of wired and wireless applications,
including ISM, WLL, PCS, GSM, CDMA, and W-CDMA.
The ADL5321 is fabricated on the GaAs HBT process. The
device is packaged in a low cost SOT-89 that uses an exposed
paddle for excellent thermal impedance. It operates from −40°C
to +85°C, and a fully populated evaluation board is available.
The ADL5321 operates with a 5 V supply voltage and a supply
current of 90 mA.
The ADL5320 is a companion part to the ADL5321 that operates at
similar performance from 400 MHz to 2700 MHz.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062−9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
ADL5321
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Functional Block Diagram .............................................................. 1
Basic Layout Connections ............................................................. 10
General Description ......................................................................... 1
Revision History ............................................................................... 2
Soldering Information and Recommended PCB
Land Pattern................................................................................ 10
Specifications..................................................................................... 3
Matching Procedure................................................................... 11
Typical Scattering Parameters..................................................... 4
WiMAX Operation .................................................................... 12
Absolute Maximum Ratings............................................................ 5
Evaluation Board ............................................................................ 13
ESD Caution.................................................................................. 5
Outline Dimensions ....................................................................... 15
Pin Configuration and Function Descriptions............................. 6
Ordering Guide .......................................................................... 15
REVISION HISTORY
5/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADL5321
SPECIFICATIONS
VCC = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter
OVERALL FUNCTION
Frequency Range
FREQUENCY = 2.6 GHz
Gain 1
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point, P1dB
Output Third-Order Intercept, OIP3
Noise Figure
FREQUENCY = 3.5 GHz
Gain1
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point, P1dB
Output Third-Order Intercept, OIP3
Noise Figure
POWER INTERFACE
Supply Voltage
Supply Current
vs. Temperature
Power Dissipation
1
Conditions
Min
Typ
2.3
Max
Unit
4.0
GHz
13.2
14.0
±0.4
±0.7
±0.07
25.7
41
4.0
14.6
dB
dB
dB
dB
dBm
dBm
dB
11.1
12.0
±0.05
±0.8
±0.07
25.7
38
4.9
12.9
dB
dB
dB
dB
dBm
dBm
dB
4.5
5
90
±6.0
520
5.5
100
V
mA
mA
mW
±100 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, POUT = 5 dBm per tone
±100 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, POUT = 5 dBm per tone
Pin RFOUT
−40°C ≤ TA ≤ +85°C
VCC = 5 V
Guaranteed maximum and minimum specified limits on this parameter are based on six sigma calculations.
Rev. 0 | Page 3 of 16
ADL5321
TYPICAL SCATTERING PARAMETERS
VCC = 5 V and TA = 25°C; the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Frequency
(MHz)
2400
2450
2500
2550
2600
2650
2700
2750
2800
2850
2900
2950
3000
3050
3100
3150
3200
3250
3300
3350
3400
3450
3500
3550
3600
3650
3700
3750
3790
3800
3850
3900
3950
4000
S11
Magnitude (dB)
−4.47
−4.57
−4.62
−4.70
−4.78
−4.88
−4.97
−5.07
−5.23
−5.44
−5.72
−6.00
−6.40
−6.84
−7.32
−7.93
−8.52
−9.06
−9.46
−9.48
−9.18
−8.56
−7.74
−6.90
−6.08
−5.35
−4.73
−4.15
−3.78
−3.68
−3.29
−2.97
−2.67
−2.41
Angle (°)
−176.78
−179.08
+178.53
+176.46
+174.30
+172.49
+170.84
+169.41
+168.34
+167.48
+167.06
+167.08
+167.66
+169.10
+171.08
+174.69
+179.46
−173.89
−165.62
−156.10
−146.31
−138.10
−131.09
−126.03
−122.27
−119.50
−117.43
−115.94
−114.89
−114.66
−113.41
−112.48
−111.68
−110.79
S21
Magnitude (dB)
12.04
12.04
12.03
12.01
11.99
11.97
11.93
11.93
11.86
11.80
11.74
11.69
11.62
11.51
11.44
11.28
11.14
10.95
10.71
10.39
10.03
9.65
9.20
8.70
8.14
7.55
6.93
6.34
5.81
5.69
5.09
4.45
3.86
3.30
Angle (°)
+74.69
+71.96
+69.02
+66.20
+63.23
+60.32
+57.28
+54.11
+51.18
+47.81
+44.61
+41.14
+37.73
+34.13
+30.41
+26.53
+22.45
+18.23
+13.94
+9.45
+5.06
+0.71
−3.47
−7.62
−11.37
−14.86
−18.10
−21.07
−23.21
−23.67
−25.99
−27.94
−29.95
−31.52
Rev. 0 | Page 4 of 16
S12
Magnitude (dB)
−26.63
−26.53
−26.44
−26.38
−26.30
−26.25
−26.20
−26.15
−26.14
−26.16
−26.18
−26.18
−26.22
−26.31
−26.37
−26.51
−26.66
−26.86
−27.11
−27.45
−27.85
−28.28
−28.76
−29.33
−29.96
−30.62
−31.32
−31.98
−32.56
−32.68
−33.35
−34.03
−34.65
−35.23
Angle (°)
+16.98
+15.09
+12.94
+10.91
+8.56
+6.38
+3.90
+1.38
−1.15
−3.88
−6.79
−9.78
−13.00
−16.32
−19.95
−23.60
−27.66
−31.92
−36.45
−41.18
−45.96
−50.83
−55.67
−60.52
−65.27
−69.78
−74.35
−78.77
−82.30
−83.17
−87.33
−91.70
−96.22
−100.84
S22
Magnitude (dB)
−7.98
−8.12
−8.22
−8.33
−8.37
−8.36
−8.25
−8.05
−7.88
−7.59
−7.25
−6.83
−6.37
−5.90
−5.38
−4.92
−4.40
−3.91
−3.45
−3.05
−2.67
−2.33
−2.04
−1.80
−1.60
−1.47
−1.38
−1.29
−1.27
−1.24
−1.20
−1.22
−1.23
−1.23
Angle (°)
−111.37
−113.06
−115.61
−118.13
−121.11
−124.14
−127.48
−130.84
−133.91
−137.02
−139.88
−142.37
−144.60
−146.58
−148.25
−149.46
−150.81
−151.83
−152.90
−153.80
−154.63
−155.41
−156.03
−156.44
−156.77
−156.90
−156.85
−156.62
−156.36
−156.19
−155.59
−154.96
−154.01
−153.20
ADL5321
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage, VCC
Input Power, 50 Ω Impedance
Internal Power Dissipation, Paddle Soldered
θJC, Junction to Paddle
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Rating
6.5 V
20 dBm
683 mW
28.5°C/W
150°C
−40°C to +85°C
−65°C to +150°C
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 5 of 16
ADL5321
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RFIN 1
ADL5321
TOP VIEW
(2) GND
(Not to Scale)
RFOUT 3
07307-002
GND 2
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
2
3
Exposed Paddle
Mnemonic
RFIN
GND
RFOUT
Description
RF Input. This pin requires a dc blocking capacitor.
Ground. Connect this pin to a low impedance ground plane.
RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is connected
to the external power supply. RF path requires a dc blocking capacitor.
Expose Paddle. Internally connected to GND. Solder to a low impedance ground plane.
Rev. 0 | Page 6 of 16
ADL5321
TYPICAL PERFORMANCE CHARACTERISTICS
OIP3 (–40°C)
41
35
40
30
OIP3 (dBm)
P1dB
25
20
GAIN
15
OIP3 (+85°C)
27
38
P1dB (–40°C)
37
26
36
2.525
2.550 2.575 2.600 2.625
FREQUENCY (GHz)
2.650
2.675
34
2.500
2.700
46
15.5
44
15.0
OIP3 (dBm)
+85°C
13.0
24
2.700
40
38
2.5GHz
36
2.7GHz
34
12.5
2.525
2.550
2.575 2.600 2.625
FREQUENCY (GHz)
2.650
2.675
30
–4
2.700
S12
0
6.0
–2
5.5
–4
5.0
–24.6
–6
–24.8
–25.0
–8
S11
–10
S22
NOISE FIGURE (dB)
–24.2
–25.4
2.5
2.6
2.7
FREQUENCY (GHz)
4
6
8
10
12
14
16
18
20
22
2.8
2.9
2.5
Figure 5. Reverse Isolation (S12), Input Return Loss (S11), and
Output Return Loss (S22) vs. Frequency, 2.2 GHz to 2.9 GHz
+25°C
3.5
–14
–16
+85°C
4.0
3.0
07307-005
–25.8
2.4
2
4.5
–12
–25.6
2.3
0
Figure 7. OIP3 vs. POUT and Frequency, 2.5 GHz to 2.7 GHz
S11 (dB) AND S22 (dB)
–24.0
–25.2
–2
POUT (dBm)
Figure 4. Gain vs. Frequency and Temperature, 2.5 GHz to 2.7 GHz
–24.4
07307-007
32
07307-004
12.0
–26.0
2.2
2.675
2.6GHz
+25°C
13.5
2.650
42
–40°C
14.0
2.550 2.575 2.600 2.625
FREQUENCY (GHz)
Figure 6. OIP3 and P1dB vs. Frequency and Temperature,
2.5 GHz to 2.7 GHz
16.0
14.5
2.525
25
P1dB (+85°C)
P1dB (+25°C)
35
07307-003
NOISE FIGURE
5
07307-006
10
11.5
2.500
28
39
Figure 3. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,
2.5 GHz to 2.7 GHz
GAIN (dB)
29
OIP3 (+25°C)
P1dB (dBm)
40
2.0
2.2
–40°C
2.3
2.4
2.5
2.6
FREQUENCY (GHz)
2.7
2.8
2.9
07307-008
GAIN, P1dB, OIP3, NOISE FIGURE (dB, dBm)
OIP3 (5dBm)
0
2.500
S12 (dB)
30
42
45
Figure 8. Noise Figure vs. Frequency and Temperature, 2.2 GHz to 2.9 GHz
Rev. 0 | Page 7 of 16
ADL5321
42
40
29
OIP3 (–40°C)
39
OIP3 (dBM)
P1dB
25
20
15
GAIN
28
38
OIP3 (+85°C)
OIP3 (+25°C)
37
36
P1dB (–40°C)
34
NOISE FIGURE
3.425
3.450
26
35
10
5
27
3.475 3.500 3.525
FREQUENCY (GHz)
3.550
3.575
3.600
P1dB (+25°C)
32
3.400
Figure 9. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,
3.4 GHz to 3.6 GHz
3.425
3.450
25
P1dB (+85°C)
33
3.475 3.500 3.525
FREQUENCY (MHz)
P1dB (dBm)
30
3.550
3.575
07307-012
35
0
3.400
30
41
OIP3 (5dBm)
40
07307-009
GAIN, P1dB, OIP3, NOISE FIGURE (dB, dBm)
45
24
3.600
Figure 12. OIP3 and P1dB vs. Frequency and Temperature,
3.4 GHz to 3.6 GHz
14.0
42
3.4GHz
13.5
40
–40°C
38
12.5
OIP3 (dBm)
GAIN (dB)
13.0
+25°C
12.0
11.5
3.5GHz
36
3.6GHz
34
+85°C
11.0
3.425
3.450
3.475 3.500 3.525
FREQUENCY (GHz)
3.550
3.575
3.600
07307-010
30
–4
Figure 10. Gain vs. Frequency and Temperature, 3.4 GHz to 3.6 GHz
4
6
8 10 12
POUT (dBm)
14
16
18
20
22
8.5
–10
S11
–29
–30
–15
–31
–20
–32
7.5
7.0
NOISE FIGURE (dB)
–28
–5
S11 (dB) AND S22 (dB)
S22
S12
–27
6.5
+85°C
6.0
5.5
+25°C
5.0
4.5
–40°C
4.0
–33
–25
3.5
–34
3.3
3.4
3.5
3.6
3.7
FREQUENCY (MHz)
3.8
3.9
–30
4.0
07307-011
S12 (dB)
2
8.0
–26
–35
3.2
0
Figure 13. OIP3 vs. POUT and Frequency, 3.4 GHz to 3.6 GHz
0
–25
–2
Figure 11. Reverse Isolation (S12), Input Return Loss (S11), and
Output Return Loss (S22) vs. Frequency, 3.2 GHz to 4.0 GHz
3.0
2.5
3.2
3.3
3.4
3.5
3.6
3.7
FREQUENCY (GHz)
3.8
3.9
Figure 14. Noise Figure vs. Frequency and Temperature,
3.2 GHz to 4.0 GHz
Rev. 0 | Page 8 of 16
4.0
07307-014
10.0
3.400
07307-013
32
10.5
30
25
25
20
15
20
15
42.6
OIP3 (dBM)
3.76 3.80 3.84 3.88 3.92 3.96 4.00 4.04 4.08 4.12 4.16
07307-015
42.4
42.2
42.0
41.8
41.6
41.4
41.2
41.0
40.8
40.6
0
40.4
0
40.2
5
40.0
5
39.8
10
39.6
10
NF (dB)
Figure 15. OIP3 Distribution at 2.6 GHz
Figure 18. Noise Figure (NF) Distribution at 2.6 GHz
35
110
30
105
25
SUPPLY CURRENT (mA)
PERCENTAGE (%)
07307-018
PERCENTAGE (%)
30
39.4
PERCENTAGE (%)
ADL5321
20
15
10
100
5.25V
95
90
5.0V
85
80
4.75V
5
P1dB (dBM)
Figure 16. P1dB Distribution at 2.6 GHz
25
20
15
10
07307-017
14.25
14.20
14.15
14.10
14.05
14.00
13.95
13.90
13.85
13.80
13.75
5
13.70
PERCENTAGE (%)
30
GAIN (dB)
50
60
70
80
Figure 19. Supply Current vs. Temperature and Supply Voltage
(Using 2.6 GHz Matching Components)
35
0
0
10 20 30 40
TEMPERATURE (°C)
Figure 17. Gain Distribution at 2.6 GHz
Rev. 0 | Page 9 of 16
07307-019
70
–40 –30 –20 –10
07307-016
27.0
26.8
26.6
26.4
26.2
26.0
25.8
25.6
25.4
25.2
25.0
24.8
24.6
75
0
ADL5321
BASIC LAYOUT CONNECTIONS
The basic connections for operating the ADL5321 are shown in
Figure 20.
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Table 5 lists the required matching components. Capacitors
C1, C2, C3, C4, and C7 are Murata GRM155 series (0402 size)
and Inductor L1 is a Coilcraft 0603CS series (0603 size). For all
frequency bands, the placement of C3 and C7 is critical. From
2500 MHz to 2700 MHz, the placement of C1 is also important.
Table 6 lists the recommended component placement for
various frequencies.
Figure 21 shows the recommended land pattern for the ADL5321.
To minimize thermal impedance, the exposed paddle on the
SOT-89 package underside is soldered down to a ground plane
along with (GND) Pin 2. If multiple ground layers exist, they
should be stitched together using vias. For more information on
land pattern design and layout, refer to the AN-772 application
note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
A 5 V dc bias is supplied through L1 that is connected to RFOUT
(Pin 3). In addition to C4, 10 nF and 10 μF power supply
decoupling capacitors are also required. The typical current
consumption for the ADL5321 is 90 mA.
GND
1.80mm
VCC
(2)
GND
C6 10µF
3.48mm
C5 10nF
C41
5.56mm
0.20mm
ADL5321
λ12
C71
1
2
RFOUT
C11
GND
RFIN
RFIN
L11
3
λ22
λ32
1
λ42 C2
0.86mm
RFOUT
0.62mm
C31
1SEE TABLE 5 FOR FREQUENCY SPECIFIC COMPONENTS.
2SEE TABLE 6 FOR RECOMMENDED COMPONENT SPACING.
07307-027
07307-026
1.27mm
1.50mm
Figure 20. Basic Connections
3.00mm
Figure 21. Recommended Land Pattern
Table 5. Recommended Components for Basic Connections
Frequency (MHz)
2500 to 2700
3400 to 3850
C1 (pF)
1.0
10
C2 (pF)
10
10
C3 (pF)
1.2
1.2
C4 (pF)
10
10
C7 (pF)
Open
1.0
L1 (nH)
9.5
9.5
Table 6. Matching Component Spacing
Frequency (MHz)
2500 to 2700
3400 to 3850
λ1 (mils)
240
90
λ2 (mils)
75
35
Rev. 0 | Page 10 of 16
λ3 (mils)
89
40
λ4 (mils)
325
416
ADL5321
MATCHING PROCEDURE
FIXED LOAD PULL
FREQ = 2.6000 GHz
The ADL5321 is designed to achieve excellent gain and IP3
performance. To achieve this, both input and output matching
networks must present specific impedance to the device. The
matching components listed in Table 5 were chosen to provide
−14 dB input return loss while maximizing OIP3. The load-pull
plots (see Figure 22, Figure 23, and Figure 24) show the load
impedance points on the Smith chart where optimum OIP3,
gain, and output power can be achieved. These load impedance
values (that is, the impedance that the device sees when looking
into the output matching network) are listed in Table 7 and Table 8
for maximum gain and maximum OIP3, respectively. The contours
show how each parameter degrades as it is moved away from
the optimum point.
IP3
MAX = 41.70dBm
AT 0.4705< 86.63
10 CONTOURS, 1.00dBm STEP
(32.00 TO 41.00dBm)
POUT MAX = 14.16dBm
AT 0.6100< 136.24
10 CONTOURS, 1.00dBm STEP
(5.00 TO 14.00dBm)
GT
MAX = 15.02dBm
AT 0.6100< 136.24
10 CONTOURS, 1.00dBm STEP
(6.00 TO 15.00dB)
07307-022
SPECS: OFF
0.404< 93.05
Figure 22. Load-Pull Contours, 2600 MHz
FIXED LOAD PULL
FREQ = 3.5000 GHz
LOAD
IP3
MAX = 41.37dBm
AT 0.6911< 142.11
10 CONTOURS, 1.00dBm STEP
(32.00 TO 41.00dBm)
POUT MAX = 14.96dBm
AT 0.7686< 162.58
10 CONTOURS, 1.00dBm STEP
(5.00 TO 14.00dBm)
GT
MAX = 14.02dBm
AT 0.7686< 162.58
10 CONTOURS, 1.00dBm STEP
(5.00 TO 14.00dB)
SPECS: OFF
To adjust the output match for operation at a different frequency or
if a different trade-off between OIP3, gain, and output impedance
is desired, the following procedure is recommended.
0.875< –147.48
07307-023
From the data shown in Table 7 and Table 8, it becomes clear that
maximum gain and maximum OIP3 do not occur at the same
impedance. This can also be seen on the load-pull contours in
Figure 22 through Figure 24. Therefore, output matching generally
involves compromising between gain and OIP3. In addition, the
load-pull plots demonstrate that the quality of the output
impedance match must be compromised to optimize gain and/
or OIP3. In most applications where line lengths are short and
where the next device in the signal chain presents a low input
return loss, compromising on the output match is acceptable.
LOAD
Figure 23. Load-Pull Contours, 3500 MHz
For example, to optimize the ADL5321 for optimum OIP3 and
gain at 2300 MHz, use the following steps:
2.
3.
4.
Install the recommended tuning components for a 2500 MHz
to 2700 MHz tuning band, but do not install C3 and C7.
Connect the evaluation board to a vector network analyzer
so that input and output return loss can be viewed simultaneously.
Starting with the recommended values and positions for
C3 and C7, adjust the positions of these capacitors along
the transmission line until the return loss and gain are
acceptable. Push-down capacitors that are mounted on
small sticks can be used in this case as an alternative to
soldering. If moving the component positions does not
yield satisfactory results, then the values of C3 and C7
should be increased or decreased (most likely increased
in this case because the user is tuning for a lower frequency).
Repeat the process.
FIXED LOAD PULL
FREQ = 3.6000 GHz
LOAD
IP3
MAX = 41.29dBm
AT 0.7070< 140.65
10 CONTOURS, 1.00dBm STEP
(32.00 TO 41.00dBm)
POUT MAX = 15.63dBm
AT 0.7057< 161.81
10 CONTOURS, 1.00dBm STEP
(6.00 TO 15.00dBm)
GT
MAX = 13.44dBm
AT 0.7057< 161.81
10 CONTOURS, 1.00dBm STEP
(4.00 TO 13.00dB)
SPECS: OFF
Once the desired gain and return loss are realized, OIP3
should be measured. It may be necessary to go back and
forth between return loss/gain and OIP3 measurements
(probably compromising most on output return loss) until
an acceptable compromise is achieved.
Rev. 0 | Page 11 of 16
07307-024
1.
Figure 24. Load-Pull Contours, 3600 MHz
ADL5321
Table 7. Load Conditions for GainMAX
–30
ΓLoad (°)
136.24
162.58
161.81
Gain MAX (dB)
15.02
14.02
13.44
Table 8. Load Conditions for OIP3MAX
Frequency (MHz)
2600
3500
3600
ΓLoad
(Magnitude)
0.4705
0.6911
0.7070
ΓLoad (°)
86.63
142.11
140.65
ADJ CH LOW 2.6 GHZ
ALT CH LOW 2.6 GHZ
ADJ CH LOW 3.5 GHZ
ALT CH UP 3.5 GHZ
–40
–50
–60
–70
IP3 MAX (dBm)
41.7
41.37
41.29
–80
07307-025
ΓLoad
(Magnitude)
0.6100
0.7686
0.7057
ACLR (dB)
Frequency (MHz)
2600
3500
3600
–90
–10
–5
0
5
10
15
20
POUT (dBm)
WiMAX OPERATION
0
–5
–10
–15
–20
–25
–30
3.5 GHz
2.6 GHz
–35
–40
07307-126
Below an output power of 7 dBm, measured ADL5321 output
spectral performance is limited by the signal quality from the
signal source used (−63 dB at 2.6 GHz and −60 dB at 3.5 GHz).
At high power operation, input power to the ADL5321 is 1 dBm
for 15 dBm output power and the source ACLR is −60.2 dB. It is
expected that with a better signal source, the ADL5321 output
spectral quality improves further, especially at output power
levels ≤10 dBm. For instance, the ADL5373 quadrature modulator
measured ACLR is −69 dB for an output power of −10 dBm.
Figure 25. ACLR vs. POUT, WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
RCE/EVM (dB)
Figure 25 shows a plot of adjacent channel leakage ratio (ACLR)
vs. POUT for the ADL5321. The signal type used is a WiMAX,
64 QAM, single carrier with a 10 MHz channel bandwidth. This
signal is generated by a WiMAX-enabled source and followed
with suitable band-pass filtering. The band-pass filter helps reduce
the adjacent and alternate channel noise and distortion out of
the signal generator down to −63 dB in the adjacent channels
and −76 dB in the alternate channels at 2.6 GHz and −60 dB
at 3.5 GHz.
–45
–50
–20
–15
–10
–5
0
5
10
15
20
POUT (dBm)
Figure 26. RCE/EVM vs. POUT, WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
For output powers up to 10 dBm rms, the ADL5321 adds very
little distortion to the output spectrum. At 2.6 GHz, the ACLR is
−59 dB and a relative constellation error of −46.6 dB (<0.5% EVM)
at an output power of 10 dBm rms.
Rev. 0 | Page 12 of 16
ADL5321
EVALUATION BOARD
are also provided in Table 9. The recommended placement for
these components is provided in Table 10. The inputs and outputs
should be ac-coupled with appropriately sized capacitors. DC
bias is provided to the amplifier via an inductor connected to
the RFOUT pin. A bias voltage of 5 V is recommended.
The schematic of the ADL5321 evaluation board is shown in
Figure 27. This evaluation board uses 25 mil wide traces and is
made from IS410 material (lead-free version of FR4). The
evaluation board comes tuned for operation in the 2500 MHz to
2700 MHz tuning band. Tuning options for other frequency bands
GND
VCC
(2)
GND
C6 10µF
C5 10nF
C4 10pF
2
L1
9.5nH
3
λ3
λ2
C7
OPEN
λ4
C2
10pF
C3
1.2pF
RFOUT
07307-127
1
RFOUT
λ1
GND
RFIN
C1
1.0pF
RFIN
ADL5321
Figure 27. Evaluation Board, 2500 MHz to 2700 MHz
Table 9. Evaluation Board Configuration Options
Component
C1, C2
Function
AC coupling capacitors
C4, C5, C6
Power supply bypassing capacitors
L1
C3, C7
DC bias inductor
Tuning capacitors
VCC, GND
Power supply connections
2500 MHz to 2700 MHz
C1 = 0402, 1.0 pF
C2 = 0402, 10 pF
C4 = 0603, 10 pF
C5 = 0603, 10 nF
C6 = 1206, 10 μF
0603, 9.5 nH
C3 = 0402, 1.2 pF
C7 = 0402, open
VCC, red test loop
GND, black test loop
3400 MHz to 3850 MHz
C1 = 0402, 10 pF
C2 = 0402, 10 pF
C4 = 0603, 10 pF
C5 = 0603, 10 nF
C6 = 1206, 10 μF
0603, 9.5 nH
C3 = 0402, 1.2 pF
C7 = 0402, 1.0 pF
VCC, red test loop
GND, black test loop
Table 10. Recommended Component Spacing on Evaluation Board
Frequency (MHz)
2500 to 2700
3400 to 3850
λ1 (mils)
240
90
λ2 (mils)
75
35
Rev. 0 | Page 13 of 16
λ3 (mils)
89
40
λ4 (mils)
325
416
ADL5321
10µF
10µF
10 nF
9.5 nH
1
2
3
C2
10pF
C1
10 pF
C3
1.2 pF
10 pF
1
2
9.5 nH
3
C2
10 pF
C3
1.2 pF
C7
07307-028
07307-029
C1
1.0 pF
10 pF
10 nF
(2)
(2)
Figure 28. Evaluation Board Layout and Default Component Placement for
Operation from 2500 MHz to 2700 MHz (Note: C7 Is Not Placed)
Rev. 0 | Page 14 of 16
Figure 29. Evaluation Board Layout and Component Placement for
Operation from 3400 MHz to 3850 MHz
ADL5321
OUTLINE DIMENSIONS
*1.55 REF
(2)
4.25
3.94
1
2
2.60
2.30
3
1.20
0.90
1.50 TYP
3.00 TYP
4.60
4.40
1.60
1.40
0.44
0.35
END VIEW
*0.52
0.32
040407-A
*0.58
0.40
*COMPLIANT TO JEDEC STANDARDS TO-243 WITH
EXCEPTION TO DIMENSIONS INDICATED BY AN ASTERISK.
Figure 30. 3-Lead Small Outline Transistor Package [SOT-89]
(RK-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADL5321ARKZ-R7 1
ADL5321-EVALZ1
1
Temperature Range
−40°C to +85°C
Package Description
3-Lead SOT-89, 7“ Tape and Reel
Evaluation Board
Z = RoHS Compliant Part.
Rev. 0 | Page 15 of 16
Package Option
RK-3
Branding
Q0P
ADL5321
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07307-0-5/08(0)
Rev. 0 | Page 16 of 16
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