IRF644B/IRFS644B 250V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converter and switch mode power supplies. • • • • • • 14A, 250V, RDS(on) = 0.28Ω @VGS = 10 V Low gate charge ( typical 47 nC) Low Crss ( typical 30 pF) Fast switching 100% avalanche tested Improved dv/dt capability D G TO-220 G DS GD S IRF Series TO-220F IRFS Series S Absolute Maximum Ratings Symbol VDSS ID TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current IRF644B IRFS644B Units V A 250 - Continuous (TC = 100°C) 14 14 * 8.9 8.9 * A 56 56 * A IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) 14 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 13.9 5.5 -55 to +150 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL - Pulsed (Note 1) (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds ± 30 V 480 mJ 139 1.11 43 0.35 * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Max. RθCS Thermal Resistance, Case-to-Sink Typ. 0.5 -- °C/W RθJA Thermal Resistance, Junction-to-Ambient Max. 62.5 62.5 °C/W ©2001 Fairchild Semiconductor Corporation IRF644B 0.9 IRFS644B 2.89 Units °C/W Rev. A, November 2001 IRF644B/IRFS644B November 2001 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 250 -- -- V -- 0.24 -- V/°C VDS = 250 V, VGS = 0 V -- -- 10 µA VDS = 200 V, TC = 125°C -- -- 100 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA 2.0 -- 4.0 V -- 0.22 0.28 Ω -- 11.7 -- S -- 1250 1600 pF -- 150 195 pF -- 30 40 pF Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 7.0 A gFS Forward Transconductance VDS = 40 V, ID = 7.0 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 125 V, ID = 14 A, RG = 25 Ω (Note 4, 5) VDS = 200 V, ID = 14 A, VGS = 10 V (Note 4, 5) -- 20 50 ns -- 115 240 ns -- 150 310 ns -- 95 200 ns -- 47 60 nC -- 6.2 -- nC -- 23 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 14 A ISM -- -- 56 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 14 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 14 A, dIF / dt = 100 A/µs (Note 4) -- 240 -- ns -- 1.96 -- µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 3.9mH, IAS = 14A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 14A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 IRF644B/IRFS644B Electrical Characteristics IRF644B/IRFS644B Typical Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V Top : ID, Drain Current [A] 1 10 ID, Drain Current [A] 1 10 0 10 o 150 C o 0 25 C 10 o -55 C ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 40V 2. 250μ s Pulse Test -1 -1 10 -1 0 10 10 1 10 2 10 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 1.5 RDS(ON) [Ω ], Drain-Source On-Resistance IDR, Reverse Drain Current [A] VGS = 10V 1.2 VGS = 20V 0.9 0.6 0.3 1 10 0 10 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test ※ Note : TJ = 25℃ -1 10 0.0 0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 3500 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 3000 12 VDS = 50V Ciss 2000 1500 Coss 1000 Crss ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 500 VGS, Gate-Source Voltage [V] 10 2500 Capacitance [pF] 50 VDS = 125V VDS = 200V 8 6 4 2 ※ Note : ID = 14 A 0 0 -1 10 0 10 1 10 0 5 10 15 20 25 30 35 40 45 50 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 IRF644B/IRFS644B Typical Characteristics (Continued) 1.2 3.0 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 7.0 A 0.5 0.0 -100 200 Figure 7. Breakdown Voltage Variation vs Temperature Operation in This Area is Limited by R DS(on) 2 ID, Drain Current [A] ID, Drain Current [A] 150 200 100 µs 1 ms 1 10 1 ms 1 10 ms DC 10 ms 100 ms DC 0 10 0 ※ Notes : ※ Notes : -1 10 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -1 10 100 Operation in This Area is Limited by R DS(on) 2 100 µs 10 50 Figure 8. On-Resistance Variation vs Temperature 10 10 0 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] 10 -50 o o o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -2 0 1 10 10 2 10 10 0 10 VDS, Drain-Source Voltage [V] 1 10 2 10 VDS, Drain-Source Voltage [V] Figure 9-1. Maximum Safe Operating Area for IRF644B Figure 9-2. Maximum Safe Operating Area for IRFS644B 15 ID, Drain Current [A] 12 9 6 3 0 25 50 75 100 125 150 TC, Case Temperature [℃] Figure 10. Maximum Drain Current vs Case Temperature ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 (t), T h e r m a l R e s p o n s e IRF644B/IRFS644B Typical Characteristics (Continued) 0 10 D = 0 .5 ※ N o te s : 1 . Z θ J C (t) = 0 .9 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) 0 .2 10 0 .1 -1 0 .0 5 PDM θ JC 0 .0 2 Z 0 .0 1 t1 t2 s in g le p u ls e 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] D = 0 .5 10 0 0 .2 ※ N o te s : 1 . Z θ J C (t) = 2 .8 9 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) 0 .1 0 .0 5 10 -1 0 .0 2 θ JC (t), T h e rm a l R e s p o n s e Figure 11-1. Transient Thermal Response Curve for IRF644B PDM 0 .0 1 Z t1 t2 s in g le p u ls e 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11-2. Transient Thermal Response Curve for IRFS644B ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 IRF644B/IRFS644B Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 10V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2001 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A, November 2001 IRF644B/IRFS644B Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 TO-220 4.50 ±0.20 2.80 ±0.10 (3.00) +0.10 1.30 –0.05 18.95MAX. (3.70) ø3.60 ±0.10 15.90 ±0.20 1.30 ±0.10 (8.70) (1.46) 9.20 ±0.20 (1.70) 9.90 ±0.20 1.52 ±0.10 0.80 ±0.10 2.54TYP [2.54 ±0.20] 10.08 ±0.30 (1.00) 13.08 ±0.20 ) (45° 1.27 ±0.10 +0.10 0.50 –0.05 2.40 ±0.20 2.54TYP [2.54 ±0.20] 10.00 ±0.20 Dimensions in Millimeters ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 IRF644B/IRFS644B Package Dimensions (Continued) 3.30 ±0.10 TO-220F 10.16 ±0.20 2.54 ±0.20 ø3.18 ±0.10 (7.00) (1.00x45°) 15.87 ±0.20 15.80 ±0.20 6.68 ±0.20 (0.70) 0.80 ±0.10 ) 0° (3 9.75 ±0.30 MAX1.47 #1 +0.10 0.50 –0.05 2.54TYP [2.54 ±0.20] 2.76 ±0.20 2.54TYP [2.54 ±0.20] 9.40 ±0.20 4.70 ±0.20 0.35 ±0.10 Dimensions in Millimeters ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 IRF644B/IRFS644B Package Dimensions TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ FAST® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SLIENT SWITCHER® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TruTranslation™ TinyLogic™ UHC™ UltraFET® VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2001 Fairchild Semiconductor Corporation Rev. H4