LT1884/LT1885 Dual/Quad Rail-to-Rail Output, Picoamp Input Precision Op Amps U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LT®1884/LT1885 op amps bring high accuracy input performance to amplifiers with rail-to-rail output swing while providing faster response than other precision amplifiers. Input offset voltage is trimmed to less than 50µV and the low drift maintains this accuracy over the operating temperature range. Input bias currents are an ultralow 400pA maximum. Offset Voltage: 50µV Max (LT1884A) Input Bias Current: 400pA Max (LT1884A) Offset Voltage Drift: 0.8µV/°C Max Rail-to-Rail Output Swing Operates with Single or Split Supplies Open-Loop Voltage Gain: 1 Million Min 1mA Maximum Supply Current Per Amplifier Slew Rate: 1V/µs Standard Pinouts The amplifiers work on any total power supply voltage between 2.7V and 36V (fully specified from 5V to ±15V). Output voltage swings to within 40mV of the negative supply and 220mV of the positive supply make these amplifiers good choices for low voltage single supply operation. U APPLICATIO S ■ ■ ■ ■ ■ ■ ■ Thermocouple Amplifiers Bridge Transducer Conditioners Instrumentation Amplifiers Battery-Powered Systems Photo Current Amplifiers Precision Integrators Precision Current Sources Slew rates of 1V/µs with a supply current of less than 1mA per amplifier give superior response and settling time performance in a low power precision amplifier. The dual LT1884 is available with standard pinouts in 8-pin SO and PDIP packages. The quad LT1885 is also in the standard pinout 14-pin SO package. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO Input Fault Protected Instrumentation Amplifier 1M 3 –IN 10pF + 10k 10k 1/4 LT1885 – 10k RG/2 – + GUARD 1/4 LT1885 1/4 LT1885 RG/2 OUT + 10k – – 1M +IN 22pF TRIM FOR AC CMRR GAIN = 10k 9.76k 2•10k RG 1/4 LT1885 5 + 500Ω TRIM FIRST FOR DC CMRR 1884 TA01 1 LT1884/LT1885 W W W AXI U U ABSOLUTE RATI GS (Note 1) Supply Voltage (V + to V –) ....................................... 40V Differential Input Voltage (Note 2) ......................... ±10V Input Voltage .................................................... V + to V – Input Current (Note 2) ........................................ ±10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4) .. – 40°C to 85°C Specified Temperature Range (Note 5) ... – 40°C to 85°C Maximum Junction Temperature .......................... 150°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U U W PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER LT1884CN8 LT1884CS8 LT1884ACN8 LT1884ACS8 LT1884IN8 LT1884IS8 LT1884AIN8 LT1884AIS8 TOP VIEW + OUT A 1 8 V –IN A 2 7 OUT B 6 –IN B 5 +IN B A +IN A 3 V– 4 N8 PACKAGE 8-LEAD PDIP B S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 130°C/W (N8) TJMAX = 150°C, θJA = 190°C/W (S8) S8 PART MARKING 1884 1884A ORDER PART NUMBER TOP VIEW – IN A 2 A +IN A 3 13 –IN D D V+ 4 +IN B 5 –IN B 6 LT1885CS LT1885IS 14 OUT D OUT A 1 12 +IN D 11 V – B C OUT B 7 10 +IN C 9 –IN C 8 OUT C S PACKAGE 14-LEAD PLASTIC SO TJMAX = 150°C, θJA = 110°C/W 1884I 1884AI Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5) SYMBOL PARAMETER VOS Input Offset Voltage (LT1884A) CONDITIONS MIN 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● Input Offset Voltage (LT1884/LT1885) Input Offset Voltage Drift (Note 6) IOS Input Offset Current (LT1884A) Input Offset Current (LT1884/LT1885) 2 TYP MAX UNITS 25 50 85 110 µV µV µV 30 80 125 150 µV µV µV 0.3 0.3 0.8 0.8 µV/°C µV/°C 100 300 400 500 pA pA pA 150 900 1200 1400 pA pA pA LT1884/LT1885 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5) SYMBOL PARAMETER IB Input Bias Current (LT1884A) CONDITIONS MIN 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● Input Bias Current (LT1884/LT1885) TYP MAX UNITS 100 400 500 600 pA pA pA 150 900 1200 1400 pA pA pA Input Noise Voltage 0.1Hz to 10Hz 0.4 µVP-P en Input Noise Voltage Density f = 1kHz 9.5 nV/√Hz in Input Noise Current Density f = 1kHz VCM Input Voltage Range CMRR PSRR Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain pA/√Hz ● 1V < VCM < 4V 1.2V < VCM < 3.8V 108 106 128 ● dB dB VEE = 0, VCM = 1.5V; 2.7V < VCC < 32V ● 108 132 dB Minimum Operating Supply Voltage AVOL 0.05 VEE + 1.0 VEE + 1.2 2.4 ● RL = 10k; 1V < VOUT < 4V VCC – 1.0 VCC – 1.2 2.7 V V V 500 350 1600 ● V/mV V/mV 400 300 800 ● V/mV V/mV 300 200 400 ● V/mV V/mV RL = 2k; 1V < VOUT < 4V RL = 1k; 1V < VOUT < 4V VOL Output Voltage Swing Low No Load ISINK = 100µA ISINK = 1mA ISINK = 5mA ● ● ● ● 20 25 70 270 40 50 150 600 mV mV mV mV VOH Output Voltage Swing High (Referred to VCC) No Load ISOURCE = 100µA ISOURCE = 1mA ISOURCE = 5mA ● ● ● ● 120 130 180 360 220 230 300 600 mV mV mV mV IS Supply Current per Amplifier VCC = 3V 0.45 0.65 0.85 1.30 mA mA 0.50 0.65 0.9 1.4 mA mA 0.50 0.70 1.0 1.5 mA mA 15 15 30 30 mA mA 1.2 2 MHz 10 µs ● VCC = 5V ● VCC = 12V ● ISC Short-Circuit Current VOUT Short to GND VOUT Short to VCC GBW Gain-Bandwidth Product f = 20kHz tS Settling Time 0.01%, VOUT = 1.5V to 3.5V, AV = –1, RL = 2k SR + Positive Slew Rate AV = – 1 SR – Negative Slew Rate ● ● 0.45 0.36 0.9 ● V/µs V/µs 0.35 0.25 0.7 ● V/µs V/µs AV = – 1 3 LT1884/LT1885 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5) SYMBOL PARAMETER ∆VOS Offset Voltage Match (LT1884A) CONDITIONS MIN TYP MAX UNITS 30 70 125 160 µV µV µV 35 125 195 235 µV µV µV 0.4 1.2 µV/°C 200 600 700 850 pA pA pA 250 1200 1600 1900 pA pA pA 0°C < TA < 70°C – 40°C < TA < 85°C ● ● (Note 7) 0°C < TA < 70°C – 40°C < TA < 85°C ● ● (Notes 6, 7) ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● Noninverting Bias Current Match (LT1884/LT1885) (Notes 7, 9) 0°C < TA < 70°C – 40°C < TA < 85°C ● ● ∆CMRR Common Mode Rejection Match (Notes 7, 9) ● 104 125 dB ∆PSRR Positive Power Supply Rejection Match VEE = 0V, VCM = 1.5V, 2.7V < VCC < 32V, (Notes 7, 9) ● 104 126 dB Offset Voltage Match (LT1884/LT1885) Offset Voltage Match Drift ∆IB+ Noninverting Bias Current Match (LT1884A) The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Split supply operation VS = ±15V; VCM = 0V unless otherwise noted. (Note 5) SYMBOL PARAMETER VOS Input Offset Voltage (LT1884A) CONDITIONS MIN 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● 0°C < TA < 70°C – 40°C < TA < 85°C ● ● Input Offset Voltage (LT1884/LT1885) Input Offset Voltage Drift (Note 6) IOS Input Offset Current (LT1884A) Input Offset Current (LT1884/LT1885) IB Input Bias Current (LT1884A) Input Bias Current (LT1884/LT1885) Input Noise Voltage 0.1Hz to 10Hz TYP MAX UNITS 25 50 85 110 µV µV µV 30 80 125 150 µV µV µV 0.3 0.3 0.8 0.8 µV/°C µV/°C 150 300 400 500 pA pA pA 150 900 1200 1400 pA pA pA 150 400 500 600 pA pA pA 150 900 1200 1400 pA pA pA µVP-P 0.4 en Input Noise Voltage Density f = 1kHz 9.5 nV/√Hz in Input Noise Current Density f = 1kHz 0.05 pA/√Hz VCM Input Voltage Range CMRR 4 Common Mode Rejection Ratio –13.5V < VCM < 13.5V ● VEE + 1.0 VEE + 1.2 ● 114 VCC – 1.0 VCC – 1.2 130 V V dB LT1884/LT1885 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Split supply operation VS = ±15V; VCM = 0V unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS + PSRR Positive Power Supply Rejection Ratio VEE = –15V, VCM = 0V; 1.5V < VCC < 18V – PSRR Negative Power Supply Rejection Ratio VCC = 15V, VCM = 0V; –1.5V < VEE < –18V Minimum Operating Supply Voltage AVOL Large-Signal Voltage Gain MIN TYP ● 114 132 dB ● 106 132 dB ±1.2 ● RL = 10k; –13.5V < VOUT < 13.5V MAX ±1.35 UNITS V 1000 700 1600 ● V/mV V/mV 250 175 420 ● V/mV V/mV 100 75 230 ● V/mV V/mV RL = 2k; –13.5V < VOUT < 13.5V RL = 1k; –12V < VOUT < 12V VOL Output Voltage Swing Low (Referred to VEE) No Load ISINK = 100µA ISINK = 1mA ISINK = 5mA ● ● ● ● 20 25 70 270 40 50 150 600 mV mV mV mV VOH Output Voltage Swing High (Referred to VCC) No Load ISOURCE = 100µA ISOURCE = 1mA ISOURCE = 5mA ● ● ● ● 160 160 180 360 220 230 300 600 mV mV mV mV IS Supply Current Per Amplifier VS = ±15V 0.85 1.1 1.6 mA mA ● ISC Short-Circuit Current GBW Gain-Bandwidth Product f = 20kHz tS Settling Time 0.01%, VOUT = – 5V to 5V, AV = –1, RL = 2k SR + Positive Slew Rate AV = – 1 SR – ∆VOS Negative Slew Rate Offset Voltage Match (LT1884A) VOUT Short to VEE VOUT Short to VCC ● ● 15 15 50 30 mA mA 1.5 2.2 MHz 17 µs 0.5 0.4 1.0 ● V/µs V/µs 0.40 0.26 0.7 ● V/µs V/µs AV = – 1 35 70 125 160 µV µV µV 35 125 175 235 µV µV µV 0.4 1.1 µV/°C 200 600 700 850 pA pA pA 240 1200 1600 1900 pA pA pA (Note 7) 0°C < TA < 70°C – 40°C < TA < 85°C ● ● (Note 7) 0°C < TA < 70°C – 40°C < TA < 85°C ● ● Offset Voltage Match Drift (Note 6, 7) ● Noninverting Bias Current Match (LT1884A) (Notes 7, 8) 0°C < TA < 70°C – 40°C < TA < 85°C ● ● Noninverting Bias Current Match (LT1884/LT1885) (Notes 7, 8) 0°C < TA < 70°C – 40°C < TA < 85°C ● ● ∆CMRR Common Mode Rejection Match (Notes 7, 9) ● 106 125 dB ∆ +PSRR Positive Power Supply Rejection Match VEE = –15V, VCM = 0V, 1.5V < VCC < 18V, (Notes 7, 9) ● 108 124 dB ∆ – PSRR Negative Power Supply Rejection Match VCC = 15V, VCM = 0V, – 1.5V < VEE < –18V, (Notes 7, 9) ● 102 132 dB Offset Voltage Match (LT1884/LT1885) ∆IB + 5 LT1884/LT1885 ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 0.7V, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. Note 4: The LT1884C/LT1885C and LT1884I/LT1885I are guaranteed functional over the operating temperature range of – 40°C to 85°C. Note 5: The LT1884C/LT1885C are designed, characterized and expected to meet specified performance from – 40°C to 85°C but are not tested or QA sampled at these temperatures. LT1884I is guaranteed to meet specified performance from – 40°C to 85°C. Note 6: This parameter is not 100% tested. Note 7: Matching parameters are the difference between amplifiers A and B in the LT1884 and between amplifiers A and D and B and C in the LT1885. Note 8: This parameter is the difference between the two noninverting input bias currents. Note 9: ∆CMRR and ∆PSRR are defined as follows: CMRR and PSRR are measured in µV/V on each amplifier. The difference is calculated in µV/V and then converted to dB. U W TYPICAL PERFOR A CE CHARACTERISTICS Input Offset Voltage vs Temperature Distribution of Offset Voltage Drift VS = ±15V TEMPCO: –55°C TO 125°C 150 10 REPRESENTATIVE UNITS INPUT OFFSET VOLTAGE (µV) 20 PERCENT OF UNITS (%) VOUT vs ISINK 500 200 16 12 8 400 50 0 –50 –100 4 –200 25°C 200 –55°C –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 0 10µA 90 110 125 VS = ±15V 125°C Gain, Phase Shift vs Frequency VS = ±15V 100 80 VOLTAGE GAIN (dB) GAIN (dB) –55°C 60 40 20 100 100µA 1mA 10mA ISOURCE 18845 G04 –20 0.1 –100 70 –110 60 –120 50 –130 40 –140 30 –150 20 10 –160 GAIN –170 0 0 0 10µA –90 PHASE SHIFT –180 –10 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 18845 G05 –20 10k 100k 1M FREQUENCY (Hz) 10M 18845 G06 PHASE SHIFT (DEG) 200 80 –80 90 100 25°C 10mA 18845 G03 120 300 1mA ISINK Gain vs Frequency 140 400 100µA 18845 G02 VOUT vs ISOURCE (VCC – VOUT) (mV) 300 100 18845 G01 6 125°C –150 0 –0.9 –0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 0.9 OFFSET VOLTAGE DRIFT (µV/°C) 500 VS = ±15V 100 (VOUT – VEE) (mV) 24 LT1884/LT1885 U W TYPICAL PERFOR A CE CHARACTERISTICS PSRR vs Frequency 10 1 100 10k 1k FREQUENCY (Hz) 100k 1M 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 Vn, In vs Frequency 1000 VS = ±15V NEGATIVE SUPPLY POSITIVE SUPPLY 100 10k 1k FREQUENCY (Hz) 100k Slew Rate vs Temperature SLEW RATE (V/µs) NOISE VOLTAGE (O.2µV/DIV) NOISE VOLTAGE (O.2µV/DIV) Input Bias Current vs Common Mode Voltage –6 TA = 25°C 0.75 TA = –40°C 0.50 0.25 500 IBIAS+ 250 IBIAS– 0 –250 –500 –750 –8 –10 TA = 25°C 750 TA = 85°C INPUT BIAS CURRENT (pA) AV = –1 90 110 18845 G12 1000 1.00 SUPPLY CURRENT (mA) AV = 1 FALLING VS = ±5V 0.4 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 1.25 2 –4 FALLING VS = ±15V 18845 G11 VS = ±15V –2 0.8 Supply Current per Amplifier vs Supply Voltage 0 RISING VS = ±5V 1.0 0.6 TIME (20s/DIV) AV = –1 RISING VS = ±15V 1.2 Settling Time to 0.01% vs Output Step AV = 1 1000 1.4 18845 G10 6 10 100 FREQUENCY (Hz) 18845 G09 VS = ±15V TA = 25°C TIME (2s/DIV) 4 1 1M 0.01Hz to 1Hz Noise VS = ±15V TA = 25°C 8 VOLTAGE NOISE 10 18845 G08 0.1Hz to 10Hz Noise 10 CURRENT NOISE 100 1 10 1 18845 G07 OUTPUT STEP (V) VOLTAGE NOISE DENSITY (nV/√Hz) CURRENT NOISE DENSITY (fA/√Hz) SUPPLY POWER REJECTION (dB) COMMON MODE REJECTION (dB) CMRR vs Frequency 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 18 20 SETTLING TIME (µs) 18845 G13 0 0 4 8 12 16 20 24 28 32 36 40 SUPPLY VOLTAGE (V) 18845 G14 –1000 –15 –10 –5 5 10 0 COMMON MODE VOLTAGE (V) 15 LTXXXX • TPCXX 7 LT1884/LT1885 U W TYPICAL PERFOR A CE CHARACTERISTICS Gain vs Frequency (AV = 1) Channel Separation vs Frequency 10 –20 0 –40 VS = ±15V –50 –60 GAIN (dB) CHANNEL SEPARATION (dB) –30 –70 –80 –10 VS = ±2.5V –20 –90 –30 –100 –110 –120 100 –40 1k 10k 100k FREQUENCY (Hz) 1M 1k 10M 10k 100k 1M FREQUENCY (Hz) 10M 18845 G17 18845 G16 Gain vs Frequency vs CLOAD (AV = – 1) Gain vs Frequency vs CLOAD (AV = 1) 10 10 0 0 –10 –10 GAIN (dB) GAIN (dB) 100M –20 CLOAD = 500pF CLOAD = 300pF –20 CLOAD = 100pF CLOAD = 330pF CLOAD = 150pF CLOAD = 50pF CLOAD = 0pF –30 CLOAD = 0pF –30 –40 –40 1k 10k 100k 1M FREQUENCY (Hz) 10M 1k 100M 10k 100k 1M FREQUENCY (Hz) 100M 18845 G19 18845 G18 Small-Signal Response Large-Signal Response 5V/DIV 20mV/DIV VS = ±15V RF = RG = 10k AV = –1 8 10M 50µs/DIV 18845 G20 VS = ±15V RF = RG = 10k AV = –1 2µs/DIV 18845 G21 LT1884/LT1885 U W U U APPLICATIO S I FOR ATIO The LT1884/LT1885 dual op amp features exceptional input precision with rail-to-rail output swing. Slew rate and small-signal bandwidth are superior to other amplifiers with comparable input precision. These characteristics make the LT1884/LT1885 a convenient choice for precision low voltage systems and for improved AC performance in higher voltage precision systems. Maintaining the advantage of the precision inherent in the amplifier depends upon proper applications circuit design and board layout. Preserving Input Precision Preserving the input voltage accuracy of the LT1884/ LT1885 requires that the applications circuit and PC board layout do not introduce errors comparable to or greater than the 30µV offset. Temperature differentials across the input connections can generate thermocouple voltages of 10s of microvolts. PC board layouts should keep connections to the amplifier’s input pins close together and away from heat dissipating components. Air currents across the board can also generate temperature differentials. The extremely low input bias currents, 100pA, allow high accuracy to be maintained with high impedance sources and feedback networks. The LT1884/LT1885’s low input bias currents are obtained by using a cancellation circuit on-chip. This causes the resulting IBIAS + and IBIAS – to be uncorrelated, as implied by the IOS specification being comparable to the IBIAS. The user should not try to balance the input resistances in each input lead, as is commonly recommended with most amplifiers. The impedance at either input should be kept as small as possible to minimize total circuit error. PC board layout is important to ensure that leakage currents do not corrupt the low IBIAS of the amplifier. In high precision, high impedance circuits, the input pins should be surrounded by a guard ring of PC board interconnect, with the guard driven to the same common mode voltage as the amplifier inputs. Input Common Mode Range The LT1884/LT1885 output is able to swing close to each power supply rail, but the input stage is limited to operating between VEE + 0.8V and VCC – 0.9V. Exceeding this common mode range will cause the gain to drop to zero; however, no gain reversal will occur. Input Protection The inverting and noninverting input pins of the LT1884/ LT1885 have limited on-chip protection. ESD protection is provided to prevent damage during handling. The input transistors have voltage clamping and limiting resistors to protect against input differentials up to 10V. Short transients above this level will also be tolerated. If the input pins may be subject to a sustained differential voltage above 10V, external limiting resistors should be used to prevent damage to the amplifier. A 1k resistor in each input lead will provide protection against a 30V differential voltage. Capacitive Loads The LT1884/LT1885 can drive capacitive loads up to 300pF when configured for unity gain. The capacitive load driving capability increases as the amplifier is used in higher gain configurations. Capacitive load driving may also be increased by decoupling the capacitance from the output with a small resistance. Input Bias Currents While it may be tempting to seek out a JFET amplifier for low input bias current, remember that bipolar devices improve with temperature while JFETs degrade. 9 LT1884/LT1885 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.400* (10.160) MAX 8 7 6 5 1 2 3 4 0.255 ± 0.015* (6.477 ± 0.381) 0.300 – 0.325 (7.620 – 8.255) 0.065 (1.651) TYP 0.009 – 0.015 (0.229 – 0.381) ( 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) +0.035 0.325 –0.015 +0.889 8.255 –0.381 ) 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 0.100 (2.54) BSC (0.457 ± 0.076) N8 1098 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0°– 8° TYP 0.016 – 0.050 (0.406 – 1.270) 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 10 2 3 4 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) BSC SO8 1298 LT1884/LT1885 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. S Package 14-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.337 – 0.344* (8.560 – 8.738) 14 13 12 11 10 9 8 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 2 3 4 5 6 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0° – 8° TYP 0.016 – 0.050 (0.406 – 1.270) 0.014 – 0.019 (0.355 – 0.483) TYP 7 0.050 (1.270) BSC *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. S14 1298 11 LT1884/LT1885 U TYPICAL APPLICATIO 16-Bit Voltage Output DAC on ±5V Supply 5V 5V 1.65k + LT1884 LT1634 4.096V – –5V R1 RCOM REF ROFS 33pF 5V – DAC VOUT – 4.096V TO 4.096V LT1884 + LTC®1597 –5V 18845 TA02 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1112 Dual Picoamp Input Op Amp VOS = 60µV Max LT1114 Quad Picoamp Input Op Amp VOS = 60µV Max LT1167 Gain Programmable Instrumentation Amp Gain Error = 0.08% Max LT1490 Micropower Rail-to-Rail Input and Output Op Amp Over-The-TopTM Common Mode Range LT1793 Low Noise JFET Op Amp IB = 10pA Max LT1881/LT1882 Picoamp Input Rail-to-Rail Output Op Amp Lower Input Bias Currents Than LT1884/LT1885 LTC2050 Zero Drift Op Amp in SOT-23 VOS = 3µV Max, Rail-to-Rail Output Over-The-Top is a trademark of Linear Technology Corporation. 12 Linear Technology Corporation 18845f LT/TP 0400 4K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com LINEAR TECHNOLOGY CORPORATION 2000