ICST ICS551MT 1 to 4 clock buffer Datasheet

PRELIMINARY INFORMATION
ICS551
1 to 4 Clock Buffer
Description
Features
The ICS551 is a low cost, high speed single input
to four output clock buffer. Part of ICS’ Clock
Blocks TM family, this is our lowest cost, small clock
buffer. See the ICS552-01B for a monolithic dual
version of the ICS551 in a 20 pin QSOP.
• Packaged in 8 pin SOIC
• Low cost clock buffer
• Low skew (250ps) outputs
• Input/output clock frequency up to 160 MHz
• Operating voltages of 3.0 to 5.5 V
• Non-inverting
• Ideal for networking clocks
• Output Enable mode tri-states outputs
• Full CMOS clock swings with 25mA drive
capability at TTL levels
• Advanced, low power CMOS process
ICS makes many non-PLL and PLL based low
skew output devices, as well as Zero Delay Buffers
to synchronize clocks. Contact us for all of your
clocking needs.
Block Diagram
Q1
Q2
ICLK
Q3
Q4
Output Enable
1
Revision 091200
Printed 11/14/00
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 551 B
PRELIMINARY INFORMATION
ICS551
1 to 4 Clock Buffer
Pin Assignment
ICLK
1
8
OE
Q1
2
7
VDD
Q2
3
6
GND
Q3
4
5
Q4
8 pin SOIC
Pin Descriptions
Number
1
2
3
4
5
6
7
8
Name
ICLK
Q1
Q2
Q3
Q4
GND
VDD
OE
Type
CI
O
O
O
O
P
P
I
Description
Clock input. Internal pull-up resistor.
Clock Output 1.
Clock Output 2.
Clock Output 3.
Clock Output 4.
Connect to ground.
Connect to +3.3 V or +5.0 V.
Output Enable. Tri-states outputs when low. Internal pull-up resistor.
Key: CI = clock input, I = input, O = output, P = power supply connection
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01 µF should be connected between VDD on pin 7 and GND on pin 6, and a 33 Ω terminating resistor
may be used on each clock output if the trace is longer than 1 inch.
2
Revision 091200
Printed 11/14/00
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 551 B
PRELIMINARY INFORMATION
ICS551
1 to 4 Clock Buffer
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
7
VDD+0.5
70
260
150
V
V
°C
°C
°C
5.5
V
V
V
V
V
V
V
V
mA
mA
kΩ
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Referenced to GND
Referenced to GND
-0.5
0
Max of 20 seconds
-65
DC CHARACTERISTICS
Operating Voltage, VDD
Input High Voltage, VIH, IN
Input Low Voltage, VIL, In
Input High Voltage, VIH, OE
Input Low Voltage, VIL, OE
Output High Voltage, VOH, 5V
Output Low Voltage, VOL, 5V
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD, 3.3V
Short Circuit Current, 3.3 V
Internal pull-up resistor
Clock input
Clock input
3
VDD/2 + 1
VDD/2
VDD/2
VDD/2 - 1
2
0.8
IOH=-25mA
IOL=25mA
IOH=-8mA
No load, 135 MHz
Each output
All inputs
2.4
0.4
VDD-0.4
18
±50
200
AC CHARACTERISTICS
Input Frequency
Output Frequency, 3.3 V
Output Frequency, 5 V
Output Clock Rise Time
Output Clock Fall Time
Propagation Delay
Output to output skew
Notes:
0
15 pF load. Note 3.
15 pF load. Note 3.
0.8 to 2.0V
2.0 to 0.8V
At 3.3 V
At 5.0 V
Rising edges at VDD/2
2
1.5
4
3
160
160
135
1.5
1.5
8
6
250
MHz
MHz
MHz
ns
ns
ns
ns
ps
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock generators.
3. With external series resistor of 33 Ω positioned close to each output pin.
3
Revision 091200
Printed 11/14/00
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 551 B
PRELIMINARY INFORMATION
ICS551
1 to 4 Clock Buffer
Package Outline and Package Dimensions
8 pin SOIC
E
H
Pin 1
h x 45°
D
Q
A
c
e
b
L
Symbol
A
b
D
E
H
e
h
L
Q
Inches
Min
Max
0.055 0.068
0.013 0.019
0.185 0.200
0.150 0.160
0.225 0.245
.050 BSC
0.015
0.016 0.035
0.004
0.01
Millimeters
Min
Max
1.397 1.7272
0.330
0.483
4.699
5.080
3.810
4.064
5.715
6.223
1.27 BSC
0.381
0.406
0.889
0.102
0.254
Ordering Information
Part/Order Number
ICS551M
ICS551MT
Marking
ICS551M
ICS551M
Package
8 pin SOIC
8 pin SOIC on tape and reel
Temperature
0 to 70 °C
0 to 70 °C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any
ICS product for use in life support devices or critical medical instruments.
ClockBlocks is a trademark of ICS
4
Revision 091200
Printed 11/14/00
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 551 B
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