ETC AOD405 P-channel enhancement mode field effect transistor Datasheet

Rev 3: Sept 2004
AOD405, AOD405L (Green Product)
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
The AOD405 uses advanced trench technology to
provide excellent RDS(ON), low gate charge and low
gate resistance. With the excellent thermal resistance
of the DPAK package, this device is well suited for
high current load applications. AOD405L (Green
Product) is offered in a lead-free package.
VDS (V) = -30V
ID = -18A
RDS(ON) < 32mΩ (VGS = -10V)
RDS(ON) < 60mΩ (VGS = -4.5V)
TO-252
D-PAK
D
Top View
Drain Connected to
Tab
G
S
G
D
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
Continuous Drain
Current B,G
TA=25°C
G
Pulsed Drain Current
Avalanche Current C
C
TC=25°C
Power Dissipation B
TC=100°C
Power Dissipation A
TA=70°C
V
A
-18
IAR
-18
A
EAR
40
mJ
-40
60
2.5
W
1.6
TJ, TSTG
°C
-55 to 175
Symbol
t ≤ 10s
Steady-State
Steady-State
W
30
PDSM
Junction and Storage Temperature Range
Alpha & Omega Semiconductor, Ltd.
±20
ID
IDM
PD
TA=25°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A
Maximum Junction-to-Case C
Units
V
-18
TA=100°C G
Repetitive avalanche energy L=0.1mH
Maximum
-30
RθJA
RθJL
Typ
16.7
40
1.9
Max
25
50
2.5
Units
°C/W
°C/W
°C/W
AOD405, AOD405L
Electrical Characteristics (TJ=25°C unless otherwise noted)
Parameter
Symbol
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=-250µA, VGS=0V
-30
VDS=-24V, VGS=0V
Gate-Body leakage current
VDS=0V, VGS=±20V
Gate Threshold Voltage
VDS=VGS ID=-250µA
-1.2
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-40
RDS(ON)
Static Drain-Source On-Resistance
TJ=125°C
VGS=-4.5V, ID=-10A
gFS
Forward Transconductance
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
Maximum Body-Diode Continuous Current
VDS=-5V, ID=-18A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge (10V)
Qg(4.5V) Total Gate Charge (4.5V)
-1
-2
VGS=0V, VDS=0V, f=1MHz
VGS=-10V, VDS=-15V, ID=-18A
-2.4
µA
nA
V
A
24.5
32
36
43
41
60
mΩ
-1
V
-18
A
1100
pF
17
-0.76
920
VGS=0V, VDS=-15V, f=1MHz
Units
V
±100
VGS=-10V, ID=-18A
Output Capacitance
-0.003
-5
VGS(th)
Coss
Max
TJ=55°C
IGSS
IS
Typ
mΩ
S
190
pF
122
pF
3.6
4.5
Ω
18.7
23
nC
9.7
11.7
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
5.4
tD(on)
Turn-On DelayTime
9
13
ns
25
35
ns
20
30
ns
12
18
ns
21.4
26
16
ns
nC
VGS=-10V, VDS=-15V, RL=0.82Ω,
RGEN=3Ω
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery Charge IF=-18A, dI/dt=100A/µs
IF=-18A, dI/dt=100A/µs
2.54
13
nC
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation P DSM is based on steady-state R θJA and the maximum allowed junction temperature of 150°C. The value in any a given
application depends on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB or heatsink allows it.
B. The power dissipation P D is based on T J(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA
curve provides a single pulse rating.
G. The maximum current rating is limited by the package current capability.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE
Alpha & Omega Semiconductor, Ltd.
AOD405, AOD405L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
30
-10V
-6V
-5V
25
VDS=-5V
25
20
20
-4V
-ID(A)
-ID (A)
30
-4.5V
15
-3.5V
10
5
15
10
125°C
5
VGS=-3V
25°C
0
0
0
1
2
3
4
5
0
0.5
VGS=-4.5V
VGS=-10V
2
2.5
3
3.5
4
4.5
5
VGS=-4.5V
1.40
ID=-10A
VGS=-10V
1.20
ID=-18A
1.00
0.80
0
5
10
15
20
0
25
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
-ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
1.0E+01
100
90
ID=-18A
80
1.0E+00
1.0E-01
60
125°C
50
-IS (A)
70
RDS(ON) (mΩ)
1.5
1.60
Normalized On-Resistance
RDS(ON) (mΩ)
70
65
60
55
50
45
40
35
30
25
20
15
10
1
-VGS(Volts)
Figure 2: Transfer Characteristics
-VDS (Volts)
Fig 1: On-Region Characteristics
125°C
1.0E-02
1.0E-03
40
30
25°C
20
1.0E-04
25°C
1.0E-05
10
1.0E-06
0
3
4
5
6
7
8
9
10
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
0.0
0.2
0.4
0.6
0.8
-VSD (Volts)
Figure 6: Body-Diode Characteristics
1.0
AOD405, AOD405L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1500
1.00E+01
VDS=-15V
ID=-18A
1250
Capacitance (pF)
-VGS (Volts)
8.00E+00
6.00E+00
4.00E+00
2.00E+00
Ciss
1000
750
500
Coss
0.00E+00
0
0
4
8
12
16
20
0
5
-Qg (nC)
Figure 7: Gate-Charge Characteristics
10µs
RDS(ON)
10.0 limited
1ms
1s
1
25
30
TJ(Max)=150°C
TA=25°C
20
10
DC
0.1
0.1
20
30
100µs
10ms
0.1s
10s
15
40
TJ(Max)=150°C, TA=25°C
1.0
10
-VDS (Volts)
Figure 8: Capacitance Characteristics
Power (W)
-ID (Amps)
100.0
Crss
250
10
0
0.001
100
-VDS (Volts)
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
ZθJA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=50°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
PD
Ton
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
T
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
100
1000
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