MOTOROLA MC44818 Tv and vcr pll tuning circuit with 1.3 ghz prescaler and i2c bus Datasheet

Order this document by MC44818/D
The MC44818 is a tuning circuit for TV and VCR tuner applications. It
contains, on one chip, all the functions required for PLL control of a VCO.
This integrated circuit also contains a high frequency prescaler and thus can
handle frequencies up to 1.3 GHz. The MC44818 is a pin compatible drop in
replacement for the MC44817, where the only difference is the MC44818
has a fixed divide–by–8 prescaler (cannot be bypassed) and the MC44817
uses the three wire bus.
The MC44818 has a programmable 512/1024 reference divider and is
manufactured on a single silicon chip using Motorola’s high density bipolar
process, MOSAIC (Motorola Oxide Self Aligned Implanted Circuits).
• Complete Single Chip System for MPU Control (I2C Bus). Data and
Clock Inputs are 3–Wire Bus Compatible
• Divide–by–8 Prescaler Accepts Frequencies up to 1.3 GHz
•
•
•
•
•
•
•
•
•
TV AND VCR
PLL TUNING CIRCUIT
WITH 1.3 GHz PRESCALER
AND I2C BUS
SEMICONDUCTOR
TECHNICAL DATA
15 Bit Programmable Divider Accepts Input Frequencies up to 165 MHz
Reference Divider: Programmable for Division Ratios 512 and 1024.
3–State Phase/Frequency Comparator
Operational Amplifier for Direct Tuning Voltage Output (30 V)
16
Four Integrated PNP Band Buffers for 40 mA (VCC1 to 14.4 V)
1
Output Options for the Reference Frequency and the
Programmable Divider
High Sensitivity Preamplifier
D SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16)
Circuit to Detect Phase Lock
Fully ESD Protected
MOSAIC is a trademark of Motorola, Inc.
PIN CONNECTIONS
ORDERING INFORMATION
Device
MC44818D
Operating
Temperature Range
Package
TA = –20° to +80°C
SO–16
SDA
1
16
AS
SCL
2
15
Lock
XTAL
3
14
VCC3 12 V
Amp In
4
13
B3
VTUN
5
12
B2
VCC2 33 V
6
11
B1
VCC1 5.0 V
7
10
B0
HF In
8
9
Gnd
(Top View)
 Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
Rev 2
1
MC44818
Representative Block Diagram
Bands Out 30 mA
(40 mA at 0° to 80°C)
VTUN
VCC1
5.0 V
VCC3
7
13
12 11
10
VCC2
14
12 V
5
6
20 k
Fout
B3
Test
Logic
Fref
Operational
Amplifier
T13
9
T9, T12, T14
Phase
Comp
15
T10, T11
DTB2
P–On
Reset
Amp In
2.7 V
Latches
DTB1
Gnd
4
B2 B1 B0
Buffers
Latches
Fout
Lock
Fref
POR
AS
Data
Clock
16
I2C Bus
Receiver
1
2
512/1024
6
4
CL
Shift Register
15 Bit
15
Data
RL
DTF
Ref
Divider
Latches A
Osc
Latches B
HF Input
÷8
Prescaler
8
3
XTAL
TDI
Program Divider
15 Bit
Fout
Latch Control
DTS, EN
This device contains 3,204 active transistors.
MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.)
Rating
Power Supply Voltage (VCC1)
Pin
Value
Unit
7
6.0
V
Band Buffer “Off” Voltage
10–13
14.4
V
Band Buffer “On” Current
10–13
50
mA
Band Buffer – Short Circuit Duration (0 to VCC3) (Note 2)
10–13
Continuous
–
6
40
V
Operational Amplifier Short Circuit Duration (0 to VCC2)
5
Continuous
–
Power Supply Voltage (VCC3)
14
14.4
V
Storage Temperature
–
– 65 to +150
°C
Operating Temperature Range
–
– 20 to +80
°C
10–13
10
sec
Operational Amplifier Output Voltage
5
VCC2
V
RF Input Level (10 MHz to 1.3 GHz)
–
1.5
Vrms
Operational Amplifier Power Supply Voltage (VCC2)
Band Buffer Operation (Note 1) at 50 mA each Buffer All
Buffers “On” Simultaneously
NOTES: 1. At VCC3 = VCC1 to 14.4 V and TA = – 20° to + 80°C.
2. At VCC3 = VCC1 to 14.4 V and TA = – 20° to + 80°C one buffer “On” only.
2
MOTOROLA ANALOG IC DEVICE DATA
MC44818
ELECTRICAL CHARACTERISTICS (VCC1 = 5.0 V, VCC2 = 33 V, VCC3 = 12 V, TA = 25°C, unless otherwise noted.)
Characteristic
Pin
Min
Typ
Max
Unit
VCC1 Supply Voltage Range
7
4.5
5.0
5.5
V
VCC1 Supply Current (VCC1 = 5.0 V)
7
–
37
50
mA
VCC2 Supply Voltage Range
6
25
–
37
V
VCC2 Supply Current (Output Open)
6
–
1.5
2.3
mA
Band Buffer Leakage Current when “Off” at 12 V
10–13
–
0.01
1.0
µA
Band Buffer Saturation Voltage when “On” at 30 mA
10–13
–
0.15
0.3
V
Band Buffer Saturation Voltage when “On” at 40 mA
only for 0° to 80°C
10–13
–
0.2
0.5
V
1, 2
–10
–
0
µA
Clock Current at 5.0 V
2
0
–
1.0
µA
Data Current at 5.0 V Acknowledge “Off”
1
0
–
1.0
µA
Data/Clock Current at 0 V
Data Saturation Voltage at 15 mA Acknowledge “On”
1
–
–
1.0
V
Data/Clock Input Voltage Low
1, 2
–
–
1.5
V
Data/Clock Input Voltage High
1, 2
3.0
–
–
V
Clock Frequency Range
2
–
–
100
kHz
Oscillator Frequency Range
3
3.15
3.2
4.05
MHz
Operational Amplifier Internal Reference Voltage
–
2.0
2.75
3.2
V
Operational Amplifier Input Current
4
–15
0
15
nA
DC Open Loop Voltage Gain
–
100
250
–
V/V
Gain Bandwidth Product (CL = 1.0 nF)
–
0.3
–
–
MHz
Vout Low, Sinking 50 µA
5
–
0.2
0.4
V
Vout High, Sourcing 10 µA, VCC2 – Vout
5
–
0.2
0.5
V
Phase Detector Current in the High Impedance State
4
–15
0
15
nA
Charge Pump High Current of Phase Comparator
4
30
50
85
µA
Charge Pump Low Current of Phase Comparator
4
10
15
30
µA
VCC3 Supply Voltage Range
14
VCC1
–
14.4
V
VCC3 Supply Current
All Buffers “Off”
One Buffer “On” when Open
One Buffer “On” at 40 mA
14
–
–
–
0.2
8.0
48
0.5
13
53
Data Format and Bus Receiver
The circuit receives the information for tuning and control
via the I2C bus. The incoming information, consisting of a
chip address byte followed by two or four data bytes, is
treated in the I2C bus receiver. The definition of the
permissible bus protocol is shown below:
1_STA
2_STA
3_STA
CA
CA
CA
CO
FM
CO
BA
FL
BA
STO
STO
FM FL
mA
4_STA CA FM FL CO BA STO
STA = Start Condition
STO = Stop Condition
CA = Chip Address Byte
CO = Data Byte for Control Information
BA = Band Information
FM = Data Byte for Frequency Information
FL = Data Byte for Frequency Information
STO
Figure 1. Complete Data Transfer Process
SDA
SCL
1–7
8
9
1–7
8
9
1–7
8
9
S
STA
P
ADDRESS
CA
R/W
ACK
MOTOROLA ANALOG IC DEVICE DATA
DATA
ACK
DATA
ACK
STO
3
MC44818
The first and the third data bytes contain a function bit
which allows the IC to distinguish between frequency
information and control plus band information.
Frequency information is preceeded by a Logic “0”. If the
function bit is Logic “1” the two following bytes contain control
and band information. The first data byte, shifted after the
chip address, may be byte CO or byte FM.
The two permissible bus protocols with five bytes are
shown in Figure 2.
Figure 2 shows the five bytes of information that are
needed for circuit operation: there is the chip address, two
bytes of control and band information and two bytes of
frequency information.
After the chip address, two or four data bytes may be
received: if three data bytes are received the third data byte
is ignored.
If five or more data bytes are received the fifth and
following data bytes are ignored and the last acknowledge
pulse is sent at the end of the fourth data byte.
Figure 2. Definition of Bytes
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
CA_Chip Address
CO_Information
BA_Band Information
FM_Frequency Information
FL_Frequency Information
1
1
0
0
0
0/1
0/1
0
ACK
1
T14
T13
T12
T11
T10
T9
T8
ACK
X
X
X
X
B3
B2
B1
B0
ACK
0
N14
N13
N12
N11
N10
N9
N8
ACK
N7
N6
N5
N4
N3
N2
N1
N0
ACK
1
1
0
0
0
0/1
0/1
0
ACK
0
N14
N13
N12
N11
N10
N9
N8
ACK
N7
N6
N5
N4
N3
N2
N1
N0
ACK
1
T14
T13
T12
T11
T10
T9
T8
ACK
X
X
X
X
B3
B2
B1
B0
ACK
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
CA_Chip Address
FM_Frequency Information
FL_Frequency Information
CO_Information
BA_Band Information
Chip Address
The chip address is programmable by Pin 16 (AS –
Address Select).
Bit T8: Controls the Output of the Operational Amplifier
T8 = 0
Normal Operation
Operational Amplifier Active
T8 = 1
Output State of Operational Amplifier Switched “Off”,
Output Pulls High Through 20 k Internal Pull–Up
Resistor
AS – Pin 16
Address (HEX.)
Gnd to 0.1 VCC1
C0
Open or 0.2 VCC1 to 0.3 VCC1
C2
0.4 VCC1 to 0.7 VCC1
C4
T9
T12
0.8 VCC1 to 1.1 VCC1
C6
1
1
0
0
0
1
0
1
Bits B0, B1, B2, B3: Control the Band Buffers
B0, B1, B2, B3 = 0
B0, B1, B2, B3 = 1
VCC3 12 V
25 V
Protection
IB
Normal Operation
High Impedance
Upper Source “On” Only
Lower Source “On” Only
T10
T11
0
0
1
1
0
1
0
1
Division Ratio
512
1024
1024
512
Bit T13: Switches the Internal Signals Fref and FBY2 to
Bit T13: the Band Buffer Outputs (Test)
ISUB
“On”/“Off”
NOTE: IB + ISUB = 8.0 mA Typical, 13 mA Max
IB = Base Current
ISUB = Substrate Current of PNP
4
Function
Bits T10, T11: Control the Reference Ratio
Buffer “Off”
Buffer “On”
Figure 3. Equivalent Circuit of the Integrated
Band Buffers
Gnd
Bits T9, T12: Control the Phase Comparator
Out
B0…B3
30 mA (40 mA
at 0 to 80°C)
T13 = 0
T13 = 1
Normal Operation
Test Mode
Fref Output at B2 (Pin 12)
FBY2 Output at B3 (Pin 13)
Bits B2 and B3 have to be “On”, B2 = B3 = 1 in the test mode.
Fref is the reference frequency.
FBY2 is the output frequency of the programmable divider, divided by two.
MOTOROLA ANALOG IC DEVICE DATA
MC44818
Lock Detector
The lock detector output is low in lock. The output goes
immediately high when an unlock condition is detected. The
output goes low again when the loop is in lock during a
complete period of the reference frequency.
Bit T14: Controls the Charge Pump Current of the
Bit T14: Phase Comparator
T14 = 0
T13 = 1
Pump Current 15 µA Typical
Pump Current 50 µA Typical
The Programmable Divider
The programmable divider is a presettable down counter.
When it has counted to zero it takes its required division ratio
out of the latches B. Latches B are loaded from latches A by
means of signal TDI which is synchronous to the
programmable divider output signal.
Since latches A receive the data asynchronously with the
programmable divider; this double latch scheme is needed to
assure correct data transfer to the counter.
The division ratio definition is given by:
N = 16384 x N14 + 8192 x N13 + … + 4 x N2 + 2 x N1 + N0
Maximum Ratio 32767
Minimum Ratio 17
N0 … N14 are the different bits for frequency information.
At power “on” the whole bus receiver is reset and the
programmable divider is set to a counting ratio of N = 256 or
higher.
Figure 4. Equivalent Circuit of the Lock Output
VCC1 5.0 V
200 µA Typical
2.0 k
Lock
100 k
25 V Protection
The Operational Amplifier
The operational amplifier is designed for very low noise,
low input bias current and high power supply rejection. The
positive input is biased internally. The operational amplifier
needs 28.5 V supply (VCC2) as minimum voltage for a
guaranteed maximum tuning voltage of 28 V.
Figure NO TAG shows a possible filter arrangement. The
component values depend very much on the application
(tuner characteristic, reference frequency, etc.).
The Prescaler
The prescaler has a preamplifier which guarantees high
input sensitivity.
The Oscillator
The oscillator uses a 3.2 to 4.0 MHz crystal tied to ground in
series with a capacitor. The crystal operates in the series
resonance mode.
The voltage at Pin 3 has low amplitude and low harmonic
distortion.
The Phase Comparator
The phase comparator is phase and frequency sensitive
and has very low output leakage current in the high
impedance state.
Figure 5. Typical Tuner Application
IF
External Switching
UHF
VHF
B III
13
5.0 V 7
Antenna
Filter
12
B3
B2
11
B1
10
B0
14 12 V
VCC3
Mixer
B. P. Filter
MC44818
1.0 nF
÷8
Pres
8
2
1
16
Bus
Rec
Program
Divider
Osc & 3
Ref Div
Fosc
Oscillator
Gnd
9
2.7 V
6
NOTES: 1. On some layouts the 100 Ω resistor will not be required.
2. C2 = 330 pF minimum is required for stability.
MOTOROLA ANALOG IC DEVICE DATA
4
(Note 1)
VTUN
AGC
5
SCL
SDA
AS
12 pF
3.2/4.0 MHz
Phase
Comp
15
Lock
47 k
47 nF
330 p
(Note 2)
33 V
22 nF
5
MC44818
Figure 6. HF Sensitivity Test Circuit
ÇÇÇÇÇÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇÇÇÇÇÇ
Bus
Bus Controller
1
VCC1
VCC3
2
14
MC44818
7
HF
8
Gnd
9
B3
13
B2
12
B1
11
B0
10
HF Generator
HF Out
Gnd
1.0 nF
50 Ω Cable
4.7 k
Frequency
Counter
390 Ω
4.7 k
In
390 Ω
50 Ω
Device is in test mode. B2, B3 are “On” and B0, B1 are “Off”.
Sensitivity is level of HF generator on 50 Ω load (without Pin 8 loading).
HF CHARACTERISTICS (See Figure NO TAG)
Pin
Min
Typ
Max
Unit
DC Bias
8
–
1.6
–
V
Input Voltage Range
80–150 MHz
150–600 MHz
600–950 MHz
950–1300 MHz
8
8
8
8
10
5.0
10
50
–
–
–
–
315
315
315
315
Characteristic
mVrms
Figure 7. Typical HF Input Impedance
–j
+j
0
0.5
0.5
0.5
ZO = 50 Ω
1.3 GHz
1
1
1
1.0 GHz
2
2
2
500 MHz
50 MHz
6
MOTOROLA ANALOG IC DEVICE DATA
MC44818
Figure 8. Pin Circuit Schematic
VCC1
96 k
132 k
SDA 1
Data input
(I2C bus)
VCC1
50
150 k
500
1/2 VCC1
20 V
96 k
20 V
50 k
16 AS
Address Select
(I2C bus)
ACK
VCC1
132 k
500
SCL 2
Clock input (supplied
by a microprocessor
via I2C bus)
XTAL 3
Crystal oscillator
(3.2 MHz or 4.0 MHz)
VCC1
96 k
2.0 k
1/2 VCC1
20 V
15 LOCK
Lock detector output
96 k
20 V
100 k
20 V
100
5.0 V
20 V
“On”/“Off”
2.0 k
AMP IN 4
Negative input of
operation amplifier and
charge pump output
14 VCC3
Positive supply for integrated
band buffers (12 V)
13 B3
10 k
20 V
20 V
“On”/“Off”
12 B2
20 k
Band buffer outputs
can drive up to 30 mA
(40 mA at 0° to 80°C)
100
VTUN 5
Operational amplifier
output which provides
the tuning voltage
20 V
20 V
20 V
“On”/“Off”
VCC2 6
Operational amplifier
positive supply (33 V)
20 V
VCC1 7
Positive supply of
the circuit (5.0 V)
5.0 V
11 B1
20 V
5.0 V
“On”/“Off”
18 k
2.0 k
HF IN 8
HF input from
local oscillator
20 V
10 B0
1.2 … 1.8 V
2.0 k
9 GND
Circuit Ground
MOTOROLA ANALOG IC DEVICE DATA
7
MC44818
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC PACKAGE
CASE 751B–05
(SO–16)
ISSUE J
–A–
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
9
–B–
1
P 8 PL
0.25 (0.010)
8
M
B
M
G
K
F
R X 45°
C
–T–
SEATING
PLANE
M
D 16 PL
0.25 (0.010)
M
T B
S
A
S
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80 10.00
4.00
3.80
1.75
1.35
0.49
0.35
1.25
0.40
1.27 BSC
0.25
0.19
0.25
0.10
7°
0°
6.20
5.80
0.50
0.25
INCHES
MIN
MAX
0.386 0.393
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
7°
0°
0.229 0.244
0.010 0.019
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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Opportunity/Affirmative Action Employer.
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8
◊
*MC44818/D*
MOTOROLA ANALOG IC DEVICE
DATA
MC44818/D