IDT54/74FCT573T/AT/CT FAST CMOS OCTAL TRANSPARENT LATCH MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS OCTAL TRANSPARENT LATCH FEATURES: • • • • • • • • • IDT54/74FCT573T/AT/CT DESCRIPTION: Std., A, and C grades Low input and output leakage ≤1µA (max.) CMOS power levels True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Power off disable outputs permit "live insertion" Available in the following packages: – Industrial: SOIC, SSOP, QSOP, TSSOP – Military: CERDIP, LCC The FCT573Tis an octal transparent latch built using an advanced dual metal CMOS technology. These octal latches have 3-state outputs and are intended for bus oriented applications. The flip-flops appear transparent to the data when Latch Enable (LE) is high. When LE is low, the data that meets the set-up time is latched. Data appears on the bus when the Output Enable (OE) is low. When OE is high, the bus output is in the high-impedance state. FUNCTIONAL BLOCK DIAGRAM D0 D2 D1 D D3 D D O D O G D7 D D O G G D6 D5 D O O G D4 D O O G O G G G LE OE O0 O1 O2 O3 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND INDUSTRIAL TEMPERATURE RANGES O4 O5 O6 O7 JUNE 2002 1 © 2002 Integrated Device Technology, Inc. DSC-5948/3 IDT54/74FCT573T/AT/CT FAST CMOS OCTAL TRANSPARENT LATCH MILITARY AND INDUSTRIAL TEMPERATURE RANGES D0 2 19 O0 D1 3 18 O1 D2 4 17 O2 D3 5 16 D4 6 D5 INDEX 2 1 16 O3 O4 D5 7 15 O4 14 O5 D6 8 14 O5 8 13 O6 9 12 O7 10 11 LE 15 7 D6 D7 9 10 11 Description PIN DESCRIPTION Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA Pin Names Dx LE OE Ox NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Output and I/O terminals only. Typ. Max. Dx H L X CIN Input Capacitance VIN = 0V 6 10 pF Output Capacitance VOUT = 0V 8 12 pF Inputs LE H H X NOTE: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High Impedance Unit COUT Description Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) 3-State Outputs FUNCTION TABLE(1) CAPACITANCE (TA = +25°C, F = 1.0MHz) Conditions 13 LCC TOP VIEW Max Parameter(1) 12 O6 6 O7 D4 O3 LE O2 GND 17 D7 5 D3 ABSOLUTE MAXIMUM RATINGS(1) Symbol 19 O1 CERDIP/ SOIC/ SSOP/ QSOP/ TSSOP TOP VIEW Symbol 20 18 D2 4 GND 3 O0 VCC VCC 20 OE 1 D0 OE D1 PIN CONFIGURATION NOTE: 1. This parameter is measured at characterization but not tested. 2 OE L L H Outputs Ox H L Z IDT54/74FCT573T/AT/CT FAST CMOS OCTAL TRANSPARENT LATCH MILITARY AND INDUSTRIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10% Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V IIH Input HIGH Current(4) VCC = Max. VI = 2.7V — — ±1 µA IIL Input LOW Current(4) VCC = Max. VI = 0.5V — — ±1 µA IOZH High Impedance Output Current VCC = Max VO = 2.7V — — ±1 µA IOZL (3-State output pins)(4) VO = 0.5V — — ±1 II VIK VH Input HIGH Current(4) Clamp Diode Voltage Input Hysteresis VCC = Max., VI = VCC (Max.) VCC = Min, IIN = -18mA — — — — –0.7 200 ±1 –1.2 — µA V mV ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.01 1 mA Min. 2.4 Typ.(2) 3.3 Max. — Unit 2 3 — — 0.3 0.5 V –60 –120 –225 mA — — ±1 µA — OUTPUT DRIVE CHARACTERISTICS VOL Output LOW Voltage IOS Short Circuit Current Test Conditions(1) VCC = Min IOH = –6mA MIL VIN = VIH or VIL IOH = –8mA IND IOH = –12mA MIL IOH = –15mA IND VCC = Min IOL = 32mA MIL VIN = VIH or VIL IOL = 48mA IND VCC = Max., VO = GND(3) IOFF Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO ≤ 4.5V Symbol VOH Parameter Output HIGH Voltage V NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter is ±5µA at TA = –55°C. 5. This parameter is guaranteed but not tested. 3 IDT54/74FCT573T/AT/CT FAST CMOS OCTAL TRANSPARENT LATCH MILITARY AND INDUSTRIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Test Conditions(1) Min. Typ.(2) Max. Unit — 0.5 2 mA VIN = VCC VIN = GND — 0.15 0.25 mA/ MHz VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle OE = GND LE = VCC One Bit Toggling VIN = VCC VIN = GND — 1.5 3.5 mA VIN = 3.4V VIN = GND — 1.8 4.5 VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle OE = GND LE = VCC Eight Bits Toggling VIN = VCC VIN = GND — 3 6(5) VIN = 3.4V VIN = GND — 5 14(5) Symbol Parameter ∆ICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = 3.4V(3) ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open OE = GND One Input Toggling 50% Duty Cycle Total Power Supply Current(6) IC NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Output Frequency Ni = Number of Outputs at fi All currents are in milliamps and all frequencies are in megahertz. 4 mA IDT54/74FCT573T/AT/CT FAST CMOS OCTAL TRANSPARENT LATCH MILITARY AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL 74FCT573AT Symbol Parameter 74FCT573CT Condition(1) Min.(2) Max. Min.(2) Max. Unit 1.5 5.2 1.5 4.2 ns 2 8.5 2 5.5 ns tPLH Propagation Delay CL = 50pF tPHL Dx to Ox RL = 500Ω tPLH Propagation Delay tPHL LE to Ox tPZH Output Enable Time 1.5 6.5 1.5 5.5 ns Output Disable Time 1.5 5.5 1.5 5 ns 2 — 2 — ns 1.5 — 1.5 — ns 5 — 5 — ns tPZL tPHZ tPLZ tSU Set-up Time, HIGH or LOW Dx to LE tH Hold Time, HIGH or LOW Dx to LE tW LE Pulse Width HIGH(3) SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY 54FCT573T Symbol Parameter 54FCT573AT 54FCT573CT Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit 1.5 8.5 1.5 5.6 1.5 5.1 ns 2 15 2 9.8 2 8 ns tPLH Propagation Delay CL = 50pF tPHL Dx to Ox RL = 500Ω tPLH Propagation Delay tPHL LE to Ox tPZH Output Enable Time 1.5 13.5 1.5 7.5 1.5 6.3 ns Output Disable Time 1.5 10 1.5 6.5 1.5 5.9 ns 2 — 2 — 2 — ns 1.5 — 1.5 — 1.5 — ns 6 — 6 — 6 — ns tPZL tPHZ tPLZ tSU Set-up Time, HIGH or LOW Dx to LE tH Hold Time, HIGH or LOW Dx to LE tW LE Pulse Width HIGH(3) NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This limit is guaranteed but not tested. 5 IDT54/74FCT573T/AT/CT FAST CMOS OCTAL TRANSPARENT LATCH MILITARY AND INDUSTRIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS V CC SWITCH POSITION 7.0V 500Ω V OUT VIN Pulse Generator D.U.T . 50pF RT 500Ω Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. CL Octal link Test Circuits for All Outputs DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. 3V 1.5V 0V 3V 1.5V 0V tREM tSU LOW-HIGH-LOW PULSE tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 3V 1.5V 0V tH 1.5V 1.5V Octal link Pulse Width Octal link Set-Up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V DISABLE 3V 1.5V CONTROL INPUT OUTPUT NORMALLY LOW 3V 1.5V 0V OUTPUT NORMALLY HIGH Octal link SWITCH CLOSED tPZH SWITCH OPEN 0V tPLZ tPZL VOH 1.5V VOL 3.5V 3.5V 1.5V 0.3V VOL tPHZ 0.3V 1.5V 0V VOH 0V Octal link Propagation Delay Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 6 IDT54/74FCT573T/AT/CT FAST CMOS OCTAL TRANSPARENT LATCH MILITARY AND INDUSTRIAL TEMPERATURE RANGES ORDERING INFORMATION XXXX IDT XX FCT Device Type Temp. Range XX Package X Process Blank B Industrial MIL-STD-883, Class B SO PY Q PG Industrial Options Small Outline IC Shrink Small Outline Package Quarter-size Small Outline Package Think Shrink Small Outline Package D L Military Options CERDIP Leadless Chip Carrier 573T 573AT 573CT Fast CMOS Octal Transparent Latch 54 74 – 55°C to +125°C – 40°C to +85°C DATA SHEET DOCUMENT HISTORY 6/24/2002 Updated as per PDNs Logic-00-07 and Logic-01-04 CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 7 for Tech Support: [email protected] (408) 654-6459