Renesas HD74HC164FPEL 8-bit parallel-out shift register Datasheet

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HD74HC164
8-bit Parallel-out Shift Register
REJ03D0580-0400
Rev.4.00
Mar 25, 2009
Description
This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A
& B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and
resets the first flip-flop to the low level at the next clock pulse. A high level on the input enables the other input which
will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or
low, but only information meeting the setup and hold time requirements will be entered. Data is serially shifted in and
out of the 8-bit register during the positive going transition of the clock pulse. Clear is independent of the clock and
accomplished by a low level at the clear input.
Features
•
•
•
•
•
•
High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max
Ordering Information
Package Type
Package Code
(Previous Code)
Package
Abbreviation
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74HC164FPEL
SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
EL (2,000 pcs/reel)
HD74HC164RPEL
SOP-14 pin (JEDEC)
PRSP0014DE-A
(FP-14DNV)
RP
EL (2,500 pcs/reel)
Part Name
HD74HC164P
Note:
Taping Abbreviation
(Quantity)
—
Please consult the sales office for the above package availability.
Function Table
Inputs
Clear
L
H
H
H
H
Clock
X
Outputs
A
X
X
L
X
H
B
X
X
X
L
H
QA
L
QAo
L
L
H
QB
L
QBo
QAn
QAn
QAn
QAo to QHo = Outputs remain unchanged.
QAn to QGn = Data shifted from the previous stage on a positive edge at the clock input.
H:
High level
L:
Low level
X:
Irrelevant
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 1 of 7
·········
·········
·········
·········
·········
·········
QH
L
QHo
QGn
QGn
QGn
HD74HC164
Pin Arrangement
A
1
B
2
B
QH
13 QH
QA
3
QA
QG
12 QG
QB
4
QB
QF
11 QF
QC
5
QC
QE
10 QE
QD
6
QD
GND
7
Serial
Inputs
14 VCC
A
Outputs
Outputs
CK
CLR
9
Clear
8
Clock
(Top view)
Logic Diagram
Clock
A
B
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
CLR
CLR
CLR
CLR
CLR
CLR
CLR
CLR
Clear
QA
Timing Diagram
Clock
A
B
Clear
QA
QB
QC
QD
QE
QF
QG
QH
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 2 of 7
QB
QC
QD
QE
QF
QG
QH
HD74HC164
Absolute Maximum Ratings
Item
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
VCC, GND current
Power dissipation
Storage temperature
Note:
Symbol
VCC
Vin, Vout
IIK, IOK
IO
ICC or IGND
PT
Tstg
Ratings
–0.5 to 7.0
–0.5 to VCC +0.5
±20
±25
±50
500
–65 to +150
Unit
V
V
mA
mA
mA
mW
°C
The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Supply voltage
Input / Output voltage
Operating temperature
Symbol
VCC
VIN, VOUT
Ta
Input rise / fall time*1
Ratings
2 to 6
0 to VCC
–40 to 85
0 to 1000
0 to 500
tr, tf
Unit
V
V
°C
ns
0 to 400
Note:
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item
Symbol VCC (V)
VIH
Input voltage
VIL
VOH
Output voltage
VOL
Ta = 25°C
Typ Max
—
—
2.0
Min
1.5
4.5
3.15
—
—
6.0
4.2
—
—
Ta = –40 to+85°C
Unit
Min
Max
1.5
—
V
3.15
—
4.2
Test Conditions
—
2.0
—
—
0.5
—
0.5
4.5
—
—
1.35
—
1.35
6.0
2.0
—
1.9
—
2.0
1.8
—
—
1.9
1.8
—
4.5
4.4
4.5
—
4.4
—
6.0
5.9
6.0
—
5.9
—
4.5
4.18
—
—
4.13
—
IOH = –4 mA
6.0
5.68
—
—
5.63
—
IOH = –5.2 mA
2.0
—
0.0
0.1
—
0.1
4.5
—
0.0
0.1
—
0.1
6.0
—
0.0
0.1
—
0.1
4.5
—
—
0.26
—
0.33
V
IOH = –20 µA
V
Vin = VIH or VIL
IOL = 20 µA
V
Vin = VIH or VIL
IOL = 4 mA
Input current
Iin
6.0
6.0
—
—
—
—
0.26
±0.1
—
—
0.33
±1.0
IOL = 5.2 mA
µA Vin = VCC or GND
Quiescent supply
current
ICC
6.0
—
—
4.0
—
40
µA Vin = VCC or GND, Iout = 0 µA
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 3 of 7
HD74HC164
Switching Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item
Maximum clock
frequency
Propagation delay
time
Setup time
Hold time
Removal time
Pulse width
Output rise/fall
time
Input capacitance
Symbol VCC (V)
Ta = 25°C
Ta = –40 to +85°C
Unit
Min
Typ Max
Min
Max
—
—
5
—
4
MHz
—
—
25
—
20
Test Conditions
fmax
2.0
4.5
tPHL
6.0
2.0
4.5
—
—
—
—
—
14
29
160
32
—
—
—
24
200
40
tPLH
6.0
2.0
4.5
—
—
—
—
—
15
27
160
32
—
—
—
34
200
40
ns
tPHL
6.0
2.0
4.5
—
—
—
—
—
17
27
175
35
—
—
—
34
220
44
ns
Clear to Q
tsu
6.0
2.0
4.5
—
100
20
—
—
1
30
—
—
—
125
25
37
—
—
ns
A, B to Clock
6.0
2.0
17
5
—
—
—
—
21
5
—
—
th
4.5
5
0
—
5
—
ns
Clock to A, B
trem
6.0
2.0
4.5
5
5
5
—
—
0
—
—
—
5
5
5
—
—
—
ns
Clear to Clock
5
80
16
14
80
16
14
—
—
—
—
8
—
—
5
—
—
5
—
—
—
—
—
—
—
75
15
5
100
20
17
100
20
17
—
—
—
—
—
—
—
—
—
95
19
ns
Clock
ns
Clear
tTLH, tTHL
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
ns
Cin
6.0
—
—
—
—
5
13
10
—
—
16
10
pF
tw
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 4 of 7
ns
Clock to Q
HD74HC164
Test Circuit
Measurement point
CL*
Note: CL includes the probe and fig capacitance.
Waveforms
tf
tr
90%
Clear
VCC
90%
50%
50%
10% 10%
tW (Clear)
trem
tr
tf
90%
Clock
50%
10%
tW (Clock)
tr
90%
50%
10%
VCC
50%
50%
0V
th
tsu
50%
50%
10%
10%
tPHL
tsu
th
VCC
90%
90%
50%
Serial A, B
0V
tW (Clock)
tPLH
50%
0V
tf
tPHL
VOH
Output QA
50%
50%
(Note 3)
50%
VOL
tTHL
tTLH
Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
2. The output are measured one at a time with one transition per measurement.
3. See function table for QB to QH outputs.
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 5 of 7
HD74HC164
Package Dimensions
JEITA Package Code
P-DIP14-6.3x19.2-2.54
RENESAS Code
PRDP0014AB-B
Previous Code
DP-14AV
MASS[Typ.]
0.97g
D
8
E
14
7
1
b3
A
Z
A1
Reference
Symbol
L
e1
D
E
A
A1
bp
b3
c
θ
e
Z
L
θ
bp
e
c
e1
( Ni/Pd/Au plating )
JEITA Package Code
P-SOP14-5.5x10.06-1.27
RENESAS Code
PRSP0014DF-B
*1
Previous Code
FP-14DAV
Dimension in Millimeters
Min
Nom Max
7.62
19.2 20.32
6.3 7.4
5.06
0.51
0.40 0.48 0.56
1.30
0.19 0.25 0.31
0°
15°
2.29 2.54 2.79
2.39
2.54
MASS[Typ.]
0.23g
D
F
14
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
8
c
HE
*2
E
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
1
Z
7
e
*3
bp
x
Reference Dimension in Millimeters
Symbol
M
A
L1
A1
θ
y
L
Detail F
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 6 of 7
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Min Nom Max
10.06 10.5
5.50
0.00 0.10 0.20
2.20
0.34 0.40 0.46
0.15 0.20 0.25
0°
8°
7.50 7.80 8.00
1.27
0.12
0.15
1.42
0.50 0.70 0.90
1.15
HD74HC164
JEITA Package Code
P-SOP14-3.95x8.65-1.27
RENESAS Code
PRSP0014DE-A
*1
Previous Code
FP-14DNV
MASS[Typ.]
0.13g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
D
14
8
c
*2
Index mark
HE
E
bp
Terminal cross section
( Ni/Pd/Au plating )
Reference Dimension in Millimeters
Symbol
Min
1
Z
7
e
*3
bp
x
M
A
L1
A1
θ
L
y
Detail F
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 7 of 7
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Nom Max
8.65 9.05
3.95
0.10 0.14 0.25
1.75
0.34 0.40 0.46
0.15 0.20 0.25
0°
8°
5.80 6.10 6.20
1.27
0.25
0.15
0.635
0.40 0.60 1.27
1.08
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Notes:
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destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws
and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this
document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document,
please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be
disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com )
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result of errors or omissions in the information included in this document.
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9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range,
movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages
arising out of the use of Renesas products beyond such specified ranges.
10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain
rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage
caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and
malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software
alone is very difficult, please evaluate the safety of the final products or system manufactured by you.
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