Harris CA3028AE Differential/cascode amplifiers for commercial and industrial equipment from dc to 120mhz Datasheet

CA3028A, CA3028B,
CA3053
S E M I C O N D U C T O R
Differential/Cascode Amplifiers for Commercial
and Industrial Equipment from DC to 120MHz
November 1996
Features
Description
• Controlled for Input Offset Voltage, Input Offset
Current and Input Bias Current (CA3028 Series Only)
The CA3028A and CA3028B are differential/cascode
amplifiers designed for use in communications and industrial
equipment operating at frequencies from DC to 120MHz.
• Balanced Differential Amplifier Configuration with
Controlled Constant Current Source
The CA3028B is like the CA3028A but is capable of premium performance particularly in critical DC and differential
amplifier applications requiring tight controls for input offset
voltage, input offset current, and input bias current.
• Single-Ended and Dual-Ended Operation
Applications
The CA3053 is similar to the CA3028A and CA3028B but is
recommended for IF amplifier applications.
• RF and IF Amplifiers (Differential or Cascode)
• DC, Audio and Sense Amplifiers
Ordering Information
• Converter in the Commercial FM Band
PART NUMBER
(BRAND)
• Oscillator
• Mixer
• Limiter
• Related Literature
- Application Note AN5337 “Application of the
CA3028 Integrated Circuit Amplifier in the HF and
VHF Ranges.” This note covers characteristics of
different operating modes, noise performance,
mixer, limiter, and amplifier design considerations
Pinouts
PACKAGE
PKG.
NO.
CA3028A
-55 to 125
8 Pin Metal Can
T8.C
CA3028AE
-55 to 125
8 Ld PDIP
E8.3
CA3028AM
(3028A)
-55 to 125
8 Ld SOIC
M8.15
CA3028AM96
(3028A)
-55 to 125
8 Ld SOIC Tape
and Reel
M8.15
CA3028B
-55 to 125
8 Pin Metal Can
T8.C
CA3028BE
-55 to 125
8 Ld PDIP
E8.3
CA3028BM
(3028B)
-55 to 125
8 Ld SOIC
M8.15
CA3053
-55 to 125
8 Pin Metal Can
T8.C
CA3053E
-55 to 125
8 Ld PDIP
E8.3
Schematic Diagram
CA3028A/B, CA3053
(METAL CAN)
TOP VIEW
8
1
7
–
+
2
TEMP.
RANGE (oC)
6
CA3028A/B, (PDIP, SOIC)
CA3053 (PDIP)
TOP VIEW
(Terminal Numbers Apply to All Packages)
8
1
8
1
2
7
7
3
6
4
5
2
R1
Q2
Q1
5
5kΩ
Q3
5
3
6
4
R2
2.8kΩ
4
R3
500Ω
3
SUBSTRATE
AND CASE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1996
7-6
File Number
382.3
CA3028A, CA3028B, CA3053
Operating Conditions
Thermal Information
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
Metal Can Package . . . . . . . . . . . . . . .
225
140
PDIP Package . . . . . . . . . . . . . . . . . . .
155
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
185
N/A
Maximum Junction Temperature (Metal Can Package) . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Absolute Maximum Voltage Ratings
TA = 25oC
The following chart gives the range of voltages which can be applied to the terminals listed
horizontally with respect to the terminals listed vertically. For example, the voltage range of the
horizontal Terminal 4 with respect to Terminal 2 is -1V to +5V.
TERM
NO.
2
3
4
5
6
7
8
TERM
NO.
0 to -15
(Note 4)
0 to -15
(Note 4)
0 to -15
(Note 4)
+5 to -5
Note 3
Note 3
+20 to 0
(Note 5)
1
+5 to -11
+5 to -1
+15 to 0
(Note 6)
Note 3
+15 to 0
(Note 6)
+15 to 0
(Note 6)
1
1
Absolute Maximum
Current Ratings
2
3
(Note 2)
+10 to 0
4
+15 to 0
(Note 6)
Note 3
+30 to 0
(Note 7)
+15 to 0
(Note 6)
+30 to 0
(Note 7)
Note 3
Note 3
Note 3
IIN
mA
IOUT
mA
0.6
0.1
4
0.1
0.1
23
20
0.1
0.6
0.1
20
0.1
4
0.1
20
0.1
2
3
4
+20 to 0
(Note 5)
5
6
Note 3
Note 3
5
Note 3
Note 3
6
7
Note 3
7
8
8
NOTES:
2. Terminal No. 3 is connected to the substrate and case.
3. Voltages are not normally applied between these terminals. Voltages appearing between these
terminals will be safe, if the specified voltage limits between all other terminals are not exceeded.
4. Limit is -12V for CA3053.
5. Limit is +15V for CA3053.
6. Limit is +12V for CA3053.
7. Limit is +24V for CA3028A and +18V for CA3053.
Electrical Specifications
TA = 25oC
CA3028A
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
CA3028B
MAX MIN
TYP
CA3053
MAX MIN
TYP
MAX UNIT
DC CHARACTERISTICS
Input Offset Voltage
(Figures 1, 14)
VIO
Input Offset Current
(Figures 2, 14)
IIO
Input Bias Current
(Figures 2, 3, 15, 16)
II
VCC = 6V, VEE = -6V
-
-
-
-
0.98
5.0
-
-
-
mV
VCC = 12V, VEE = -12V
-
-
-
-
0.89
5.0
-
-
-
mV
VCC = 6V, VEE = -6V
-
-
-
-
0.56
5.0
-
-
-
µA
VCC = 12V, VEE = -12V
-
-
-
-
1.06
6.0
-
-
-
µA
VCC = 6V, VEE = -6V
-
16.6
70
-
16.6
40
-
-
-
µA
VCC = 12V, VEE = -12V
-
36
106
-
36
80
-
-
-
µA
-
-
-
-
-
-
29
85
µA
-
-
-
-
-
-
36
125
µA
VCC = 9V
VCC = 12V
-
7-7
CA3028A, CA3028B, CA3053
Electrical Specifications
TA = 25oC (Continued)
CA3028A
PARAMETER
SYMBOL
Quiescent Operating
Current (Figures 2, 3, 17,
18, 19)
I6, I8
AGC Bias Current
(Into Constant Current
Source Terminal 7)
(Figures 4, 20)
I7
Input Current
(Terminal 7)
I7
Power Dissipation
(Figures 2, 3, 21)
PT
TEST CONDITIONS
CA3028B
TYP
VCC = 6V, VEE = -6V
0.8
1.25
2.0
1.0
1.25
1.5
-
-
-
mA
VCC = 12V, VEE = -12V
2.0
3.3
5.0
2.5
3.3
4.0
-
-
-
mA
VCC = 9V
-
-
-
-
-
-
1.2
2.2
3.5
mA
VCC = 12V
-
-
-
-
-
-
2.0
3.3
5.0
mA
VCC = 12V, VAGC = 9V
-
1.28
-
-
1.28
-
-
-
-
mA
VCC = 12V, VAGC = 12V
-
1.65
-
-
1.65
-
-
-
-
mA
VCC = 9V
-
-
-
-
-
-
-
1.15
-
mA
VCC = 12V
MAX MIN
TYP
CA3053
MIN
MAX MIN
TYP
MAX UNIT
-
-
-
-
-
-
-
1.55
-
mA
VCC = 6V, VEE = -6V
0.5
0.85
1.0
0.5
0.85
1.0
-
-
-
mA
VCC = 12V, VEE = -12V
1.0
1.65
2.1
1.0
1.65
2.1
-
-
-
mA
VCC = 6V, VEE = -6V
24
36
54
24
36
42
-
-
-
mW
VCC = 12V, VEE = -12V
120
175
260
120
175
220
-
-
-
mW
VCC = 9V
-
-
-
-
-
-
-
50
80
mW
VCC = 12V
-
-
-
-
-
-
-
100
150
mW
f = 100MHz Cascode
16
20
-
16
20
-
-
-
-
dB
VCC = 9V
14
17
-
14
17
-
-
-
-
dB
f = 10.7MHz Cascode
(Note 8)
35
39
-
35
39
-
35
39
-
dB
VCC = 9V
28
32
-
28
32
-
28
32
-
dB
f = 100MHz, Cascode
VCC = 9V
Diff. Amp.
-
7.2
9.0
-
7.2
9.0
-
-
-
dB
-
6.7
9.0
-
6.7
9.0
-
-
-
dB
f = 10.7MHz, Cascode
VCC = 9V
-
0.6 +
j1.6
-
-
0.6 +
j1.6
-
-
0.6 +
j1.6
-
mS
-
0.5 +
j0.5
-
-
0.5 +
j0.5
-
-
0.5 +
j0.5
-
mS
-
0.0003
- j0
-
-
0.0003
- j0
-
-
0.0003
- j0
-
mS
-
0.01 j0.0002
-
-
0.01 j0.0002
-
-
0.01 j0.0002
-
mS
-
99 j18
-
-
99 j18
-
-
99 j18
-
mS
-
-37 +
j0.5
-
-
-37 +
j0.5
-
-
-37 +
j0.5
-
mS
-
0+
j0.08
-
-
0+
j0.08
-
-
0+
j0.08
-
mS
-
0.04 +
j0.23
-
-
0.04 +
j0.23
-
-
0.04 +
j0.23
-
mS
DYNAMIC CHARACTERISTICS
Power Gain (Figures 5,
6, 7, 22, 24, 26)
GP
Noise Figure (Figures 5,
6, 7, 23, 25, 26)
NF
Input Admittance
(Figures 27, 28)
Y11
Diff. Amp.
Diff. Amp.
(Note 8)
Diff. Amp.
Reverse Transfer
Admittance
(Figures 29, 30)
Y12
Forward Transfer
Admittance
(Figures 31, 32)
Y21
Output Admittance
(Figures 33, 34)
Y22
f = 10.7MHz, Cascode
VCC = 9V
Diff. Amp.
f = 10.7MHz, Cascode
VCC = 9V
Diff. Amp.
f = 10.7MHz, Cascode
VCC = 9V
Diff. Amp.
Output Power (Untuned)
(Figures 8, 35)
PO
f = 10.7MHz, Diff. Amp.,
VCC = 9V
50Ω InputOutput
-
5.7
-
-
5.7
-
-
-
-
µW
AGC Range (Maximum
Power Gain to Full Cutoff) (Figures 9, 36)
AGC
f = 10.7MHz, Diff. Amp.
VCC = 9V
-
62
-
-
62
-
-
-
-
dB
Voltage Gain
(Figures 10, 11, 37, 38)
A
f = 10.7MHz, Cascode
VCC = 9V,
Diff. Amp.
RL = 1kΩ
-
40
-
-
40
-
-
40
-
dB
-
30
-
-
30
-
-
30
-
dB
Differential Voltage Gain
at f = 1kHz (Figure 12)
A
VCC = 6V, VEE = -6V,
RL = 2kΩ
-
-
-
35
38
42
-
-
-
dB
VCC = 12V, VEE = -12V,
RL = 1.6kΩ
-
-
-
40
42.5
45
-
-
-
dB
7-8
CA3028A, CA3028B, CA3053
TA = 25oC (Continued)
Electrical Specifications
CA3028A
PARAMETER
SYMBOL
Max Peak-to-Peak
Output Voltage at f = 1kHz
(Figure 12)
VO(P-P)
Bandwidth at -3dB Point
(Figure 12)
BW
Common Mode Input
Voltage Range
(Figure 13)
VCMR
Common Mode Rejection Ratio (Figure 13)
CMRR
Input Impedance at
f = 1kHz
ZIN
Peak-to-Peak Output
Current
IP-P
TEST CONDITIONS
CA3028B
MAX MIN
TYP
CA3053
MIN
TYP
MAX MIN
VCC = 6V, VEE = -6V,
RL = 2kΩ
-
-
-
7.0
11.5
-
-
TYP
-
MAX UNIT
-
VP-P
VCC = 12V, VEE = -12V,
RL = 1.6kΩ
-
-
-
15
23
-
-
-
-
VP-P
VCC = 6V, VEE = -6V,
RL = 2kΩ
-
-
-
-
7.3
-
-
-
-
MHz
VCC = 12V, VEE = -12V,
RL = 1.6kΩ
-
-
-
-
8.0
-
-
-
-
MHz
VCC = 6V, VEE = -6V
-
-
-
-2.5
-3.2 to
-4.5
4
-
-
-
V
VCC = 12V, VEE = -12V
-
-
-
-5.0
-7 to
-9
7
-
-
-
V
VCC = 6V, VEE = -6V
-
-
-
60
110
-
-
-
-
dB
VCC = 12V, VEE = -12V
-
-
-
60
90
-
-
-
-
dB
VCC = 6V, VEE = -6V
-
-
-
-
5.5
-
-
-
-
kΩ
VCC = 12V, VEE = -12V
-
-
-
-
3.0
-
-
-
-
kΩ
f = 10.7MHz, VCC = 9V
eIN =
VCC = 12V
400mV,
Diff. Amp.
2.0
4.0
7.0
2.5
4.0
6.0
2.0
4.0
7.0
mA
3.5
6.0
10
4.5
6.0
8.0
3.5
6.0
10
mA
NOTE:
8. Does not apply to CA3053.
Test Circuits
VCC
3µF
1kΩ
VCC
1kΩ
270Ω
+
VOUT
6
DC DIFF.
VOLTMETER
FLUKE TYPE
80 OR EQUIV.
3µF
+
-
-
I8
6
8
2.7Ω
2.7Ω
I6
8
1
3V
+
2.7Ω
R1
10Ω
1
ICUT
2.7Ω
ICUT
I1
3
270Ω
NOTE 9
VIO
NOTE 10
3
+
7
DC
VTVM
5
3µF
+
5
-
7 +
+
I5
I3
I7
3µF
VEE
VEE
NOTES:
9. Adjust R1 for VOUT = 0V ±0.1V.
NOTE: Power Dissipation = I3 V EE + ( I 6 + I 8 )V CC .
10. Record Input Offset Voltage.
FIGURE 1. INPUT OFFSET VOLTAGE TEST CIRCUIT FOR
CA3028B
FIGURE 2. INPUT OFFSET CURRENT, INPUT BIAS CURRENT,
POWER DISSIPATION, AND QUIESCENT
OPERATING CURRENT TEST CIRCUIT FOR
CA3028A AND CA3028B
7-9
CA3028A, CA3028B, CA3053
Test Circuits
(Continued)
VCC
I7
1kΩ
I8
7
8
I1
1kΩ
5
1
6
CA3053
VCC
1
2kΩ
ICUT
5
6
I5
7
I6
3
2kΩ
3
8
I7
I3
5kΩ
VCC
NOTE: Power Dissipation = VCCI3.
FIGURE 3. INPUT BIAS CURRENT, POWER DISSIPATION AND
QUIESCENT OPERATING CURRENT TEST CIRCUIT
FOR CA3053
FIGURE 4. AGC BIAS CURRENT TEST CIRCUIT (DIFFERENTIAL
AMPLIFIER CONFIGURATION) FOR CA3028A AND
CA3028B
VCC
VCC
7
1kΩ
470pF
L2
8
2
ICUT
1
4
0.001µF
0.001µF
C1
(pF)
C2
8
L1
50Ω SIGNAL
SOURCE
(NOTE 11) OR
NOISE DIODE
(NOTE 12)
1
6
3
C2
(pF)
10.7
20 - 60 20 - 60
100
3 - 30
1kΩ
2kΩ
6
3
50Ω SIGNAL
SOURCE
(NOTE 14) OR
NOISE DIODE
(NOTE 15)
5
0.001µF
C1
(pF)
L2
(µH)
f
(MHz)
3-5
3-5
10.7
30 - 60 20 - 50
100
2 - 15
C2
(pF)
2 - 15
NOTES:
NOTES:
11. For Power Gain Test.
14. For Power Gain Test.
12. For Noise Figure Test.
15. For Noise Figure Test.
13. 10.7MHz Power Gain Test Only.
16. 10.7MHz Power Gain Test Only.
FIGURE 5. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(CASCODE CONFIGURATION) FOR CA3028A,
CA3028B AND CA3053 (NOTE 3)
50Ω RF
VOLTMETER
(NOTE 14 OR
NOISE AMP
(NOTE 15)
2kΩ
L1
(µH)
3 - 30 0.1 - 0.25 0.15 - 0.3
C2
ICUT
L1
50Ω RF
VOLTMETER
(NOTE 11) OR
NOISE AMP
(NOTE 12)
L2
7
C1
5
C1
f
(MHz)
0.001
µF
L1
(µH)
L2
(µH)
3-6
3-6
0.2 - 0.5
0.2 - 0.5
FIGURE 6. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(DIFFERENTIAL AMPLIFIER CONFIGURATION
AND TERMINAL 7 CONNECTED TO VCC) FOR
CA3028A, CA3028B AND CA3053 (NOTE 3)
7-10
CA3028A, CA3028B, CA3053
Test Circuits
(Continued)
5kΩ
VCC
1kΩ
7
L2
8
C1
1
6
C2
ICUT
L1
3
50Ω SIGNAL
SOURCE
(NOTE 17) OR
NOISE DIODE
(NOTE 18)
5
50Ω RF
VOLTMETER
(NOTE 17) OR
NOISE AMP
(NOTE 18)
VCC
0.001µF
2kΩ
VCC
1kΩ
f
(MHz)
C1
(pF)
C2
(pF)
L1
(µH)
10.7
30 - 60 20 - 50
100
2 - 15
2 - 15
L2
(µH)
7
5
0.01
µF
3-6
3-6
0.2 - 0.5
0.2 - 0.5
2kΩ
8
50Ω
ICUT
1
6
0.01
µF
3
INPUT
0.01µF
50Ω
NOTES:
OUTPUT
17. For Power Gain Test.
0.01µF
18. For Noise Figure Test.
FIGURE 7. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
FOR CA3028A AND CA3028B
FIGURE 8. OUTPUT POWER TEST CIRCUIT FOR CA3028A
AND CA3028B
5kΩ
VCC
1kΩ
7
10Ω
L2
8
C1
C2
1
50Ω
SIGNAL
SOURCE
VCC
6
L1
1kΩ LOAD
50Ω RF
VOLTMETER
ICUT
3
8
5
7
OUTPUT
6
1
0.001µF
2kΩ
INPUT
2
50Ω
f
(MHz)
C1
(pF)
C2
(pF)
10.7
30 - 60 20 - 50
100
2 - 15
2 - 15
L1
(µH)
0.01µF
1kΩ
3
L2
(µH)
3-6
3-6
0.2 - 0.5
0.2 - 0.5
5
ICUT
4
0.01µF
0.01µF
2kΩ
0.01µF
FIGURE 9. AGC RANGE TEST CIRCUIT (DIFFERENTIAL
AMPLIFIER) FOR CA3028A AND CA3028B
FIGURE 10. TRANSFER CHARACTERISTIC (VOLTAGE GAIN) TEST
CIRCUIT (10.7MHz) CASCODE CONFIGURATION FOR
CA3028A, CA3028B AND CA3053
7-11
CA3028A, CA3028B, CA3053
Test Circuits
(Continued)
VCC
VCC
3µF
OSCILLOSCOPE
WITH HIGH
GAIN DIFF. INPUT
(TEKTRONIX TYPE
530, 540, OR 580
VDIFF
WITH TYPE D
(RMS)
PLUG-IN
TEKTRONIX
TYPE 502 OR
EQUIVALENT)
R
(NOTE)
R
(NOTE)
10Ω
6
1kΩ LOAD
5µF
7
INPUT
8
1
8
0.01µF
50Ω
OUTPUT
ICUT
VIN = 10mV
(RMS)
6
1
3
50Ω
INPUT
SIGNAL
f = 1kHz
5
ICUT
1kΩ
3
7
5
3µF
0.01µF
10µH
2kΩ
VEE
0.001µF
NOTE: For R = 1.6kΩ: VCC = 12V, VEE = -12V
For R = 2.0kΩ: VCC = 6V, VEE = -6V.
FIGURE 12. DIFFERENTIAL VOLTAGE GAIN, MAXIMUM PEAKTO-PEAK OUTPUT VOLTAGE AND BANDWIDTH
TEST CIRCUIT FOR CA3028B
FIGURE 11. TRANSFER CHARACTERISTIC (VOLTAGE GAIN)
TEST CIRCUIT (10.7MHz) DIFFERENTIAL
AMPLIFIER CONFIGURATION FOR CA3028A,
CA3028B AND CA3053
VCC
3µF
OSCILLOSCOPE
WITH HIGH
GAIN DIFF. INPUT
(TEKTRONIX TYPE
530, 540, OR 580
VDIFF
WITH TYPE D
(RMS)
PLUG-IN
TEKTRONIX
TYPE 502 OR
8
EQUIVALENT)
1kΩ
1kΩ
6
5µF
1
500Ω
INPUT
SIGNAL
f = 1kHz
5
ICUT
S1
7
3
VIN = 0.3V
(RMS)
3µF
VEE
VX RANGE
OF COMMON
MODE REJECTION
NOTES:
19. For CMR test: S1 to GND.
20. For Input Common Mode Voltage Range Test: S1 to VX.
( A ) ( 2 ) ( 0.3 )
21. Common Mode Rejection Ratio = 20log 10 ------------------------------------V DIFF ( RMS )
A = Single-Ended Voltage Gain.
FIGURE 13. COMMON MODE REJECTION RATIO AND COMMON MODE INPUT VOLTAGE RANGE TEST CIRCUIT FOR CA3028B
7-12
CA3028A, CA3028B, CA3053
Typical Performance Curves
OFFSET CURRENT
2.0
VCC = +12V
VEE = -12V
1.5
VCC = +6V
VEE = -6V
1.0
62.5
50.0
VCC = +12V
VEE = -12V
37.5
25.0
VCC = +6V
VEE = -6V
12.5
0.5
0
-75
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
0
-75
125
FIGURE 14. INPUT OFFSET VOLTAGE AND INPUT OFFSET
CURRENT FOR CA3028B vs TEMPERATURE
QUIESCENT OPERATING CURRENT (mA)
75.0
62.5
50.0
VCC = +12V
37.5
VCC = +9V
25.0
12.5
0
-75
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
-25
0
25
50
75
TEMPERATURE (oC)
100
125
DIFFERENTIAL AMPLIFIER CONFIGURATION
3.5
VEE = -12V
2.5
VEE = -9V
1.5
-75
125
FIGURE 16. INPUT BIAS CURRENT vs TEMPERATURE FOR
CA3053
-50
FIGURE 15. INPUT BIAS CURRENT vs TEMPERATURE FOR
CA3028A AND CA3028B
POSITIVE DC SUPPLY VOLTS (VCC )
INPUT BIAS CURRENT (µA)
POSITIVE DC SUPPLY VOLTS (VCC)
NEGATIVE DC SUPPLY VOLTS (VEE)
75.0
INPUT BIAS CURRENT (µA)
INPUT OFFSET VOLTAGE (mV),
INPUT OFFSET CURRENT (µA)
POSITIVE DC SUPPLY VOLTS (VCC)
NEGATIVE DC SUPPLY VOLTS (VEE)
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
125
FIGURE 17. QUIESCENT OPERATING CURRENT vs
TEMPERATURE FOR CA3028A AND CA3028B
3.5
VCC = +12V
3.5
2.5
1.5
-75
OPERATING CURRENT, I6 OR I8 (mA)
QUIESCENT OPERATING CURRENT (mA)
DIFFERENTIAL AMPLIFIER CONFIGURATION
VCC = +9V
VCC = 6V
3.0
2.5
2.0
1.5
1.0
0.5
0
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
FIGURE 18. QUIESCENT OPERATING CURRENT vs
TEMPERATURE FOR CA3053
125
0
-5
-10
-15
DC EMITTER SUPPLY (V)
-20
FIGURE 19. OPERATING CURRENT vs VEE VOLTAGE FOR
CA3028A AND CA3028B
7-13
CA3028A, CA3028B, CA3053
(Continued)
TOTAL POWER DISSIPATION, ±12V (mW)
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC
AGC BIAS CURRENT (mA)
2
1
0
2
0
6
8
4
10
AGC BIAS, TERMINAL NO. 7 (V)
180
170
35
VCC = +6V
VEE = -6V
160
30
150
-50
12
-25
0
25
50
75
100
25
125
TEMPERATURE (oC)
FIGURE 20. AGC BIAS CURRENT vs BIAS VOLTAGE
(TERMINAL 7) FOR CA3028A AND CA3028B
FIGURE 21. POWER DISSIPATION vs TEMPERATURE FOR
CA3028A AND CA3028B
CASCODE CONFIGURATION
TA = 25oC
45
40
VCC = +12V
VEE = -12V
TOTAL POWER DISSIPATION, ±6V (mW)
Typical Performance Curves
CASCODE CONFIGURATION
TA = 25oC, f = 100MHz
40
VCC = +12V
30
9
25
NOISE FIGURE (dB)
POWER GAIN (dB)
35
VCC = +9V
20
15
10
5
0
10
7
6
5
20
30
40
50
FREQUENCY (MHz)
60 70 80 90 100
9
FIGURE 22. POWER GAIN vs FREQUENCY (CASCODE
CONFIGURATION) FOR CA3028A AND CA3028B
40
8
10
11
12
DC COLLECTOR SUPPLY VOLTAGE (V)
FIGURE 23. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
VOLTAGE (CASCODE CONFIGURATION)
FOR CA3028A AND CA3028B
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, f = 100MHz
DIFFERENTIAL
DIFFERENTIAL AMPLIFIER
AMPLIFIER CONFIGURATION
CONFIGURATION
TA = 25oC
VCC = +12V
30
9
25
20
NOISE FIGURE (dB)
POWER GAIN (dB)
35
VCC = +9V
15
10
5
0
10
8
7
6
5
20
30
40
50 60 70 80 90 100
FREQUENCY (MHz)
9
FIGURE 24. POWER GAIN vs FREQUENCY (DIFFERENTIAL
AMPLIFIER CONFIGURATION) FOR CA3028A AND
CA3028B
12
10
11
DC COLLECTOR SUPPLY VOLTAGE (V)
FIGURE 25. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
VOLTAGE (DIFFERENTIAL AMPLIFIER
CONFIGURATION) FOR CA3028A AND CA3028B
7-14
CA3028A, CA3028B, CA3053
(Continued)
CASCODE CONFIGURATION, TA = 25oC
IC(STAGE) = 4.5mA, VCC = +9V
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, VCC = +9V, f = 100MHz
7
INPUT CONDUCTANCE (g11) OR
SUSCEPTANCE (b11) (mS)
NOISE FIGURE (dB) OR POWER GAIN (dB)
Typical Performance Curves
20
POWER GAIN
15
10
NOISE FIGURE
5
5
4
b11
3
2
g11
1
0
0
9
8
7
6
5
4
POSITIVE DC BIAS VOLTAGE (V)
2
3
REVERSE TRANSFER CONDUCTANCE (g12)
OR SUSCEPTANCE (b12) (µS)
IC OF EACH TRANSISTOR = 2.2mA
2
b11
1
g11
0
100
20
15
10
g12
5
0
b12
-5
-10
-15
-20
1
100
10
FREQUENCY (MHz)
FIGURE 28. INPUT ADMITTANCE (Y11) vs FREQUENCY
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
FIGURE 29. REVERSE TRANSADMITTANCE (Y12) vs
FREQUENCY (CASCODE CONFIGURATION)
FORWARD TRANSFER CONDUCTANCE (g21)
OR SUSCEPTANCE (b21) (mS)
10
FREQUENCY (MHz)
CASCODE CONFIGURATION, TA = 25oC
IC(STAGE) = 4.5mA, VCC = +9V
REVERSE TRANSFER CONDUCTANCE (g12)
OR SUSCEPTANCE (b12) (mS)
1
100
FIGURE 27. INPUT ADMITTANCE (Y11) vs FREQUENCY
(CASCODE CONFIGURATION)
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, VCC = +9V
3
10
FREQUENCY (MHz)
1
FIGURE 26. 100MHz NOISE FIGURE AND POWER GAIN vs
BASE-TO-EMITTER BIAS VOLTAGE (TERMINAL 7)
FOR CA3028A AND CA3028B
INPUT CONDUCTANCE (g11) OR
SUSCEPTANCE (b11) (mS)
6
0.3
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, VCC = +9V
IC OF EACH TRANSISTOR = 2.2mA
0.2
g12
0.1
0
b12
-0.1
-0.2
-0.3
10
20
30
40 50 60
80 100
200
100
80
g21
60
40
20
0
-20
b21
-40
-60
-80
1
300
2
3
4 5 6 7 8 910
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 30. REVERSE TRANSADMITTANCE (Y12) vs
FREQUENCY (DIFFERENTIAL AMPLIFIER
CONFIGURATION)
CASCODE CONFIGURATION, TA = 25oC
IC(STAGE) = 4.5mA, VCC = +9V
FIGURE 31. FORWARD TRANSADMITTANCE (Y21) vs
FREQUENCY (CASCODE CONFIGURATION)
7-15
100
CA3028A, CA3028B, CA3053
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, VCC = +9V
IC OF EACH TRANSISTOR = 2.2mA
30
20
b21
10
0
-10
-20
g21
-30
2
b22
1
0
0
-0.02
g22
-0.04
-0.06
-0.08
100
DIFFERENTIAL AMPLIFIER CONFIGURATION,
TA = 25oC
IC OF EACH TRANSISTOR = 2.2mA, VCC = +9V
1.5
b22
1.0
0.3
0.2
0.5
g22
0.1
0
100
0
10
FREQUENCY (MHz)
1
OUTPUT SUSCEPTANCE (b22) (mS)
2
0.4
CASCODE CONFIGURATION
TA = 25oC, f = 10.7MHz
5
OUTPUT VOLTAGE (V)
20
100MHz
0
-20
6
5
4
3
2
100
FIGURE 35. OUTPUT POWER vs FREQUENCY - 50Ω INPUT
AND 50Ω OUTPUT (DIFFERENTIAL AMPLIFIER
CONFIGURATION) FOR CA3028A AND CA3028B
f = 10.7MHz
7
VCC = +9V
10
40
8
VCC = +12V
1
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, VCC = +9V
9
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, CONSTANT POWER INPUT = 2µW
FREQUENCY (MHz)
FIGURE 34. OUTPUT ADMITTANCE (Y22) vs FREQUENCY
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
-40
100
FIGURE 33. OUTPUT ADMITTANCE (Y22) vs FREQUENCY
(CASCODE CONFIGURATION)
10
0.6
0.5
10
FREQUENCY (MHz)
1
OUTPUT POWER (µW)
10
FREQUENCY (MHz)
FIGURE 32. FORWARD TRANSADMITTANCE (Y21) vs
FREQUENCY (DIFFERENTIAL AMPLIFIER
CONFIGURATION)
OUTPUT CONDUCTANCE (g22) (mS)
3
-40
1
POWER GAIN (dB)
CASCODE CONFIGURATION, TA = 25oC
IC(STAGE) = 4.5mA, VCC = +9V
OUTPUT SUSCEPTANCE (b22) (mS)
(Continued)
OUTPUT CONDUCTANCE (g22) (mS)
FORWARD TRANSFER CONDUCTANCE (g21)
OR SUSCEPTANCE (b21) (mS)
Typical Performance Curves
1
VCC = +12V
VCC = +9V
3
2
1
0
0
0
DC BIAS VOLTAGE ON TERMINAL NO. 7 (V)
FIGURE 36. AGC CHARACTERISTICS FOR CA3028A AND
CA3028B
4
0.05
0.1
INPUT VOLTAGE (V)
FIGURE 37. TRANSFER CHARACTERISTICS (CASCODE
CONFIGURATION)
7-16
0.15
CA3028A, CA3028B, CA3053
Typical Performance Curves
(Continued)
3.0
OUTPUT VOLTAGE (V)
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, f = 10.7MHz
2.5
VCC = +12V
2.0
1.5
VCC = +9V
1.0
0.5
0
0.05
0.1
INPUT VOLTAGE (V)
0.15
FIGURE 38. TRANSFER CHARACTERISTICS (DIFFERENTIAL AMPLIFIER CONFIGURATION)
Glossary of Terms
AGC Bias Current
Input Offset Voltage
The current drawn by the device from the AGC voltage
source, at maximum AGC voltage.
The difference in the DC voltages which must be applied to
the input terminals to obtain equal quiescent operating
voltages (zero output offset voltage) at the output terminals.
AGC Range
The total change in voltage gain (from maximum gain to
complete cutoff) which may be achieved by application of the
specified range of dc voltage to the AGC input terminal of
the device.
Common Mode Rejection Ratio
The ratio of the full differential voltage gain to the common
mode voltage gain.
Power Dissipation
Noise Figure
The ratio of the total noise power of the device and a
resistive signal source to the noise power of the signal
source alone, the signal source representing a generator of
zero impedance in series with the source resistance.
Power Gain
The ratio of the signal power developed at the output of the
device to the signal power applied to the input, expressed in
dB.
The total power drain of the device with no signal applied
and no external load current.
Quiescent Operating Current
Input Bias Current
The average (DC) value of the current in either output
terminal.
The average value (one half the sum) of the currents at the
two input terminals when the quiescent operating voltages at
the two output terminals are equal.
Input Offset Current
The difference in the currents at the two input terminals
when the quiescent operating voltages at the two output terminals are equal.
Voltage Gain
The ratio of the change in output voltage at either output
terminal with respect to ground, to a change in input voltage
at either input terminal with respect to ground, with the other
input terminal at AC ground.
7-17
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