CS3524A CS3524A Voltage Mode PWM Control Circuit with 200mA Output Drivers Description Features The CS3524A features an undervoltage lockout circuit which disables all internal circuitry (except the reference) until the input voltage has risen to 8V. This holds standby current low until turnon, and greatly simplifies the design of low power, off-line supplies. The turnon circuit has approximately 600mV of hysteresis for jitter free activation. The CS3524A PWM control circuit retains the same versatile architecture of the industry standard CS3524 (SG3524) while adding substantial improvements. The CS3524 is pin-compatible with “non-A” versions, and in most applications can be directly interchanged. The CS3524A, however, eliminates many of the design restrictions which had previously required additional external circuitry. Other improvements include a PWM latch that insures freedom from multiple pulsing within a period, even in noisy environments; logic to eliminate double pulsing on a single output, a 200ns external shutdown capability, and automatic thermal protection from excessive chip temperature. The oscillator circuit is usable to 500kHz and is easier to synchronize with an external clock pulse. The CS3524A includes a precision 5V reference trimmed to ±1% accuracy (eliminating the need for potentiometer adjustments), an error amplifier with an output voltage swing extending to 5V, and a current sense amplifier useful in either the ground or power supply output lines. The uncommitted 60V, 200mA NPN output pair greatly enhances the output drive capability. ■ Precision Reference Internally Trimmed to ±1% ■ Current Limit ■ Undervoltage Lockout ■ Start-up Supply Current < 4mA ■ Output to 200mA ■ 60V Output Capability ■ Wide Common-mode Input Range for Error and Current Limit Amplifiers ■ PWM Latch Insures Single Pulse per Period ■ Double Pulse Suppression ■ 200ns Shutdown ■ Guaranteed Frequency ■ Thermal Shutdown Block Diagram 5V Reference Regulator V IN SYNC UV Sense RT OSC Power to Internal Circuitry V OUTA T CLOCK V REF + S COMP - COMP V IN S EA EA- 1 16 VREF EA+ 2 15 VIN SYNC 3 14 EB ISENSE+ 4 13 VOUTB ISENSE- 5 12 VOUTA RT 6 11 EA CT 7 10 Gnd 8 9 R V OUTB PWM Latch EB - EA- 16 Lead PDIP & SO Wide Flip Flop CT RAMP Package Options EA + EA+ 1kΩ SHUTDOWN 200mV V IN 10kΩ I SENSE + Gnd CL SHUTDOWN COMP I SENSE - Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: [email protected] Web Site: www.cherry-semi.com Rev. 10/28/96 1 A ® Company CS3524A Absolute Maximum Ratings Supply Voltage (VIN) .................................................................................................................................................................40V Collector Supply Voltage (VCC) ...............................................................................................................................................60V Output Current (Each Output)...........................................................................................................................................200mA Reference Output Current.....................................................................................................................................................50mA Oscillator Charging Current ..................................................................................................................................................5mA Power Dissipation at TA=25˚C.........................................................................................................................................1000mW Power Dissipation at TJ=+25˚C........................................................................................................................................2000mW Derate for Case Temperature above +25˚C........................................................................................................16mW/˚C Storage Temperature Range ................................................................................................................................-65˚C to +150˚C Lead Temperature Soldering: Wave Solder (through hole styles only)..........................................10 sec. max, 260°C peak Reflow (SMD styles only) ......................................................................................60 sec. max above 183°C, 230°C peak Electrical Characteristics: 0˚C ≤ TA ≤ +70˚C for the CS3524A; VIN = VCC = 20V; unless otherwise stated. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ■ Turn-on Characteristics Input Voltage Operating range after Turn-on Turn-on Threshold 8 5.5 40 V 7.5 8.5 V mA Turn-on Current VIN Turn-on - 100mV 2.5 4.0 Operating Current VIN = 8 to 40V 5 10 Turn-on Hysteresis* 0.6 mA V ■ Reference Section Output Voltage TA = 25˚C 5.00 5.20 V Line Regulation VIN = 10 to 40V 4.90 10 30 mV Load Regulation IL = 0 to 20mA 20 50 mA Temperature Stability* Over Operating Range 20 50 mV Short Circuit Current VREF = 0, TA = 25˚C 80 100 mA Output Noise Voltage* 10Hz ≤ f ≤ 10kHz, TA = 25˚C 40 Long Term Stability* TA = 125˚C; 1000 Hrs. 20 µVrms 50 mV ■ Oscillator Section (Unless otherwise specified, RT = 2700Ω, CT = 0.01µF) Initial Accuracy TA = 25˚C Temperature Stability* Over Operating Temperature Range 39 Minimum Frequency RT = 150kΩ, CT = 0.1µF 43 47 kHz 1 2 % 120 Hz Maximum Frequency RT = 2.0kΩ, CT = 470pF Output Amplitude* TA = 25˚C 500 3.5 kHz V Output Pulse Width* TA = 25˚C 0.5 µs Ramp Peak 3.3 3.5 3.7 V Ramp Valley 0.7 0.9 1.0 V Input Offset Voltage 2 10 mV Input Bias Current 1 10 µA Input Offset Current 0.5 1.0 µA ■ Error Amplifier Section (Unless otherwise specified, VCM = 2.5V) Common Mode Rejection Ratio VCM = 1.5 to 5.5V 60 75 dB Power Supply Rejection Ratio VIN = 10 to 40V 50 60 dB Output Swing 0.5 Minimum Total Range * These parameters are guaranteed by design but not 100% tested in production. 2 5.0 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ■ Error Amplifier Section (Unless otherwise specified, VCM = 2.5V): continued Open Loop Voltage Gain ∆VOUT = 1 to 4V, RL ≥ 10 MΩ Gain-Bandwidth* TA = 25˚C, AV = 0dB 60 80 dB 3 MHz ■ Current Limit Amplifier (Unless otherwise specified, VSENSE = VO) Input Offset Voltage TA = 25˚C, EA Set for Max. Output 180 Input Offset Voltage Over Operating Temperature Range 170 200 Input Bias Current -1 Common Mode Rejection Ratio VSENSE = 0 to 15V 50 60 60 Power Supply Rejection Ratio VIN = 10 to 40V 50 Output Swing Minimum Total Range 0.5 Open Loop Voltage Gain ∆VOUT = 1 to 4V, RL ≥ 10MΩ 70 Delay Time* ∆VIN = 300mV 220 mV 230 mV -10 µA dB dB 5.0 V 80 dB 300 ns ■ Output Section (Each Output) Collector Emitter Voltage IC = 100µA Collector Leakage Current VCE = 50V 0.1 20.0 µA Saturation IC = 20mA IC = 200mA 0.2 1.0 0.4 2.2 V V 60 80 17 V Emitter Output Voltage IE = 50mA 18 V Rise Time* TA = 25˚C, R = 2kΩ 200 ns Fall Time* TA = 25˚C, R = 2kΩ 100 ns Comparator Delay* TA = 25˚C, VCOMP to VOUT 300 ns Shutdown Delay* TA = 25˚C, VSHUT to VOUT 200 ns Shutdown Threshold TA = 25˚C, RC = 2kΩ 0.5 0.7 Thermal Shutdown* 1.0 V 165 ˚C * These parameters are guaranteed by design but not 100% tested in production. Typical Performance Characteristics Duty Cycle vs. Input Voltage Error Amplifier Voltage Gain vs. Frequency Over RF 50 20 0 RF = 30kΩ RF is impedance to ground. Values below 30kΩ will begin to limit the maximum duty-cycle. F µF 30 1 40 VIN = 20V RT = 2700Ω TA = 25˚C = RF = 100kΩ 40 =1 0µ 60 RF = 300kΩ CT VIN = 20V TA = 25˚C RF = 1MΩ CT OPEN VOLTAGE GAIN (dB) 80 DUTY-CYCLE (ONE OUTPUT) - % RF = ∞ 20 Note: Duty-Cycle is percent of two clock periods that one output conducts 10 0 100 1k 10k 100k 0 1M 1 2 3 INPUT VOLTAGE VIN FREQUENCY (Hz) 3 4 5 CS3524A Electrical Characteristics: continued Quiescent Supply Current vs. Supply Voltage Over Temperature Shutdown Delay From PWM Comparator 10 7 TA = -55°C TA = 25°C 6 TA = 125°C OUTPUT (V) 8 20 10 0 4 5 4 3 2 1 0 2 Note: Outputs off. RT = ∞ 1 VIN = 20V RL = 2kΩ TA = 25˚C 5 5 3 OUTPUT at VOA or VOB 15 INTPUT (V) QUIESCENT CURRENT (mA) 9 INPUT at VOB Note: Minimum input pulse width to latch is 200ns 0 0 10 20 30 40 50 0 SUPPLY VOLTAGE VIN (V) 2 3 Output Dead Time vs. Timing Capacitor Value 1M 10 VIN = 20V TA = 25˚C CT 100k CT CT 10k CT CT 1k =1 OUTPUT DEAD TIME (µs) OSCILLATOR FREQUENCY (Hz) 1 DELAY TIME (µs) Oscillator Frequency vs. Timing Components Resistor Over Timing Capacitance .0n f =3 .0n f =1 0nf =3 0nf =1 00n f 100 2 1 5.0 VIN = 20V RT = 2700Ω TA = 25˚C 2.0 1.0 0.5 0.2 f≈ 1.15 RTCT 5 10 20 0.1 100 50 TIMING RESISTOR - RT (kΩ) Note: Dead time = osc output pulse width plus output delay 1 2 5 10 20 50 100 TIMING CAPACITOR - CT (nf) Current Limit Amplifier Delay Turn-Off Delay From Shutdown OUTPUT (V) 6 5 4 3 2 1 0 Overdrive 5% 10% 20% 50% 20 VIN = 20V RL = 2kΩ TA = 25˚C 15 10 OUTPUT at VOA OR VOB 5 0 1.0 INTPUT (V) OUTPUT (V) OUTPUT at COMP INTPUT (V) CS3524A Typical Performance Characteristics continued INPUT at ISENSE+ 0.2 INPUT at SHUTDOWN 0.5 VIN 20V TA 25˚C EA+ = VREF ISENSE– = Gnd 0.1 0.0 0 1 2 3 0.0 4 Note: Minimum input pulse width to latch is 200ns 0 DELAY TIME (µs) 1 2 DELAY TIME (µs) 4 3 CS3524A Typical Performance Characteristics continued Output Saturation Voltage vs. Output Current Over Temperature 5 VCE SAT (V) 4 3 TA = 125˚C 2 TA = 25˚C 1 TA = –55˚C 0 50 0 100 150 200 250 OUTPUT COLLECTOR CURRENT (mA) Open Loop Test Circuit V CC 2kΩ 1W IS VIN 2kΩ 1W VOUTA VOUTB EA Gnd SHUTDOWN ISENSE- COMP EA– EA+ CT RT VREF ISENSE+ CS3524A SYNC EB 100kΩ 100kΩ SHUTDOWN 2kΩ 0.1 RT CT 2kΩ 10kΩ 10kΩ 0.1 1kΩ Note: The CS3524A should be able to be tested in any 3524 test circuit with two possible exceptions: 1. The higher gain-bandwidth of the current limit amplifier in the CS 3524A may cause oscillations in an uncompensated 3524 test circuit. 2. The effect of the shutdown, cannot be seen at the compensation terminal, but must be observed at the outputs. 5 CS3524A Package Specification PACKAGE THERMAL DATA PACKAGE DIMENSIONS IN mm (INCHES) D Lead Count Metric Max 19.69 10.50 16 Lead PDIP 16L SO Wide Min 18.67 10.10 Thermal Data English Max .775 .413 Min .735 .398 16 Lead PDIP 16L SO Wide RΘJC typ 42 23 ˚C/W RΘJA typ 80 105 ˚C/W Plastic DIP (N); 300 mil wide 7.11 (.280) 6.10 (.240) 8.26 (.325) 7.62 (.300) 1.77 (.070) 1.14 (.045) 2.54 (.100) BSC 3.68 (.145) 2.92 (.115) .356 (.014) .203 (.008) 0.39 (.015) MIN. .558 (.022) .356 (.014) REF: JEDEC MS-001 Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same. D Surface Mount Wide Body (DW); 300 mil wide 7.60 (.299) 7.40 (.291) 10.65 (.419) 10.00 (.394) 0.51 (.020) 0.33 (.013) 1.27 (.050) BSC 2.49 (.098) 2.24 (.088) 1.27 (.050) 0.40 (.016) 2.65 (.104) 2.35 (.093) 0.32 (.013) 0.23 (.009) D REF: JEDEC MS-013 0.30 (.012) 0.10 (.004) Ordering Information Part Number CS3524AGN16 CS3524AGDW16 CS3524AGDWR16 Rev. 10/28/96 Description 16 Lead PDIP 16 Lead SO Wide 16 Lead SO Wide (tape & reel) Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information. 6 © 1999 Cherry Semiconductor Corporation