PD - 91810
IRFIB7N50A
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply ( SMPS )
l Uninterruptable Power Supply
l High speed power switching
l High Voltage Isolation = 2.5KVRMS
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss specified ( See AN 1001)
VDSS
500V
Rds(on) max
ID
0.52Ω
6.6A
l
TO-220 FULLPAK
GDS
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
Max.
6.6
4.2
44
60
0.48
± 30
6.9
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Applicable Off Line SMPS Topologies:
l
l
l
Two Transistor Forward
Half & Full Bridge Convertors
Power Factor Correction Boost
Notes through are on page 8
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1
6/15/99
IRFIB7N50A
Static @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
V(BR)DSS
∆V(BR)DSS/∆TJ
Min. Typ. Max. Units
Conditions
500 ––– –––
V
VGS = 0V, ID = 250µA
––– 0.61 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.52
Ω
VGS = 10V, ID = 4.0A
2.0
––– 4.0
V
VDS = VGS, ID = 250µA
––– ––– 25
VDS = 500V, VGS = 0V
µA
––– ––– 250
VDS = 400V, VGS = 0V, T J = 125°C
––– ––– 100
VGS = 30V
nA
––– ––– -100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
6.1
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
14
35
32
28
1423
208
8.1
2000
55
97
Max. Units
Conditions
–––
S
VDS = 50V, ID = 6.6A
52
ID = 11A
13
nC
VDS = 400V
18
VGS = 10V, See Fig. 6 and 13
–––
VDD = 250V
–––
ID = 11A
ns
–––
RG = 9.1Ω
–––
R D = 22Ω,See Fig. 10
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 400V
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
275
11
6.0
mJ
A
mJ
Typ.
Max.
Units
–––
–––
2.1
65
°C/W
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 6.6
showing the
A
G
integral reverse
44
––– –––
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 11A, VGS = 0V
––– 510 770
ns
TJ = 25°C, IF = 11A
––– 3.4 5.1
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFIB7N50A
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
10
1
10
4.5V 20µs PULSE WIDTH
0.1
0.1
1
10
1
1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.0
10
TJ = 150 ° C
TJ = 25 ° C
1
V DS = 100V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
Fig 3. Typical Transfer Characteristics
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100
Fig 2. Typical Output Characteristics
100
VGS , Gate-to-Source Voltage (V)
10
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
0.1
4.0
20µs PULSE WIDTH
TJ = 150 °C
4.5V
TJ = 25 °C
9.0
ID = 11A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFIB7N50A
V GS
C is s
C rss
C oss
2000
=
=
=
=
20
0V,
f = 1M Hz
C g s + C g d , Cd s S H O R T E D
C gd
C ds + C gd
VGS , Gate-to-Source Voltage (V)
2400
C , C a pa c itan c e (p F )
C is s
1600
C oss
1200
800
C rs s
400
0
10
100
VDS = 400V
VDS = 250V
VDS = 100V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
1
ID = 11A
6.6A
0
1000
10
20
30
40
50
Q G , Total Gate Charge (nC)
V D S , D rain-to-S ource V oltage (V )
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
1000
100
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
10
TJ = 150 ° C
1
TJ = 25 ° C
0.1
0.0
0.8
1.2
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10
100us
1ms
1
V GS = 0 V
0.4
10us
1.6
0.1
10ms
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFIB7N50A
7.0
RD
VDS
VGS
6.0
D.U.T.
I D , Drain Current (A)
RG
+
-VDD
5.0
10V
4.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
3.0
Fig 10a. Switching Time Test Circuit
2.0
VDS
1.0
90%
0.0
25
50
75
100
TC , Case Temperature
125
150
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
P DM
0.05
0.1
t1
0.02
t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFIB7N50A
600
D R IV E R
L
VDS
D .U .T
RG
+
V
- DD
IA S
20V
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
TOP
500
BOTTOM
ID
4.9A
7.0A
11A
400
300
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
IAS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
660
QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V D S a v , Avalanche V oltage (V)
QGS
640
620
600
.3µF
D.U.T.
+
V
- DS
A
1.0
2.0
3.0
4.0
5.0
6.0
7.0
I av , A valanche C urrent (A )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
580
0.0
VGS
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
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IRFIB7N50A
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFIB7N50A
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10 .6 0 (.41 7)
10 .4 0 (.40 9)
ø
3.40 ( .1 33 )
3.10 ( .1 23 )
4.8 0 (.1 89)
4.6 0 (.1 81)
-A 3.70 ( .145 )
3.20 ( .126 )
1 6.00 (.630)
1 5.80 (.622)
2 .80 ( .110)
2 .60 ( .102)
LE A D A S S IG N M E N T S
1 - GA TE
2 - D R A IN
3 - SO UR CE
7.10 ( .280 )
6.70 ( .263 )
1.1 5 (.04 5)
M IN .
NOT ES :
1 D IM E N S IO N IN G & T O LE R A N C IN G
P E R A N S I Y 14 .5M , 19 82
1
2
3
2 C O N T R O LLIN G D IM E N S IO N : IN C H .
3.3 0 (.130 )
3.1 0 (.122 )
-B -
1 3.70 (.540)
1 3.50 (.530)
C
A
3X
1.4 0 (.05 5)
1.0 5 (.04 2)
3X
0.9 0 (.035 )
0.7 0 (.028 )
0.25 (. 010)
3X
M
A M
B
2.54 (.100 )
2X
0.4 8 (.019 )
0.4 4 (.017 )
2.85 ( .112 )
2.65 ( .104 )
D
B
M IN IM U M C R E E P A G E
D IS T A N C E B E T W E E N
A - B - C -D = 4.80 (.1 89)
Part Marking Information
TO-220 Fullpak
E X A M P L E : T H IS IS A N IR F I8 4 0 G
W IT H A S S E M B L Y
LOT CODE E401
A
IN T E R N A T IO N A L
R E C T IF IE R
LO GO
PART NUMBER
IR F I8 4 0 G
E 401 9245
ASSEMBLY
LO T CO DE
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 4.5mH
RG = 25Ω, I AS = 11A. (See Figure 12)
ISD ≤ 11A, di/dt ≤140A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
DA TE CO D E
(Y YW W )
YY = YE A R
W W = W EEK
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Uses IRFB11N50A data and test conditions
t=60s,f=60Hz
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http://www.irf.com/
Data and specifications subject to change without notice.
6/99
8
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