STMicroelectronics M27C801 8 mbit (1mb x 8) uv eprom and otp eprom Datasheet

M27C801
8 Mbit (1Mb x 8) UV EPROM and OTP EPROM
Features
■
5 V ± 10% supply voltage in Read operation
■
Access time: 55 ns
■
low Power Consumption:
– Active current: 35 mA at 5 MHz
– Standby current: 100 µA
■
Programming voltage: 12.75 V ± 0.25 V
■
Programming time: 50 µs/word
■
Electronic signature
– Manufacturer code: 20h
– Device code: 42h
■
ECOPACK® packages available
32
1
FDIP32W (F)
32
1
PDIP32 (B)
PLCC32 (K)
September 2007
Rev 6
1/24
www.st.com
1
Contents
M27C801
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6
Presto IIB programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.7
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8
Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.9
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.10
Erasure operation (applies to UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 11
3
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4
DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1
32-pin ceramic frit-seal DIP, with round window (FDIP32WA) . . . . . . . . . 19
5.2
32-pin plastic DIP, 600 mils width (PDIP32) . . . . . . . . . . . . . . . . . . . . . . . 20
5.3
32-lead rectangular plastic leaded chip carrier (PLCC32) . . . . . . . . . . . . 21
6
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/24
M27C801
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Read mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Programming mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Read mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Margin mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Programming mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
FDIP32WA package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PDIP32 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
PLCC32 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3/24
List of figures
M27C801
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
4/24
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PLCC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Programming flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
AC testing input output waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
AC testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Read mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Margin mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Programming and verify modes AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
FDIP32WA package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PDIP32 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
PLCC32 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
M27C801
1
Description
Description
The M27C801 is an 8 Mbit EPROM offered in the two ranges UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited for applications where fast turn-around
and pattern experimentation are important requirements and is organized as 1,048,576 by 8
bits.
The FDIP32W (window ceramic frit-seal package) has transparent lid which allows the user
to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be
written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C801 is offered in PDIP32 and PLCC32 packages.
In order to meet environmental requirements, ST offers the M27C801 in ECOPACK®
packages. ECOPACK packages are Lead-free. The category of second-level interconnect is
marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK® specifications are available at: www.st.com.
See Figure 1: Logic diagram and Table 1: Signal descriptions for a brief overview of the
signals connected to this device.
Figure 1.
Logic diagram
VCC
20
8
A0-A19
E
Q0-Q7
M27C801
GVPP
VSS
AI01267
5/24
Description
M27C801
Table 1.
Signal descriptions
Signal
Description
A0-A19
Address inputs
Q0-Q7
Data outputs
E
Chip Enable
GVPP
Output enable / program supply
VCC
Supply voltage
VSS
Ground
Figure 2.
DIP connections
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
M27C801
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
AI01268
6/24
VCC
A18
A17
A14
A13
A8
A9
A11
GVPP
A10
E
Q7
Q6
Q5
Q4
Q3
M27C801
Description
A12
A15
A16
A19
VCC
A18
A17
PLCC connections
1 32
M27C801
9
25
A14
A13
A8
A9
A11
GVPP
A10
E
Q7
17
VSS
Q3
Q4
Q5
Q6
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
Figure 3.
AI01814
7/24
Device description
2
M27C801
Device description
The operating modes of the M27C801 are listed in the Operating Modes table. A single
power supply is required in Read mode. All inputs are TTL levels except for GVPP and 12V
on A9 for Electronic Signature and Margin Mode Set or Reset.
Table 2.
Operating modes (1)
Mode
E
GVpp
A9
Q7-Q0
Read
VIL
VIL
X
Data Out
Output Disable
VIL
VIH
X
Hi-Z
VIL Pulse
VPP
X
Data In
Program Inhibit
VIH
VPP
X
Hi-Z
Standby
VIH
X
X
Hi-Z
Electronic signature
VIL
VIL
VID
Codes
Program
1. X = VIH or VIL, VID = 12 V ± 0.5 V.
2.1
Read mode
The M27C801 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E) is the power control and should be used for
device selection. Output Enable (G) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is
available at the output after a delay of tGLQV from the falling edge of G, assuming that E has
been low and the addresses have been stable for at least tAVQV-tGLQV.
2.2
Standby mode
The M27C801 has a standby mode which reduces the supply current from 35mA to 100µA.
The M27C801 is placed in the standby mode by applying a CMOS high signal to the E input.
When in the standby mode, the outputs are in a high impedance state, independent of the
GVPP input.
2.3
Two-line output control
Because EPROMs are usually used in larger memory arrays, the product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
●
the lowest possible memory power dissipation,
●
complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while G should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This
8/24
M27C801
Device description
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
2.4
System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, ICC, has three segments that are of interest to
the system designer: the standby current level, the active current level, and transient current
peaks that are produced by the falling and rising edges of E. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device at the
output. The associated transient voltage peaks can be suppressed by complying with the
two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor be used on every device between VCC and VSS. This should
be a high frequency capacitor of low inherent inductance and should be placed as close to
the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used
between VCC and VSS for every eight devices. The bulk capacitor should be located near the
power supply connection point. The purpose of the bulk capacitor is to overcome the voltage
drop caused by the inductive effects of PCB traces.
2.5
Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27C801 are in the
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.
Although only '0' will be programmed, both '1's and '0's can be present in the data word. The
only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The
M27C801 is in the programming mode when VPP input is at 12.75V and E is pulsed to VIL.
The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels
required for the address and data inputs are TTL. VCC is specified to be 6.25V ± 0.25V.
2.6
Presto IIB programming algorithm
Presto IIB Programming Algorithm allows the whole array to be programmed with a
guaranteed margin, in a typical time of 52.5 seconds. This can be achieved with
STMicroelectronics M27C801 due to several design innovations to improve programming
efficiency and to provide adequate margin for reliability. Before starting the programming the
internal Margin Mode circuit is set in order to guarantee that each cell is programmed with
enough margin. Then a sequence of 50 µs program pulses are applied to each byte until a
correct Verify occurs (see Figure 4). No overprogram pulses are applied since the Verify in
Margin Mode provides the necessary margin.
9/24
Device description
Figure 4.
M27C801
Programming flowchart
VCC = 6.25V, VPP = 12.75V
SET MARGIN MODE
n=0
E = 50µs Pulse
NO
++n
= 25
YES
FAIL
NO
++ Addr
VERIFY
YES
Last
Addr
NO
YES
RESET MARGIN MODE
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
AI01271B
2.7
Program Inhibit
Programming of multiple M27C801s in parallel with different data is also easily
accomplished. Except for E, all like inputs including GVPP of the parallel M27C801 may be
common. A TTL low level pulse applied to a M27C801's E input, with VPP at 12.75V, will
program that M27C801. A high level E input inhibits the other M27C801s from being
programmed.
2.8
Program Verify
A Verify (Read) should be performed on the programmed bits to determine that they were
correctly programmed. The Verify is accomplished with G at VIL. Data should be verified
with tELQV after the falling edge of E.
2.9
Electronic Signature
The Electronic Signature (ES) mode allows the reading out of a binary code from an
EPROM that will identify its manufacturer and type. This mode is intended for use by
programming equipment to automatically match the device to be programmed with its
corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C
ambient temperature range that is required when programming the M27C801. To activate
10/24
M27C801
Device description
the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of
the M27C801. Two identifier bytes may then be sequenced from the device outputs by
toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during
Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1
(A0 = VIH) the device identifier code. For the STMicroelectronics M27C801, these two
identifier bytes are given in Table 3 and can be read-out on outputs Q7 to Q0.
Table 3.
Electronic signature
Identifier
2.10
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Hex Data
Manufacturer code
VIL
0
0
1
0
0
0
0
0
20h
Device code
VIH
0
1
0
0
0
0
1
0
42h
Erasure operation (applies to UV EPROM)
The erasure characteristics of the M27C801 is such that erasure begins when the cells are
exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted
that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å
range. Research shows that constant exposure to room level fluorescent lighting could
erase a typical M27C801 in about 3 years, while it would take approximately 1 week to
cause erasure when exposed to direct sunlight. If the M27C801 is to be exposed to these
types of lighting conditions for extended periods of time, it is suggested that opaque labels
be put over the M27C801 window to prevent unintentional erasure. The recommended
erasure procedure for the M27C801 is exposure to short wave ultraviolet light which has
wavelength 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for erasure
should be a minimum of 30 W-sec/cm2. The erasure time with this dosage is approximately
30 to 40 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M27C801
should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps
have a filter on their tubes which should be removed before erasure.
11/24
Maximum ratings
3
M27C801
Maximum ratings
Stressing the device outside the ratings listed in Table 4 may cause permanent damage to
the device. These are stress ratings only, and operation of the device at these, or any other
conditions outside those indicated in the Operating sections of this specification, is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability. Refer also to the STMicroelectronics SURE Program and other relevant
quality documents.
Table 4.
Absolute maximum ratings
Symbol
TA
Parameter
Ambient operating temperature
(1)
Value
Unit
–40 to 125
°C
TBIAS
Temperature under bias
–50 to 125
°C
TSTG
Storage temperature
–65 to 150
°C
Input or output voltage (except A9)
–2 to 7
V
Supply voltage
–2 to 7
V
–2 to 13.5
V
–2 to 14
V
VIO
(2)
VCC
VA9 (2)
VPP
A9 voltage
Program supply voltage
1. Depends on range.
2. Minimum DC voltage on Input or Output is –0.5 V with possible undershoot to –2.0 V for a period less than
20 ns. Maximum DC voltage on Output is VCC +0.5 V with possible overshoot to VCC +2 V for a period less
than 20 ns.
12/24
M27C801
4
DC and AC characteristics
DC and AC characteristics
This section summarizes the operating and measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristic tables that
follow are derived from tests performed under the measurement conditions summarized in
the relevant tables. Designers should check that the operating conditions in their circuit
match the measurement conditions when relying on the quoted parameters.
Table 5.
AC measurement conditions
Parameter
High Speed
Standard
Input rise and fall times
≤10ns
≤20ns (10% to 90%)
Input pulse voltages
0 to 3V
0.4 to 2.4V
1.5V
0.8 and 2V
Input and output timing ref. voltages
Figure 5.
AC testing input output waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
2.0V
0.8V
AI01822
13/24
DC and AC characteristics
Figure 6.
M27C801
AC testing load circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
OUT
CL
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
Capacitance(1) (2)
Table 6.
Symbol
CIN
COUT
AI01823B
Parameter
Test condition
Input capacitance
Output capacitance
Min.
Max.
Unit
VIN = 0 V
6
pF
VOUT = 0 V
12
pF
1. TA = 25 °C, f = 1 MHz.
2. Sampled only, not 100% tested.
Table 7.
Symbol
Read mode DC characteristics(1) (2)
Parameter
Test condition
Min.
Max.
Unit
0V ≤VIN ≤VCC
±10
µA
0V ≤VOUT ≤VCC
±10
µA
E = VIL, GVPP = VIL,
IOUT = 0 mA, f = 5 MHz
35
mA
E = VIH
1
mA
E > VCC – 0.2V
100
µA
VPP = VCC
10
µA
ILI
Input leakage current
ILO
Output leakage current
ICC
Supply current
ICC1
Supply current (Standby) TTL
ICC2
Supply current (Standby)
CMOS
IPP
Program current
VIL
Input low voltage
–0.3
0.8
V
VIH (3)
Input high voltage
2
VCC + 1
V
VOL
Output low voltage
IOL = 2.1 mA
0.4
V
Output high voltage TTL
IOH = –1 mA
3.6
V
IOH = –100 µA
VCC – 0.7
V
VOH
Output high voltage CMOS
1. TA = 0 to 70 °C or –40 to 85 °C; VCC = 5 V ± 10%.
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
3. Maximum DC voltage on Output is VCC +0.5V.
14/24
M27C801
DC and AC characteristics
Table 8.
Symbol
Programming mode DC characteristics(1) (2)
Parameter
Test condition
Min.
VIL ≤VIN ≤VIH
Max.
Unit
±10
µA
50
mA
50
mA
ILI
Input leakage current
ICC
Supply current
IPP
Program current
VIL
Input low voltage
–0.3
0.8
V
VIH
Input high voltage
2
VCC + 0.5
V
VOL
Output low voltage
IOL = 2.1mA
0.4
V
VOH
Output high voltage TTL
IOH = –1mA
VID
A9 voltage
E = VIL
3.6
11.5
V
12.5
V
1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
15/24
DC and AC characteristics
M27C801
Read mode AC characteristics(1) (2)
Table 9.
Symbol
Alt
Test
condition
Parameter
-55 (3)
-80/-90
-100
Unit
Min.
Max.
Min.
Max.
Min
Max.
tAVQV
tACC Address valid to output valid
E = VIL,
GVPP = VIL
55
80
100
ns
tELQV
tCE Chip Enable low to output valid
GVPP = VIL
55
80
100
ns
tGLQV
tOE Output Enable low to output valid
E = VIL
30
40
50
ns
tEHQZ(4)
tDF Chip Enable high to output Hi-Z
tGHQZ(4)
tAXQX
GVPP = VIL
0
25
0
35
0
40
ns
tDF Output Enable high to output Hi-Z
E = VIL
0
25
0
35
0
40
ns
Address transition to output
transition
E = VIL,
GVPP = VIL
0
tOH
0
0
ns
1. TA = 0 to 70 °C or –40 to 85 °C; VCC = 5 V ± 10%.
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
3. Speed obtained with High Speed AC measurement conditions.
4. Sampled only, not 100% tested.
Figure 7.
Read mode AC waveforms
A0-A19
VALID
tAVQV
VALID
tAXQX
E
tGLQV
tEHQZ
G
tELQV
Q0-Q7
tGHQZ
Hi-Z
AI01583B
16/24
M27C801
DC and AC characteristics
Margin mode AC characteristics(1) (2)
Table 10.
Symbol
Alt
Parameter
Test condition
Min
Max
Unit
tA9HVPH
tAS9
VA9 high to VPP high
2
µs
tVPHEL
tVPS
VPP high to Chip Enable low
2
µs
tA10HEH
tAS10
VA10 high to Chip Enable high (Set)
1
µs
tA10LEH
tAS10
VA10 low to Chip Enable high (Reset)
1
µs
tEXA10X
tAH10
Chip Enable transition to VA10 transition
1
µs
tEXVPX
tVPH
Chip Enable transition to VPP transition
2
µs
tVPXA9X
tAH9
VPP transition to VA9 transition
2
µs
1. TA = 25 °C; VCC = 6.25 V ± 0.25 V; VPP = 12.75 V ± 0.25 V
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Figure 8.
Margin mode AC waveforms
VCC
A8
A9
tA9HVPH
tVPXA9X
GVPP
tVPHEL
tEXVPX
E
tA10HEH
tEXA10X
A10 Set
A10 Reset
tA10LEH
AI00736B
17/24
DC and AC characteristics
Table 11.
M27C801
Programming mode AC characteristics (1)
Symbol
Alt
tAVEL
tAS
Address valid to Chip Enable low
2
µs
tQVEL
tDS
Input valid to Chip Enable low
2
µs
tVCHEL
tVCS
VCC high to Chip Enable low
2
µs
tVPHEL
tOES
VPP high to Chip Enable low
2
µs
tVPLVPH
tPRT
VPP rise time
50
ns
tELEH
tPW
Chip Enable program pulse width (initial)
45
tEHQX
tDH
Chip Enable high to Input transition
2
µs
tEHVPX
tOEH
Chip Enable high to VPP transition
2
µs
tVPLEL
tVR
VPP low to Chip Enable low
2
µs
tELQV
tDV
Chip Enable low to output valid
tDFP
Chip Enable high to output Hi-Z
0
tAH
Chip Enable high to address transition
0
tEHQZ
(2)
tEHAX
Parameter
Test condition
Min.
Max.
55
µs
130
ns
ns
2. Sampled only, not 100% tested.
Programming and verify modes AC waveforms
VALID
A0-A19
tAVEL
Q0-Q7
tEHAX
DATA IN
DATA OUT
tQVEL
tEHQZ
tEHQX
VCC
tVCHEL
tEHVPX
tELQV
GVPP
tVPHEL
tVPLEL
E
tELEH
PROGRAM
VERIFY
AI01270
18/24
µs
1
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Figure 9.
Unit
M27C801
Package mechanical data
5
Package mechanical data
5.1
32-pin ceramic frit-seal DIP, with round window (FDIP32WA)
Figure 10. FDIP32WA package outline
A2
A3
A1
B1
B
A
L
α
e
eA
D2
C
eB
D
S
N
∅
E1
E
1
FDIPW-a
Table 12.
FDIP32WA package mechanical data
millimeters
inches
Symbol
Min
Typ
A
Max
Min
Typ
5.72
Max
0.225
A1
0.51
1.40
0.020
0.055
A2
3.91
4.57
0.154
0.180
A3
3.89
4.50
0.153
0.177
B
0.41
0.56
0.016
0.022
B1
1.45
0.057
C
0.23
0.30
0.009
0.012
D
41.73
42.04
1.643
1.655
D2
38.10
1.500
e
2.54
0.100
E
15.24
0.600
E1
13.06
eA
13.36
0.514
14.99
0.526
0.590
eB
16.18
18.03
0.637
0.710
L
3.18
4.10
0.125
0.161
N
S
32
1.52
Ø
α
32
2.49
0.060
7.11
4°
0.098
0.280
11°
4°
11°
19/24
Package mechanical data
5.2
M27C801
32-pin plastic DIP, 600 mils width (PDIP32)
Figure 11. PDIP32 package outline
A2
A1
b1
b
A
L
α
e
eA
c
D2
D
S
N
E1
E
1
PDIP-C
Table 13.
PDIP32 package mechanical data
millimeters
inches
Symbol
Min
Typ
A
A1
Min
Typ
4.83
0.38
A2
Max
0.190
0.015
3.81
0.150
b
0.41
0.53
0.016
0.021
b1
1.14
1.65
0.045
0.065
c
0.23
0.38
0.009
0.015
D
41.78
42.29
1.645
1.665
D2
38.10
1.500
eA
15.24
0.600
e
2.54
0.100
E
15.24
15.88
0.600
0.625
E1
13.46
13.97
0.530
0.550
S
1.65
2.21
0.065
0.087
L
3.05
3.56
0.120
0.140
α
0°
15°
0°
15°
N
20/24
Max
32
32
M27C801
5.3
Package mechanical data
32-lead rectangular plastic leaded chip carrier (PLCC32)
Figure 12. PLCC32 package outline
D
D1
A1
A2
1 N
B1
E2
E3
e
E1 E
F
B
0.51 (.020)
E2
1.14 (.045)
A
D3
R
D2
CP
D2
PLCC-A
Table 14.
PLCC32 package mechanical data
millimeters
inches
Symbol
Min
Typ
Max
Min
Typ
Max
A
3.18
3.56
0.125
0.140
A1
1.53
2.41
0.060
0.095
A2
0.38
–
0.015
–
B
0.33
0.53
0.013
0.021
B1
0.66
0.81
0.026
0.032
CP
0.10
0.004
D
12.32
12.57
0.485
0.495
D1
11.35
11.51
0.447
0.453
D2
4.78
5.66
0.188
0.223
D3
7.62
0.300
E
14.86
15.11
0.585
0.595
E1
13.89
14.05
0.547
0.553
E2
6.05
6.93
0.238
0.273
E3
10.16
0.400
e
1.27
0.050
F
0.00
0.13
0.000
0.005
R
0.89
0.035
N
32
32
21/24
Part numbering
6
M27C801
Part numbering
Table 15.
Ordering information scheme
Example:
M27C801
-55
K
1
Device type
M27
Supply voltage
C = 5 V ±10%
Device function
801 = 8 Mbit (1Mb x 8)
Speed
-55 (1) = 55 ns
-80 = 80 ns
-90 = 90 ns
-100 = 100 ns
Package
F = FDIP32W
B = PDIP32
K = PLCC32
Temperature range
1 = 0 to 70 °C
6 = –40 to 85 °C
1. High Speed, see DC and AC characteristics section for further information.
For a list of available options (speed, package, etc...) or for further information on any aspect
of this device, please contact the nearest STMicroelectronics sales office.
22/24
M27C801
7
Revision history
Revision history
Table 16.
Document revision history
Date
Revision
Changes
10-Sept-1998
1
First Issue
21-Mar-2000
2
FDIP32W Package changed
25-Sep-2000
3
AN620 Reference removed
12-Jul-2002
4
55ns speed class added
PLCC32 Package mechanical drawing and data clarified
12-Apr-2006
5
Converted to new template. Added ECOPACK® information.
Removed Tape & Reel Packing option.
24-Sep-2007
6
TSOP32 (N) package removed.
45 ns, 60 ns, 70 ns, 120 ns and 150 ns speed classes removed,
90 ns speed class added.
23/24
M27C801
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