High Common-Mode Voltage Programmable Gain Difference Amplifier AD628 FUNCTIONAL BLOCK DIAGRAM FEATURES REXT2 +VS 100kΩ A reference pin (VREF) provides a dc offset for converting bipolar to single-sided signals. The AD628 converts +5 V, +10 V, ±5 V, ±10 V, and 4 to 20 mA input signals to a single-ended output within the input range of single-supply ADCs. The AD628 has an input common-mode and differential mode operating range of ±120 V. The high common-mode input impedance makes the device well suited for high voltage measurements across a shunt resistor. The buffer amplifier’s inverting input is available for making a remote Kelvin connection. 10kΩ G = +0.1 –IN –IN OUT A2 10kΩ +IN A1 +IN 100kΩ +IN 10kΩ AD628 VREF 02992-C-001 –VS CFILT High voltage current shunt sensing Programmable logic controllers Analog input front end signal conditioning +5 V, +10 V, ±5 V, ±10 V and 4 to 20 mA Isolation Sensor signal conditioning Power supply monitoring Electrohydraulic control Motor control Figure 1. 130 120 110 100 CMRR (dB) The AD628 is a precision difference amplifier that combines excellent dc performance with high common-mode rejection over a wide range of frequencies. When used to scale high voltages, it allows simple conversion of standard control voltages or currents for use with single-supply ADCs. A wideband feedback loop minimizes distortion effects due to capacitor charging of ∑-∆ ADCs. RG –IN APPLICATIONS GENERAL DESCRIPTION REXT1 VS = ±15V 90 80 70 VS = ±2.5V 60 50 40 30 10 100 1k 10k FREQUENCY (Hz) 100k 02992-C-002 High common-mode input voltage range ±120 V at VS = ±15 V Gain range 0.1 to 100 Operating temperature range: −40°C to ±85°C Supply voltage range Dual supply: ±2.25 V to ±18 V Single supply: 4.5 V to 36 V Excellent ac and dc performance Offset temperature stability RTI: 10 µV/°C max Offset: ±1.5 V mV max CMRR RTI: 75 dB min, dc to 500 Hz, G = +1 Figure 2. CMRR vs. Frequency of the AD628 A precision 10 kΩ resistor connected to an external pin is provided for either a low-pass filter or to attenuate large differential input signals. A single capacitor implements a lowpass filter. The AD628 operates from single and dual supplies and is available in an 8-lead SOIC or MSOP package. It operates over the standard industrial temperature range of −40°C to +85°C. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. AD628 TABLE OF CONTENTS Specifications..................................................................................... 3 REVISION HISTORY Absolute Maximum Ratings............................................................ 7 4/04—Data Sheet Changed from Rev. B to Rev. C Updated Format.................................................................Universal Changes to Specifications............................................................... 3 Changes to Absolute Maximum Ratings ...................................... 7 Changes to Figure 3......................................................................... 7 Changes to Figure 26..................................................................... 13 Changes to Figure 27..................................................................... 13 Changes to Theory of Operation ................................................ 14 Changes to Figure 29..................................................................... 14 Changes to Table 5......................................................................... 15 Changes to Gain Adjustment Section......................................... 15 Added the Input Voltage Range Section..................................... 15 Added Figure 30 ............................................................................ 15 Added Figure 31 ............................................................................ 15 Changes to Voltage Level Conversion Section .......................... 16 Changes to Figure 32..................................................................... 16 Changes to Table 6......................................................................... 16 Changes to Figure 33 and Figure 34............................................ 17 Changes to Figure 35..................................................................... 18 Changes to Kelvin Connection Section...................................... 18 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ............................................. 9 Test Circuits..................................................................................... 13 Theory of Operation ...................................................................... 14 Applications..................................................................................... 15 Gain Adjustment......................................................................... 15 Input Voltage Range ................................................................... 15 Voltage Level Conversion .......................................................... 16 Current Loop Receiver............................................................... 17 Monitoring Battery Voltages ..................................................... 17 Filter Capacitor Values............................................................... 18 Kelvin Connection ..................................................................... 18 Outline Dimensions ....................................................................... 19 Ordering Guide........................................................................... 19 6/03—Data Sheet Changed from Rev. A to Rev. B Changes to General Description ................................................... 1 Changes to Specifications............................................................... 2 Changes to Ordering Guide ........................................................... 4 Changes to TPCs 4, 5, and 6........................................................... 5 Changes to TPC 9............................................................................ 6 Updated Outline Dimensions...................................................... 14 1/03—Data Sheet Changed from Rev. 0 to Rev. A Change to Ordering Guide............................................................. 4 11/02—Rev. 0: Initial Version Rev. C | Page 2 of 20 AD628 SPECIFICATIONS TA = 25°C, VS = ±15 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = 0 unless otherwise noted. Table 1. Parameter DIFF AMP + OUTPUT AMP Gain Equation Gain Range Offset Voltage vs. Temperature CMRR Minimum CMRR Over Temperature vs. Temperature PSRR (RTI) Input Voltage Range Common Mode Differential Dynamic Response Small Signal BW –3 dB Full Power Bandwidth Settling Time Slew Rate Noise (RTI) Spectral Density DIFF-AMP Gain Error vs. Temperature Nonlinearity vs. Temperature Offset Voltage vs. Temperature Input Impedance Differential Common Mode CMRR Minimum CMRR Over Temperature vs. Temperature Output Resistance Error Conditions Min AD628AR Typ Max Min AD628ARM Typ Max G = +0.1(1+ REXT1/REXT2). See Figure 29. VOCM = 0 V. RTI of input pins2. Output amp G = +1. 0.11 −1.5 100 +1.5 0.11 −1.5 100 +1.5 4 RTI of input pins. G = +0.1 to +100. 500 Hz. −40°C to +85°C. VS = ±10 V to ±18 V. 4 75 75 70 75 70 77 1 94 −120 −120 G = +0.1. 4 77 +120 +120 −0.1 600 5 µV/°C dB dB dB (µV/V)/°C dB V V 0.3 0.3 300 15 300 15 nV/√Hz µV p-p 0.1 +0.01 3 +0.1 5 5 10 +1.5 8 40 −0.1 3 +0.1 5 5 10 +1.5 8 220 55 75 75 75 70 75 70 1 10 0.1 +0.01 −1.5 220 55 Rev. C | Page 3 of 20 4 V/V V/V mV kHz kHz µs V/µs −1.5 −0.1 8 +120 +120 40 1 kHz. 0.1 Hz to 10 Hz. RTI of input pins. G = +0.1 to +100. 500 Hz. −40°C to +85°C. 1 94 −120 −120 600 5 G = +0.1, to 0.01%, 100 V step. RTI of input pins. 8 75 Unit 4 +0.1 1 10 −0.1 V/V % ppm/°C ppm ppm mV µV/°C kΩ kΩ dB 4 +0.1 dB dB (µV/V)/°C kΩ % AD628 Parameter OUTPUT AMPLIFIER Gain Equation Nonlinearity Offset Voltage vs. Temperature Output Voltage Swing Bias Current Offset Current CMRR Open-Loop Gain POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE Conditions Min G = (1 + REXT1/REXT2). G = +1, VOUT = ±10 V. RTI of output amp. −0.15 RL = 10 kΩ. RL = 2 kΩ. −14.2 −13.8 AD628AR Typ Max 1.5 0.2 VCM = ±13 V. VOUT = ±13 V. 0.5 +0.15 0.6 +14.1 +13.6 3 0.5 130 130 ±2.25 –40 1 To use a lower gain, see the Gain Adjustment section. The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification. 2 Rev. C | Page 4 of 20 Min AD628ARM Typ Max −0.15 −14.2 −13.8 1.5 0.2 0.5 +0.15 0.6 +14.1 +13.6 3 0.5 130 130 ±18 1.6 +85 ±2.25 –40 ±18 1.6 +85 Unit V/V ppm mV µV/°C V V nA nA dB dB V mA °C AD628 TA = 25°C, VS = +5 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = +2.5 unless otherwise noted. Table 2. Parameter DIFF AMP + OUTPUT AMP Gain Equation Gain Range Offset Voltage vs. Temperature CMRR Minimum CMRR Over Temperature vs. Temperature PSRR (RTI) Input Voltage Range Common Mode3 Differential Dynamic Response Small Signal BW –3 dB Full Power Bandwidth Settling Time Slew Rate Noise (RTI) Spectral Density DIFF-AMP Gain Error Nonlinearity vs. Temperature Offset Voltage vs. Temperature Input Impedance Differential Common Mode CMRR Minimum CMRR Over Temperature vs. Temperature Output Resistance Error OUTPUT AMPLIFIER Gain Equation Nonlinearity Output Offset Voltage vs. Temperature Output Voltage Swing Bias Current Offset Current CMRR Open-Loop Gain Conditions Min AD628AR Typ Max Min AD628ARM Typ Max G = +0.1(1+ REXT1/REXT2). See Figure 29. VOCM = 2.25 V. RTI of input pins2. Output Amp G = +1. 0.11 −3.0 100 +3.0 0.11 −3.0 100 +3.0 RTI of input pins. G = 0.1 to 100. 500 Hz. −40°C to +85°C. 75 75 70 VS = 4.5 V to 10 V. 77 6 G = +0.1, to 0.01%, 30 V step. 1 kHz. 0.1 Hz to 10 Hz. –0.1 1 94 4 77 +17 +15 350 15 nV/√Hz µV p-p 0.1 +0.01 +0.1 3 10 +2.5 10 –0.1 3 −2.5 130 130 Rev. C | Page 5 of 20 +0.1 3 10 +2.5 10 220 55 4 +0.1 1.5 0.2 VCM = 1 V to 4 V. VOUT = 1 V to 4 V. 0.1 +0.01 75 75 70 −0.1 0.9 1 V V 350 15 1 10 RL = 10 kΩ. RL = 2 kΩ. +17 +15 kHz kHz µs V/µs 75 75 70 −0.15 4 −12 −15 220 55 G = (1 + REXT1/REXT2). G = +1, VOUT = 1 V to 4 V. RTI of output amp. 1 94 µV/°C dB dB dB (µV/V)/°C dB 440 30 15 0.3 −2.5 RTI of input pins. G = +0.1 to +100. 500 Hz. −40°C to +85°C. 15 V/V V/V mV 440 30 15 0.3 3 RTI of input pins. 6 75 75 70 −12 −15 G = +0.1. 15 Unit 0.5 0.15 0.6 4.1 4 3 0.5 1 10 −0.1 +0.1 −0.15 0.9 1 1.5 0.2 130 130 4 0.5 0.15 0.6 4.1 4 3 0.5 V/V % ppm ppm mV µV/°C kΩ kΩ dB dB dB (µV/V)/°C kΩ % V/V ppm mV µV/°C V V nA nA dB dB AD628 Parameter POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE Conditions Min AD628AR Typ Max ±2.25 −40 1 To use a lower gain, see the Gain Adjustment section. The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification. Greater values of voltage are possible with greater or lesser values of VREF. 2 3 Rev. C | Page 6 of 20 +36 1.6 +85 Min AD628ARM Typ Max ±2.25 −40 +36 1.6 +85 Unit V mA °C AD628 ABSOLUTE MAXIMUM RATINGS Table 3. 1.6 Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1 TJ = 150°C 1.4 1.2 8-LEAD MSOP PACKAGE 1.0 0.8 8-LEAD SOIC PACKAGE 0.6 0.4 0.2 0 –60 MSOP θJ (JEDEC; 4-LAYER BOARD) = 132.54°C/W SOIC θJ (JEDEC; 4-LAYER BOARD) = 154°C/W –40 –20 0 20 60 80 100 Figure 3. Maximum Power Dissipation vs. Temperature When using ±12 V supplies or higher (see the Input Voltage Range section). ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. C | Page 7 of 20 40 AMBIENT TEMPERATURE (°C) 02992-C-003 Rating ±18 V See Figure 3 ±120 V1 ±120 V1 Indefinite –65°C to +125°C –40°C to +85°C 300°C POWER DISSIPATION (W) Parameter Supply Voltage Internal Power Dissipation Input Voltage (Common Mode) Differential Input Voltage Output Short-Circuit Duration Storage Temperature Operating Temperature Range Lead Temperature Range (10 sec Soldering) AD628 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4. Pin Function Descriptions +IN 1 8 –IN 7 +VS AD628 TOP VIEW 3 VREF (Not to Scale) 6 RG CFILT 4 5 OUT Figure 4. Pin Configuration 02992-C-004 –VS 2 Pin No. 1 2 3 4 5 6 7 8 Rev. C | Page 8 of 20 Mnemonic +IN −VS VREF CFILT OUT RG +VS −IN Function Noninverting Input Negative Supply Voltage Reference Voltage Input Filter Capacitor Connection Amplifier Output Output Amplifier Inverting Input Positive Supply Voltage Inverting Input AD628 TYPICAL PERFORMANCE CHARACTERISTICS 140 40 8440 UNITS G = +0.1 35 120 100 25 PSRR (dB) 20 80 –15V +15V 60 15 +2.5V 40 10 20 5 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0 INPUT OFFSET VOLTAGE (mV) 0 0.1 02992-C-005 0 –1.6 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 5. Typical Distribution of Input Offset Voltage, VS = ±15 V, SOIC Package 02992-C-008 % OF UNITS 30 Figure 8. PSRR vs. Frequency, Single and Dual Supplies 25 1000 % OF UNITS 20 15 10 0 –74 –78 –82 –86 –90 –94 –98 –102 –106 –110 CMRR (dB) 02992-C-006 5 100 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 6. Typical Distribution of Common-Mode Rejection, SOIC Package 02992-C-009 VOLTAGE NOISE DENSITY (nV/ Hz) 8440 UNITS Figure 9. Voltage Noise Spectral Density, RTI, VS = ±15 V 130 1000 VOLTAGE NOISE DENSITY (nV/ Hz) 120 110 VS = ±15V 90 80 70 VS = ±2.5V 60 50 30 10 100 1k 10k FREQUENCY (Hz) 100k Figure 7. CMRR vs. Frequency 100 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 10. Voltage Noise Spectral Density, RTI, VS = ±2.5 V Rev. C | Page 9 of 20 02992-C-010 40 02992-C-007 CMRR (dB) 100 AD628 40 9638 UNITS 1s 35 100 30 % OF DEVICES NOISE (5µV/DIV) 90 25 20 15 10 10 0 5 10 TIME (Sec) 0 0 1 2 3 4 5 Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI COMMON-MODE VOLTAGE (V) GAIN (dB) 10 100 G = +10 10 G = +1 –10 –20 9 UPPER CMV LIMIT G = +100 30 0 8 150 50 20 7 Figure 14. Typical Distribution of +1 Gain Error 60 40 6 GAIN ERROR (ppm) 02992-C-014 0 02992-C-011 5 G = +0.1 –40°C 50 +85°C 0 VREF = 0V +25°C –40°C –50 +85°C –100 LOWER CMV LIMIT 1k 10k 100k 1M 10M FREQUENCY (Hz) –150 02992-C-012 –40 100 0 5 10 15 20 VS (±V) Figure 12. Small Signal Frequency Response, VOUT = 200 mV p-p, G = +0.1, +1, +10, and +100 02992-C-015 –30 Figure 15. Common-Mode Operating Range vs. Power Supply Voltage for Three Temperatures 60 500µV 50 100 OUTPUT ERROR (µV) 20 G = +10 10 0 G = +1 –10 –20 RL = 1kΩ 90 RL = 2kΩ RL = 10kΩ 10 0 G = +0.1 4.0V –30 –40 10 100 1k 10k 100k FREQUENCY (Hz) 1M 02992-C-013 GAIN (dB) 30 VS = ±15V OUTPUT VOLTAGE (V) Figure 16. Normalized Gain Error vs. VOUT, VS = ±15 V Figure 13. Large Signal Frequency Response, VOUT = 20 V p-p, G = +0.1, +1, +10, and +100 Rev. C | Page 10 of 20 02992-C-016 40 G = +100 AD628 VS = ±2.5V 100µV 500mV RL = 1kΩ 100 100 90 OUTPUT ERROR (µV) 90 RL = 2kΩ RL = 10kΩ 10 10 0 0 50mV OUTPUT VOLTAGE (V) 02992-C-020 4µs 02992-C-017 500mV Figure 17. Normalized Gain Error vs. VOUT, VS = ±2.5 V Figure 20. Small Signal Pulse Response, RL = 2 kΩ, CL = 0 pF, Top: Input, Bottom: Output 4 500mV 100 BIAS CURRENT (nA) 3 90 2 10 1 0 –20 0 20 40 60 80 100 TEMPERATURE (°C) 02992-C-018 0 –40 4µs 02992-C-021 50mV Figure 21. Small Signal Pulse Response, RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output Figure 18. Bias Current vs. Temperature Buffer 15 –40°C –25°C 100 +85°C 5 90 10.0 V +25°C 0 –40°C –5 10.0 V –25°C +85°C 10 0 +25°C –10 –15 0 5 10 15 20 25 OUTPUT CURRENT (mA) 02992-C-022 40 µs 02992-C-019 OUTPUT VOLTAGE SWING (V) 10 Figure 19. Output Voltage Operating Range vs. Output Current Figure 22. Large Signal Pulse Response, RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output Rev. C | Page 11 of 20 AD628 100 100 90 90 5V 5V 10mV 10mV 10 10 0 0 02992-C-023 Figure 23. Settling Time to 0.01%, 0 V to 10 V Step 02992-C-024 100µs 100µs Figure 24. Settling Time to 0.01% 0 V to −10 V Step Rev. C | Page 12 of 20 AD628 TEST CIRCUITS HP3589A HP3561A SPECTRUM ANALYZER SPECTRUM ANALYZER +VS +VS CFILT 4 7 10kΩ – +IN 100kΩ AD829 +IN OUT –IN –IN G = +0.1 +IN FET PROBE –IN 8 + 10kΩ 100kΩ 100kΩ +IN AD628 CFILT VREF +IN 1 –IN –IN G = +0.1 +IN 100kΩ RG AD628 10kΩ 3 2 6 RG VREF –VS 10kΩ –VS – 02992-C-025 10kΩ AD707 + Figure 25. CMRR vs. Frequency Figure 27. Noise Tests SCOPE +VS 1 VAC +15V –IN 10kΩ +IN +IN G = +100 G = +100 10kΩ 100kΩ OUT 20Ω –IN –IN G = +0.1 +IN + AD829 – 100kΩ AD628 10kΩ VREF RG 02992-C-026 CFILT OUT 5 G = +100 10kΩ 10kΩ –VS Figure 26. PSRR vs. Frequency Rev. C | Page 13 of 20 02992-C-027 10kΩ –IN AD628 THEORY OF OPERATION RG 10kΩ 100kΩ –IN –IN G = +0.1 –IN OUT A2 10kΩ +IN A1 +IN 100kΩ +IN 10kΩ VREF The output of the difference amplifier is internally connected to a 10 kΩ resistor trimmed to better than ±0.1% absolute accuracy. The resistor is connected to the noninverting input of the output amplifier and is accessible to the user at Pin 4 (CFILT). A capacitor may be connected to implement a low-pass filter, a resistor may be connected to further reduce the output voltage, or a clamp circuit may be connected to limit the output swing. 02992-C-028 The AD628 is a high common-mode voltage difference amplifier, combined with a user configurable output amplifier (see Figure 28 and Figure 29). Differential mode voltages in excess of 120 V are accurately scaled by a precision 11:1 voltage divider at the input. A reference voltage input is available to the user at Pin 3 (VREF). The output common-mode voltage of the difference amplifier is the same as the voltage applied to the reference pin. If the uncommitted amplifier is configured for gain, connecting Pin 3 to one end of the external gain resistor establishes the output common-mode voltage at Pin 5 (OUT). CFILT Figure 28. Simplified Schematic CFILT +VS AD628 Careful layout design has resulted in exceptional commonmode rejection at higher frequencies. The inputs are connected to Pin 1 (+IN) and Pin 8 (−IN), which are adjacent to the power Pin 2 (−VS) and Pin 7 (+VS). Because the power pins are at ac ground, input impedance balance and, therefore, commonmode rejection, are preserved at higher frequencies. 100kΩ 10kΩ –IN G = +0.1 –IN 10kΩ A1 +IN OUT A2 +IN –IN 100kΩ +IN 10kΩ –VS VREF RG REXT3 REFERENCE VOLTAGE REXT2 Figure 29. Circuit Connections Rev. C | Page 14 of 20 REXT1 02992-C-029 The uncommitted amplifier is a high open-loop gain, low offset, low drift op amp, with its noninverting input connected to the internal 10 kΩ resistor. Both inputs are accessible to the user. AD628 APPLICATIONS GAIN ADJUSTMENT INPUT VOLTAGE RANGE The AD628 system gain is provided by an architecture consisting of two amplifiers. The gain of the input stage is fixed at 0.1; the output buffer is user adjustable as GA2 = 1 + REXT1/REXT2. The system gain is then The common-mode input voltage range is determined by VREF and the supply voltage. The relation is expressed by Table 5. Nearest Standard 1% Resistor Values for Various Gains (See Figure 29) REXT1 (Ω) REXT2 (Ω) REXT3 (Ω) 10 k 20 k 25.9 k 49.9 k 100 k 200 k 499 k 1M ∞ 20 k 18.7 k 12.4 k 11 k 10.5 k 10.2 k 10.2 k 0 0 0 0 0 0 0 0 Using a divider and setting A2 to unity gain yields ⎛ REXT4 GW / DIVIDER = 0.1 × ⎜⎜ + REXT4 10 kΩ ⎝ ⎞ ⎟ ×1 ⎟ ⎠ 150 100 50 MAXIMUM INPUT COMMON-MODE VOLTAGE WHEN VREF = GND 0 –50 –100 –150 –200 0 2 4 6 8 10 12 14 16 SUPPLY VOLTAGE (±V) Figure 30. Input Common-Mode Voltage vs. Supply Voltage for Dual Supplies 100 80 60 40 20 MAXIMUM INPUT COMMON-MODE VOLTAGE WHEN VREF = MIDSUPPLY 0 –20 –40 –60 –80 0 2 4 6 8 10 12 14 SINGLE-SUPPLY VOLTAGE (V) Figure 31. Input Common-Mode Voltage vs. Supply Voltage for Single Supplies Rev. C | Page 15 of 20 16 02992-C-034 To set the system gain to less than 0.1, an attenuator may be created by placing a resistor, REXT4, from Pin 4 (CFILT) to the reference voltage. A divider would be formed by the 10 kΩ resistor which is in series with the positive input of A2 and REXT4. A2 would be configured for unity gain. 200 INPUT COMMON-MODE VOLTAGE (V) A2 Gain (V/V) 1 2 2.5 5 10 20 50 100 where VS + is the positive supply, VS − is the negative supply and 1.2 V is the headroom needed for suitable performance. Equation 2 provides a general formula for calculating the common-mode input voltage range. However, the AD628 should be kept within the maximum limits listed in the Specifications table (Table 1) to maintain optimal performance. This is illustrated in Figure 30 where the maximum commonmode input voltage is limited to ±120 V. Figure 31 shows the common-mode input voltage bounds for single-supply voltages. 02992-C-035 (1) At a 2 nA maximum, the input bias current of the buffer amplifier is very low and any offset voltage induced at the buffer amplifier by its bias current may be neglected (2 nA × 10 kΩ = 20 µV). However, to absolutely minimize bias current effects, REXT1 and REXT2 may be selected so that their parallel combination is 10 kΩ. If practical resistor values force the parallel combination of REXT1 and REXT2 below 10 kΩ, a series resistor (REXT3) may be added to make up for the difference. Table 5 lists several values of gain and corresponding resistor values. Total Gain (V/V) 0.1 0.2 0.25 0.5 1 2 5 10 (2) VCMLOWER ≥ 11(VS − + 1.2 V) − 10 VREF INPUT COMMON-MODE VOLTAGE (V) ⎞ ⎛ R GTOTAL = 0.1× ⎜⎜1 + EXT1 ⎟⎟ ⎝ REXT2 ⎠ VCMUPPER ≤ 11(VS+ – 1.2 V) − 10 VREF AD628 The differential input voltage range is constrained to the linear operation of the internal amplifiers A1 and A2. The voltage applied to the inputs of A1 and A2 should be between VS− + 1.2 V and VS+ − 1.2 V. Similarly, the outputs of A1 and A2 should be kept between VS− + 0.9 V and VS+ − 0.9 V. The design of such an application may be done in a few simple steps, which include the following: • Determine the required gain. For example, if the input voltage must be transformed from ±10 V to 0 V to +5 V, the gain is +5/+20 or +0.25. • Determine if the circuit common-mode voltage must be changed. An AD7715-5 ADC is illustrated for this example. When operating from a 5 V supply, the common-mode voltage of the AD7715 is half the supply or 2.5 V. If the AD628 reference pin and the lower terminal of the 10 kΩ resistor are connected to a 2.5 V voltage source, the output common-mode voltage will be 2.5 V. VOLTAGE LEVEL CONVERSION Industrial signal conditioning and control applications typically require connections between remote sensors or amplifiers and centrally located control modules. Signal conditioners provide output voltages up to ±10 V full scale; however, ADCs or microprocessors operating on single 3.3 V to 5 V logic supplies are becoming the norm. Thus, the controller voltages require further reduction in amplitude and reference. Table 6 shows resistor and reference values for commonly used single-supply converter voltages. REXT3 is included as an option. It is used to balance the source impedance into A2, which is described in more detail in the Gain Adjustment section. Furthermore, voltage potentials between locations are seldom compatible, and power line peaks and surges can generate destructive energy between utility grids. The AD628 is an ideal solution to both problems. It attenuates otherwise destructive signal voltage peaks and surges by a factor of 10 and shifts the differential input signal to the desired output voltage. Table 6. Nearest 1% Resistor Values for Voltages Level Conversion Applications Input Voltage (V) ±10 ±5 +10 +5 ±10 ±5 +10 +5 Conversion from voltage-driven or current-loop systems is easily accommodated using the circuit in Figure 32. This shows a circuit for converting inputs of various polarities and amplitudes to the input of a single-supply ADC. Note that the common-mode output voltage can be adjusted by connecting Pin 3 (VREF) and the lower end of the 10 kΩ resistor to the desired voltage. The output common-mode voltage will be the same as the reference voltage. ADC Supply Voltage (V) 5 5 5 5 3 3 3 3 Desired Output Voltage (V) 2.5 2.5 2.5 2.5 1.25 1.25 1.25 1.25 VREF (V) 2.5 2.5 2.5 2.5 1.25 1.25 1.25 1.25 AD7715-5 SERIAL CLOCK CLOCK NC +VS +5V 100kΩ 10kΩ 10kΩ A2 G = +0.1 DIN CS DOUT RESET DRDY AVDD AGND AIN(+) REF IN(–) AIN(–) REF IN(+) A1 REXT1 +IN +IN +5V –IN –IN VIN MCLK OUT DVDD OUT +IN (SEE TABLE 5) MCLK IN DGND 100kΩ (SEE TABLE 5) AD628 +2.5V 10kΩ VREF –VS AD680 RG CFILT +5V REXT3 10kΩ Figure 32. Level Shifter Rev. C | Page 16 of 20 (SEE TABLE 5) 02992-C-030 –IN SCLK REXT1 (kΩ) 15.0 39.7 39.7 89.8 2.49 15.0 15.0 39.7 REXT3 (kΩ) 4.02 2.00 2.00 1.00 7.96 4.02 4.02 2.00 AD628 CURRENT LOOP RECEIVER MONITORING BATTERY VOLTAGES Analog data transmitted on a 4 to 20 mA current loop may be detected with the receiver shown in Figure 33. The AD628 is an ideal choice for such a function, because the current loop must be driven with a compliance voltage sufficient to stabilize the loop, and the resultant common-mode voltage often exceeds commonly used supply voltages. Note that with large shunt values a resistance of equal value must be inserted in series with the inverting input to compensate for an error at the noninverting input. Figure 34 illustrates how the AD628 may be used to monitor a battery charger. Voltages approximately eight times the power supply voltage may be applied to the input with no damage. The resistor divider action is well suited for the measurement of many power supply applications, such as those found in battery chargers or similar equipment. +15V +VS 250Ω 100kΩ 10kΩ 10kΩ +IN –IN –IN 0V TO 5V TO ADC OUT A2 G = +0.1 –IN A1 250Ω +IN 100kΩ REXT1 100kΩ +IN AD628 10kΩ 4–20mA SOURCE RG VREF –15V CFILT REXT2 11kΩ 2.5V REF 02992-C-031 –VS Figure 33. Level Shifter for 4 to 20 mA Current Loop 5V +VS nVBAT(V) –IN 100kΩ 10kΩ 10kΩ +IN 0V TO 5V TO ADC OUT A2 –IN CHARGING CIRCUIT G = +0.1 –IN REXT1 10kΩ A1 +IN +1.5V BATTERY +IN AD628 10kΩ –VS VREF CFILT Figure 34. Battery Voltage Monitor Rev. C | Page 17 of 20 02992-C-032 OTHER BATTERIES IN CHARGING CIRCUIT RG 100kΩ AD628 FILTER CAPACITOR VALUES KELVIN CONNECTION A capacitor may be connected to Pin 4 (CFILT) to implement a low-pass filter. The capacitor value is In certain applications, it may be desirable to connect the inverting input of an amplifier to a remote reference point. This eliminates errors resulting in circuit losses in interconnecting wiring. The AD628 is particularly suited for this type of connection. In Figure 35, a 10 kΩ resistor is added in the feedback to match the source impedance of A2, which is described in more detail in the Gain Adjustment section. where ft is the desired 3 dB filter frequency. Table 7 shows several frequencies and their closest standard capacitor values. 5V +VS Table 7. Capacitor Values for Various Filter Frequencies Frequency (Hz) 10 50 60 100 400 1k 5k 10 k Capacitor Value (µF) 1.5 0.33 0.27 0.15 0.039 0.015 0.0033 0.0015 –IN 100kΩ 10kΩ –IN 10kΩ +IN A2 –IN G = +0.1 OUT CIRCUIT LOSS RG 10kΩ A1 +IN 100kΩ LOAD +IN 10kΩ AD628 –VS VREF CFILT VS /2 Figure 35. Kelvin Connection Rev. C | Page 18 of 20 02992-C-033 C = 15.9/ft (μF ) AD628 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 3.00 BSC 8 5 4.90 BSC 3.00 BSC 8 5 4.00 (0.1574) 3.80 (0.1497) 1 4 6.20 (0.2440) 5.80 (0.2284) 4 1.27 (0.0500) BSC PIN 1 0.65 BSC 0.25 (0.0098) 0.10 (0.0040) 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 8° 0° 0.80 0.60 0.40 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 0.50 (0.0196) × 45° 0.25 (0.0099) 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MO-187AA COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 36. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Figure 37. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) Dimensions shown in millimeters and (inches) SEATING PLANE ORDERING GUIDE Model AD628AR AD628AR-REEL AD628AR-REEL7 AD628ARM AD628ARM-REEL AD628ARM-REEL7 AD628-EVAL Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Description 8-Lead SOIC 8-Lead SOIC 13" Reel 8-Lead SOIC 7" Reel 8-Lead MSOP 8-Lead MSOP 13" Reel 8-Lead MSOP 7" Reel Evaluation Board Rev. C | Page 19 of 20 Package Option R-8 R-8 R-8 RM-8 RM-8 RM-8 Branding JGA JGA JGA AD628 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02992–0–4/04(C) Rev. C | Page 20 of 20