ASM3P2854C Custom Clock Generator for Fax System ASM3P2855D, ASM3P2854C realizes all the seventeen Features clocks • Generates Custom Clocks for FAX system from an required by the various components and subsystems of the FAX system. It uses an inexpensive inexpensive 24MHz Crystal 24MHz crystal as the input to generate two 66.66MHz low • 2x 66.66MHz low EMI (Spread Spectrum) clocks for EMI (spread spectrum) clocks used by ASIC1 for system/ ASIC1 (System / DDR SDRAM) DDR SDRAM, two 33.33MHz low EMI (spread spectrum) • 1 x 48MHz for USB1.1 HOST clocks used by ASIC2 and ASIC3 for system/ DDR • 2 x 33.33MHz low EMI (Spread Spectrum) clocks for SDRAM, a 25MHz low EMI (Spread Spectrum) clock System / DDR SDRAM of ASIC2 and ASIC3 used by ASIC1 for LCD, Serial port, and buzzer, a 48MHz • 1x 25MHz low EMI (Spread Spectrum) clock for clock used by USB1.1 HOST, and a 12MHz clock used LCD, Serial port, and buzzer of ASIC1 by USB PHY (USB2.0). One of the four Programmable • 1x 12MHz for USB PHY (USB2.0) clock • 1x Programmable clock for printer engine control 21.33732MHz, 21.19962MHz and 20.40464MHz used for • One of the four programmable clock outputs Printer Engine control selectable through two Select pins selection through two Select Pins S1 (PCLK) and S2. frequencies The accuracy of of 24.00448MHz, the synthesized • Supply Voltage 3.3V ± 0.3V programmable clocks is within ±18ppm. The custom clock • Available in 16L TSSOP, Green package generator works is with a Supply Voltage for 3.3V. The device is available in a 16L TSSOP Green package, over Product Description 0°C to +70°C temperature range. The output Clocks h ave ASM3P2854C is a part of the two chip custom clock an accuracy of ±50ppm. generator solution for NEC FAX system. Together with Block Diagram VDD_FOUT VDD 2 PLL 2 66.6MHz SSCLK 33.3MHz SSCLK 25MHz SSCLK XIN / CLKIN XOUT 48MHz Crystal (24 MHz) PLL 12MHz PLL PCLK S1 S2 GND ©2010 SCILLC. All rights reserved. MARCH 2010 – Rev. 1 GND_FOUT Publication Order Number: ASM3P2854/D ASM3P2854C Pin Diagram XIN / CLKIN 1 16 25MHz SSCLK XOUT 2 15 PCLK VDD 3 14 S2 VDD_FOUT 4 13 66.6MHz SSCLK ASM3P2854C GND_FOUT 5 12 66.6MHz SSCLK GND 6 11 S1 48MHz 7 10 33.3MHz SSCLK 12MHz 8 9 33.3MHz SSCLK Pin Description Pin# Pin Name Type Description 1 XIN / CLKIN I Crystal connection or external reference clock input. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 VDD P Power supply for the core 4 VDD_FOUT P Power supply for the output buffers. 5 GND_FOUT P Ground connection for the output buffers 6 GND P Ground connection 7 48MHz O 48MHz Clock Output 8 12MHz O 12MHz Clock Output 9 33.3MHz O 33.3 MHz low EMI Clock Output 10 33.3MHz O 33.3 MHz low EMI Clock Output 11 S1 I Selection Bit for Programmable Clock. To be Pulled HIGH or LOW suitably. See the PCLK Selection Table for details 12 66.6MHz O 66.6 MHz low EMI Clock Output 13 66.6MHz O 66.6 MHz low EMI Clock Output 14 S2 I Selection Bit for Programmable Clock. To be Pulled HIGH or LOW suitably. See the PCLK Selection Table for details 15 PCLK O Programmable Clock Output 16 25MHz O 25 MHz low EMI Clock Output Rev. 1 | Page 2 of 8 | www.onsemi.com ASM3P2854C PCLK Selection Table S2 S1 Programmable Clock (MHz) 0 0 24.00448 0 1 21.33732 1 0 21.19962 1 1 20.40464 Absolute Maximum Ratings Symbol VDD, VDD_FOUT TSTG Parameter Rating Unit Voltage on any pin with respect to Ground -0.5 to +4.6 V Storage temperature -65 to +125 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Recommended Operating Conditions Symbol TA VDD VDD_FOUT Parameter Operating Temperature Min Typ 0 Max Units +70 °C Core Voltage +3.0 +3.3 +3.6 V Output Buffer Voltage +3.0 +3.3 +3.6 V Rev. 1 | Page 3 of 8 | www.onsemi.com ASM3P2854C DC Electrical Characteristics Symbol Parameter Min Typ Max Unit V VIL Input low voltage GND-0.3 0.8 VIH Input high voltage 2.0 VDD+0.3 V IIL Input low current -35 µA IIH Input high current 35 µA IXOL XOUT output low current (VXOL@ 0.4V, VDD = 3.3V) 3 mA IXOH XOUT output high current (VXOH@ 2.5V, VDD = 3.3V) 3 mA VOL Output low voltage (VDD = 3.3V, IOL = 10mA) VOH Output high voltage (VDD = 3.3V, IOH = -10mA) IDD Static supply current ICC Dynamic supply current ( VDD=3.3V, No Load) VDD VDD_FOUT 0.4 2.5 1 15 33 Operating Core Voltage Operating Output Buffer Voltage tON Power-up time (first locked cycle after power-up) ZO Output impedance V V mA mA 3.0 3.3 3.6 3.0 3.3 3.6 V 5 mS 2 30 Notes: 1. XIN / CLKIN pin is pulled to GND. 2. VDD and CLKIN inputs are stable. Rev. 1 | Page 4 of 8 | www.onsemi.com V Ω ASM3P2854C AC Electrical Characteristics Symbol XIN / CLKIN Parameter Min Input frequency Output frequency 12 At Pins 9 and 10 33 At Pins 12 and 13 66 1 tHL 2 tJC tJP tD 25 Frequency Deviation for Spread Spectrum Clocks -0.5 Output rise time (measured from 20% to 80%) 1.0 Output fall time (measured from 80% to 20%) 1.0 % nS Cycle to Cycle Jitter (For Modulated Clocks); unloaded outputs Period Jitter (For Non-Modulated Clocks) ); unloaded outputs Output duty cycle ±300 pS ±275 45 Notes: 1. See the PCLK Selection Table for PCLK Frequency. 2. tLH and tHL are measured into a capacitive load of 15pF. Cycle-Cycle Jitter MHz PCLK At Pin 16 2 tLH Unit 48 At Pin 8 At Pin 15 fd Max 24 At Pin 7 FOUT Typ Period Jitter Jitter=J1=t2-t1 Jitter =J2=t3-t2 Rev. 1 | Page 5 of 8 | www.onsemi.com 50 55 % ASM3P2854C Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency 24MHz Frequency tolerance ± 50 ppm or better at 25°C Operating temperature range -25°C to +85°C Storage temperature -40°C to +85°C Load capacitance(CP) 18pF Shunt capacitance 7pF maximum ESR 25 Ω Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency. Typical Crystal Interface Circuit R Crystal CL Rx CL CL = 2*(CP – CS), Where CP = Load capacitance of crystal CS = Stray capacitance due to CIN, PCB, Trace etc. Rev. 1 | Page 6 of 8 | www.onsemi.com ASM3P2854C Package Information 16-lead Thin Shrunk Small Outline Package (4.40-MM Body) 1 8 PIN 1 ID E 16 A A2 e A1 Seating Plane C θ D 9 H B L D Dimensions Symbol Inches Min Millimeters Max A Min Max 0.043 1.20 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05 B 0.007 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.193 0.201 4.90 5.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.030 θ 0° 8° 0.50 0.75 0° 8° Rev. 1 | Page 7 of 8 | www.onsemi.com ASM3P2854C Ordering Code Ordering Code ASM3P2854CG-16TR Marking 3P28 Package Type Temperature 16-pin 4.4-mm TSSOP - TAPE & REEL, Green 0°C to +7 0°C 54C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under U.S Patent #5,488,627 and #5,631,921. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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