NCV47551 3.3 V to 20 V Adjustable Low Noise LDO Regulator with Adjustable Current Limit and 3.3 V Logic Compatible Enable Input http://onsemi.com The NCV47551 is a low noise low output current integrated low dropout regulator designed for use in harsh automotive environments. It includes wide operating temperature and input voltage ranges. The device is offered with adjustable voltage versions available in 3% output voltage accuracy. It has a high peak input voltage tolerance and reverse input voltage protection. It also provides overcurrent protection, overtemperature protection and enable for control of the state of the output voltage. The integrated current sense feature provides diagnosis and system protection functionality. The current limit of the device is adjustable by resistor connected to CSO pin. Voltage on CSO pin is proportional to output current. Features MARKING DIAGRAM 8 SOIC−8 SUFFIX D CASE 751 8 1 47551 A L Y W G 1 47551 ALYW G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package • Adjustable Voltage Version (from 3.3 V to 20 V) ± 3% Output Voltage ORDERING INFORMATION • Enable Input (3.3 V Logic Compatible Thresholds) • Adjustable Current Limit (from 100 mA to 20 mA) with 10% See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. Accuracy • Protection Features: Current Limitation Thermal Shutdown ♦ Reverse Input Voltage This is a Pb−Free Device ♦ ♦ • Typical Applications • • • • Microphone Power Supply Audio and Infotainment System Navigation Satellite Radio Cin 1 mF Vout Vin EN NR NCV47551 GND Cb* R1 ADJ Cout R2 CSO CCSO 10 mF RCSO 1 mF Cnoise* Cb*, Cnoise* − Optional for noise reduction. Figure 1. Application Schematic (See Application Section for more details) © Semiconductor Components Industries, LLC, v2013 December, 2013 − Rev. 0 1 Publication Order Number: NCV47551/D NCV47551 Vin Vout NR VOLTAGE REFERENCE VREF1 VREF2 PASS DEVICE AND CURRENT MIRROR ENABLE EN SATURATION PROTECTION THERMAL SHUTDOWN ICSO = Iout (Ratio 1:1) SP TSD + NOISE REDUCTION NR NR VREF2 2.55 V − CSO SP VREF1 1.265 V + GND ADJ − TSD Figure 2. Simplified Block Diagram 1 ADJ 8 Vout GND NC EN NR CSO Vin SOIC−8 Figure 3. Pin Connections (Top View) PIN FUNCTION DESCRIPTION Pin No. SOIC−8 Pin Name 1 ADJ Adjustable Voltage Setting Input. See Application Section for more details. 2 GND Power Supply Ground. 3 EN 4 CSO Description Enable Input; low level disables the IC. Current Sense Output, Current Limit setting and Output Current value information. See Application Section for more details. 5 Vin Positive Power Supply Input. 6 NR Noise Reduction Input. Connect either external capacitor for decreasing noise or must be left unconnected. 7 NC Not Connected. 8 Vout Regulated Output Voltage. http://onsemi.com 2 NCV47551 ABSOLUTE MAXIMUM RATINGS Symbol Min Max Unit Input Voltage DC Rating Vin −42 45 V Enable Input Voltage VEN −42 45 V Adjustable Input Voltage VADJ −0.3 10 V CSO Voltage VCSO −0.3 7 V Noise Reduction Input Voltage VNR −0.3 7 V Output Voltage Vout −1 40 V Junction Temperature TJ −40 150 °C Storage Temperature TSTG −55 150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ESD CAPABILITY (Note 1) Rating Symbol Min Max Unit ESD Capability, Human Body Model ESDHBM −2 2 kV ESD Capability, Machine Model ESDMM −200 200 V Min Max Unit 1. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) LEAD SOLDERING TEMPERATURE AND MSL (Note 2) Rating Symbol Moisture Sensitivity Level MSL Lead Temperature Soldering Reflow (SMD Styles Only), Pb−Free Versions TSLD 1 − − 265 peak °C 2. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D THERMAL CHARACTERISTICS (Note 3) Rating Thermal Characteristics Thermal Resistance, Junction−to−Air (Note 4) Thermal Reference, Junction−to−Lead (Note 4) Symbol Value RθJA RψJL 133 76 Unit °C/W 3. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 4. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. RECOMMENDED OPERATING RANGES Rating Input Voltage (Note 5) Nominal Output Voltage Output Current Limit (Note 6) Junction Temperature Symbol Min Max Unit Vin 4.4 40 V Vout_nom 3.3 20 V ILIM 0.1 20 mA TJ −40 150 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 5. Minimum Vin = 4.4 V or (Vout_nom + 1 V), whichever is higher. 6. Corresponding RCSO is in range from 25.5 kW down to 127.5 W. http://onsemi.com 3 NCV47551 ELECTRICAL CHARACTERISTICS Vin = 13.5 V, VEN = 3.3 V, RCSO = 0 W, CCSO = 1 mF, Cin = 1 mF, Cout = 10 mF, ESR = 1.5 W, Min and Max values are valid for temperature range −40°C ≤ TJ ≤ +150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to TJ = 25°C. Output Current Iout is the current out of pin including current through the resistor divider R1 and R2. (Note 7) Parameter Test Conditions Symbol Min Typ Max Unit Vout −3 − +3 % REGULATOR OUTPUT Output Voltage (Accuracy %) (Note 8) Vin = Vin_min to 40 V Iout = 0.1 mA to 20 mA Line Regulation (Note 8) Vin = Vin_min to (Vout_nom + 20 V) Iout = 0.1 mA Regline − 0.1 1.0 % Load Regulation Iout = 0.1 mA to 20 mA Vin = (Vout_nom + 8.5 V) Regload − 0.2 1.4 % Dropout Voltage (Note 9) Iout = 10 mA, Vout_nom = 5 V VDO = Vin − Vout VDO − 210 500 mV DISABLE AND QUIESCENT CURRENTS Disable Current VEN = 0 V IDIS − 0.075 10 mA Quiescent Current, Iq = Iin − Iout Iout = 0.1 mA, Vin = (Vout_nom + 8.5 V) Iq − 265 380 mA Quiescent Current, Iq = Iin − Iout Iout = 1 mA, Vin = (Vout_nom + 8.5 V) Iq − 1.45 3 mA ILIM 20 − 50 mA CURRENT LIMIT PROTECTION Current Limit Vout = 0.9 x Vout_nom, Vin = (Vout_nom + 8.5 V) PSRR AND NOISE Power Supply Ripple Rejection (Note 10) Iout = 1 mA, R1 = 82 kW, R2 = 27 kW Cin = none, Cb = 10 nF, Cnoise = 10 nF f = 100 Hz, 0.5 Vp−p f = 1 kHz, 0.5 Vp−p Output Noise Voltage (Note 10) Iout = 1 mA, R1 = 82 kW, R2 = 27 kW, Cb = 10 nF f = 10 Hz to 100 kHz, Cnoise = none f = 10 Hz to 100 kHz, Cnoise = 10 nF f = 20 Hz to 20 kHz, Cnoise = 10 nF PSRR Vn dB − − 85 90 − − − − 60 23 20 − − − 0.99 − 1.8 1.9 − 2.31 mVrms ENABLE Enable Input Threshold Voltage Logic Low (OFF) Logic High (ON) Vout ≤ 0.1 V Vout ≥ 0.9 x Vout_nom Enable Input Current VEN = 3.3 V IEN 2 8 20 mA Turn On Time from ENABLE ON to 90% of Vout_nom Iout = 1 mA R1 = 82 kW, R2 = 27 kW Cb = 10 nF, Cnoise = 10 nF ton − 2.8 − ms Vth(EN) V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 7. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA ≈ TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 8. Vin_min = 4.4 V or (Vout_nom + 1 V), whichever is higher. 9. Measured when the output voltage Vout has dropped – 2% from the nominal value obtained at Vin = Vout_nom + 8.5 V. 10. Values based on design and/or characterization. 11. Not guaranteed in dropout. 12. ICSO current at no load includes also mirrored current of resistor divider (Idiv = Vout / (R1 + R2)). http://onsemi.com 4 NCV47551 ELECTRICAL CHARACTERISTICS Vin = 13.5 V, VEN = 3.3 V, RCSO = 0 W, CCSO = 1 mF, Cin = 1 mF, Cout = 10 mF, ESR = 1.5 W, Min and Max values are valid for temperature range −40°C ≤ TJ ≤ +150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to TJ = 25°C. Output Current Iout is the current out of pin including current through the resistor divider R1 and R2. (Note 7) Parameter Test Conditions Symbol Min Typ Max 2.346 (−8 %) 2.55 2.754 (+8 %) Unit OUTPUT CURRENT SENSE CSO Voltage Level at Current Limit Vout = 0.9 x Vout_nom, (Vout_nom = 5 V) RCSO = 220 W CSO Transient Voltage Level CCSO = 4.7 mF, RCSO = 220 W Iout pulse from 0.1 mA to 20 mA, tr = 1 ms VCSO − − 3.3 V Output Current to CSO Current Ratio (Note 11) VCSO = 2 V Iout = 0.1 mA to 20 mA, (Vout_nom = 5 V) Iout/ICSO − (−10%) (1/1) − (+10%) − CSO Current at no Load Current (Note 12) VCSO = 0 V R1 = 82 kW, R2 = 27 kW, Cb = 10 nF ICSO_off − 47 60 mA TSD 150 − 195 °C VCSO_Ilim V THERMAL SHUTDOWN Thermal Shutdown Temperature (Note 10) Iout = 1 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 7. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA ≈ TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 8. Vin_min = 4.4 V or (Vout_nom + 1 V), whichever is higher. 9. Measured when the output voltage Vout has dropped – 2% from the nominal value obtained at Vin = Vout_nom + 8.5 V. 10. Values based on design and/or characterization. 11. Not guaranteed in dropout. 12. ICSO current at no load includes also mirrored current of resistor divider (Idiv = Vout / (R1 + R2)). http://onsemi.com 5 NCV47551 TYPICAL CHARACTERISTICS 450 Vin = 13.5 V Iout = 100 mA 1.3 Iq, QUIESCENT CURRENT (mA) VREF1, REFERENCE VOLTAGE (V) 1.31 1.29 1.28 1.27 1.26 1.25 1.24 1.23 1.22 −40 −20 0 20 40 60 80 350 300 250 200 150 100 TJ = 25°C Iout = 100 mA Vout_nom = 5 V 50 0 100 120 140 160 0 5 10 25 30 35 Figure 4. Reference Voltage vs. Temperature Figure 5. Quiescent Current vs. Input Voltage 40 0 TJ = 25°C Rout = 4.7 kW Vout_nom = 5 V Iin, INPUT CURRENT (mA) −0.1 1 0.8 0.6 0.4 0.2 −0.2 −0.3 −0.4 −0.5 −0.6 −0.7 −0.8 −0.9 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 −1.0 −45 5.5 6 5 −40 −35 Vin, INPUT VOLTAGE (V) Figure 6. Reference Voltage vs. Input Voltage ILIM, OUTPUT CURRENT LIMIT (mA) Vin = 13.5 V Vout_nom = 5 V 450 400 TJ = 150°C 350 300 TJ = 25°C 250 200 150 TJ = −40°C 100 50 0 2 4 10 12 14 16 6 8 Iout, OUTPUT CURRENT (mA) 18 −30 −25 −20 −15 −10 Vin, INPUT VOLTAGE (V) −5 0 Figure 7. Input Current vs. Input Voltage (Reverse Input Voltage) 500 VDO, DROPOUT VOLTAGE (mV) 20 Vin, INPUT VOLTAGE (V) TJ = 25°C Iout = 100 mA 1.2 0 15 TJ, JUNCTION TEMPERATURE (°C) 1.4 VREF1, REFERENCE VOLTAGE (V) 400 42 Vout = 4.5 V Vout_nom = 5 V RCSO = 0 W 40 38 36 34 TJ = 25°C 32 30 TJ = 150°C 28 26 24 22 0 20 TJ = −40°C Figure 8. Dropout vs. Output Current 5 10 15 20 25 30 35 Vin, INPUT VOLTAGE (V) 40 Figure 9. Output Current Limit vs. Input Voltage http://onsemi.com 6 45 NCV47551 TYPICAL CHARACTERISTICS 3.0 Vout = 3.3 V to 20 V TJ = 25°C 20 15 10 5 0 0.1 10 1 Vout = 3.3 V to 20 V TJ = 25°C ILIM = 0.1 mA to 20 mA 2.5 VCSO, CSO VOLTAGE (V) ILIM, OUTPUT CURRENT LIMIT (mA) 25 2.0 1.5 1.0 0.5 0 100 0 10 RCSO, (kW) Figure 10. Output Current Limit vs. RCSO 40 9 8 7 6 5 4 3 2 1 0 1 30 25 20 15 10 5 0 0 5 2 3 4 Iout, OUTPUT CURRENT (mA) 5 10 15 20 Iout, OUTPUT CURRENT (mA) 25 Figure 13. Quiescent Current vs. Output Current (High Load) 1 TJ = 25°C Vin = Vout_nom + 8.5 V Iout/ICSO, OUTPUT CURRENT TO CSO CURRENT RATIO (−) 1.12 1.1 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 0.92 0.9 0.88 TJ = 25°C Vin = Vout_nom + 8.5 V 35 Iq, QUIESCENT CURRENT (mA) Iq, QUIESCENT CURRENT (mA) TJ = 25°C Vin = Vout_nom + 8.5 V Figure 12. Quiescent Current vs. Output Current (Low Load) Iout/ICSO, OUTPUT CURRENT TO CSO CURRENT RATIO (−) 110 Figure 11. Output Current (% of ILIM) vs. CSO Voltage 10 0 20 30 40 50 60 70 80 90 100 Iout, OUTPUT CURRENT (% of ILIM) 0.95 0.9 0.85 0.8 0.75 0.7 TJ = 25°C Vin = 4.5 V Vout_nom = 5 V 0.65 0.6 0.1 1 10 Iout, OUTPUT CURRENT (mA) 100 0.1 Figure 14. Output Current to CSO Current Ratio vs. Output Current 1 10 Iout, OUTPUT CURRENT (mA) Figure 15. Output Current to CSO Current Ratio vs. Output Current (In Dropout) http://onsemi.com 7 100 NCV47551 1000 Unstable Region Area above curves 10 1 Vout_nom = 20 V Vout_nom = 5 V 0.1 0.01 0 Vout_nom = 3.3 V Stable Region Area below curves 2 4 6 10 12 14 16 8 Iout, OUTPUT CURRENT (mA) 18 20 3000 Noise 10 Hz − 100 kHz Vn = 16.7 mVrms @ Cnoise = 100 nF Vn = 26.1 mVrms @ Cnoise = 10 nF 2500 2000 Cnoise = 10 nF 1500 Cnoise = 100 nF 1000 0 10 100 1000 10000 FREQUENCY (Hz) 110 Cnoise = 10 nF Cnoise = 100 nF 90 80 70 60 100000 1000000 Figure 17. Noise vs. Frequency 120 100 TJ = 25°C Vin = 12 V Cb = 10 nF Vout_nom = 5 V Iout = 20 mA 500 Figure 16. Output Capacitor Stability Region vs. Output Current PSRR (dB) ESR (W) 100 TJ = 25°C Vin = Vout_nom + 8.5 V Cout = 1 mF − 100 mF Cb = none Vn, OUTPUT NOISE DENSITY (nV/Hz1/2) TYPICAL CHARACTERISTICS Cnoise = none 50 TJ = 25°C Vin = 13.5 V (DC) + 0.5 VPP (AC) 40 Vout_nom = 5 V, Iout = 1 mA Cb = 10 nF 30 10 100 1000 FREQUENCY (Hz) 10000 Figure 18. PSRR vs. Frequency http://onsemi.com 8 100000 NCV47551 DEFINITIONS General reduces its internal bias and shuts off the output, this term is called the disable current (IDIS). All measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. Current Limit Current Limit is value of output current by which output voltage drops below 90% of its nominal value. Output voltage The output voltage parameter is defined for specific temperature, input voltage and output current values or specified over Line, Load and Temperature ranges. PSRR Power Supply Rejection Ratio is defined as ratio of output voltage and input voltage ripple. It is measured in decibels (dB). Line Regulation The change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range. Line Transient Response Typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope. Load Regulation The change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range. Load Transient Response Typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low-load and high-load conditions. Dropout Voltage The input to output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. It is measured when the output voltage Vout has dropped −2% from the nominal value obtained at Vin = Vout_nom + 8.5 V. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 175°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Maximum Package Power Dissipation Quiescent and Disable Currents The power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower. Quiescent Current (Iq) is the difference between the input current (measured through the LDO input pin) and the output load current. If Enable pin is set to LOW the regulator http://onsemi.com 9 NCV47551 APPLICATIONS INFORMATION Circuit Description Enable Input The NCV47551 is an integrated low dropout regulator that provides a regulated voltage at 20 mA to the output. It is enabled with an input to the enable pin. The regulator voltage is provided by a PNP pass transistor controlled by an error amplifier with a bandgap reference, which gives it the lowest possible dropout voltage. The output current capability is 20 mA, and the base drive quiescent current is controlled to prevent oversaturation when the input voltage is low or when the output is overloaded. The integrated current sense feature provides diagnosis and system protection functionality. The current limit of the device is adjustable by resistor connected to CSO pin. Voltage on CSO pin is proportional to output current. The regulator is protected by both current limit and thermal shutdown. Thermal shutdown occurs above 150°C to protect the IC during overloads and extreme ambient temperatures. The enable pin is used to turn the regulator on or off. By holding the pin down to a voltage less than 0.99 V, the output of the regulator will be turned off. When the voltage on the enable pin is greater than 2.31 V, the output of the regulator will be enabled to power its output to the regulated output voltage. The enable pin may be connected directly to the input pin to give constant enable to the output regulator. Setting the Output Voltage The output voltage range can be set between 3.3 V and 20 V. This is accomplished with an external resistor divider feeding back the voltage to the IC back to the error amplifier by the voltage adjust pin ADJ. The internal reference voltage is set to a temperature stable reference (VREF1) of 1.265 V. The output voltage is calculated from the following formula. Ignoring the bias current into the ADJ pin: ǒ V out_nom + V REF1 1 ) Regulator The error amplifier compares the reference voltage to a sample of the output voltage (Vout) and drives the base of a PNP series pass transistor via a buffer. The reference is a bandgap design to give it a temperature−stable output. Saturation control of the PNP is a function of the load current and input voltage. Oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. Ǔ R1 R2 (eq. 1) Use R2 < 50 kW to avoid significant voltage output errors due to ADJ bias current. Designers should consider the tolerance of R1 and R2 during the design phase. Setting the Output Current Limit The output current limit can be set between 0.1 mA and 20 mA by external resistor RCSO (see Figure 1). Capacitor CCSO from range 1 mF to 4.7 mF in parallel with RCSO is required for stability of current limit control circuitry (see Figure 1). Regulator Stability Considerations The input capacitor (Cin) is necessary to stabilize the input impedance to avoid voltage line influences. The output capacitor (Cout) helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer’s data sheet usually provides this information. The value for the output capacitor Cout, shown in Figure 1 should work for most applications; see also Figure 14 for output stability at various load and Output Capacitor ESR conditions. Stable region of ESR in Figure 14 shows ESR values at which the LDO output voltage does not have any permanent oscillations at any dynamic changes of output load current. Marginal ESR is the value at which the output voltage waving is fully damped during four periods after the load change and no oscillation is further observable. ESR characteristics were measured with ceramic capacitors and additional series resistors to emulate ESR. Low duty cycle pulse load current technique has been used to maintain junction temperature close to ambient temperature. V CSO + I out I LIM + 2.55 R CSO R CSO + Where RCSO VCSO ILIM Iout R CSO 2.55 I LIM (eq. 2) (eq. 3) (eq. 4) − current limit setting resistor voltage at CSO pin proportional to Iout − current limit value − output current actual value CSO pin provides information about output current actual value. The CSO voltage is proportional to output current according to Equation 2. Once output current reaches its limit value (ILIM) set by external resistor RCSO than voltage at CSO pin is typically 2.55 V. Calculations of ILIM or RCSO values can be done using equations Equations 3 and 4, respectively. Designers should consider the tolerance of RCSO during the design phase. http://onsemi.com 10 NCV47551 Thermal Considerations Since TJ is not recommended to exceed 150°C, then the NCV47551 in SO-8 soldered on 645 mm2, 1 oz copper area, FR4 can dissipate up to 0.94 W when the ambient temperature (TA) is 25°C. See Figure 19 for RthJA versus PCB area. The power dissipated by the NCV47551 can be calculated from the following equations: As power in the NCV47551 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When the NCV47551 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power applications. The maximum dissipation the NCV47551 can handle is given by: RqJA, THERMAL RESISTANCE (°C/W) P D(MAX) + ƪTJ(MAX) * TAƫ P D [ V inǒI q@I outǓ ) I outǒV in * V outǓ (eq. 6) or V in(MAX) [ (eq. 5) P D(MAX) ) ǒV out I outǓ I out ) I q (eq. 7) Hints R qJA Vin and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the NCV47551 and make traces as short as possible. 240 220 200 180 1 oz, Single Layer 160 140 2 oz, Single Layer 120 100 0 100 200 300 400 500 600 700 COPPER HEAT SPREADER AREA (mm2) Figure 19. Thermal Resistance vs. PCB Copper Area ORDERING INFORMATION Device NCV47551DAJR2G Output Voltage Marking Package Shipping† Adjustable 47551 SOIC−8 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 11 NCV47551 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X S M J SOLDERING FOOTPRINT* MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCV47551/D