AD AD811AR-16 High performance video op amp Datasheet

High Performance Video Op Amp
AD811
Data Sheet
NC
7
+IN 3
–VS 4
6
+VS
OUTPUT
5
NC
AD811
NC = NO CONNECT
Figure 1. 8-Lead Plastic (N-8), CERDIP (Q-8), SOIC_N (R-8)
NC 1
16
AD811
NC 2
–IN 3
NC
15
NC
14
+VS
13
NC
12
OUTPUT
NC 6
11
NC
TOP VIEW 10 NC
(Not to Scale)
9 NC
NC 8
–VS 7
00866-E-002
NC 4
+IN 5
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
NC
NC
3
2
1
20 19
NC
NC
Figure 2. 16-Lead SOIC_W (RW-16)
NC
18 NC
NC 4
NC 5
17 NC
AD811
16 +VS
–IN 6
NC 7
10 11 12 13
NC
9
14 OUTPUT
00866-E-003
15 NC
TOP VIEW
(Not to Scale)
NC
+IN 8
NC
Video crosspoint switchers, multimedia broadcast systems
HDTV compatible systems
Video line drivers, distribution amplifiers
ADC/DAC buffers
DC restoration circuits
Medical
Ultrasound
PET
Gamma
Counter applications
MIL-STD-883B parts available
8
NC
APPLICATIONS
NC 1
–IN 2
00866-E-001
CONNECTION DIAGRAMS
High speed
140 MHz bandwidth (3 dB, G = +1)
120 MHz bandwidth (3 dB, G = +2)
35 MHz bandwidth (0.1 dB, G = +2)
2500 V/µs slew rate
25 ns settling time to 0.1% (for a 2 V step)
65 ns settling time to 0.01% (for a 10 V step)
Excellent video performance (RL =150 Ω)
0.01% differential gain, 0.01° differential phase
Voltage noise of 1.9 nV/√Hz
Low distortion: THD = −74 dB at 10 MHz
Excellent dc precision: 3 mV max input offset voltage
Flexible operation
Specified for ±5 V and ±15 V operation
±2.3 V output swing into a 75 Ω load (VS = ±5 V)
–VS
FEATURES
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 3. 20-Terminal LCC (E-20-1)
GENERAL DESCRIPTION
A wideband current feedback operational amplifier, the AD811
is optimized for broadcast-quality video systems. The −3 dB
bandwidth of 120 MHz at a gain of +2 and the differential gain
and phase of 0.01% and 0.01° (RL = 150 Ω) make the AD811 an
excellent choice for all video systems. The AD811 is designed to
meet a stringent 0.1 dB gain flatness specification to a bandwidth of
35 MHz (G = +2) in addition to low differential gain and phase
errors. This performance is achieved whether driving one or two
back-terminated 75 Ω cables, with a low power supply current
of 16.5 mA. Furthermore, the AD811 is specified over a power
supply range of ±4.5 V to ±18 V.
Rev. G
The AD811 is also excellent for pulsed applications where
transient response is critical. It can achieve a maximum slew
rate of greater than 2500 V/µs with a settling time of less than
25 ns to 0.1% on a 2 V step and 65 ns to 0.01% on a 10 V step.
The AD811 is ideal as an ADC or DAC buffer in data acquisition
systems due to its low distortion up to 10 MHz and its wide unity
gain bandwidth. Because the AD811 is a current feedback amplifier, this bandwidth can be maintained over a wide range of
gains. The AD811 also offers low voltage and current noise of
1.9 nV/√Hz and 20 pA/√Hz, respectively, and excellent dc
accuracy for wide dynamic range applications.
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Last Content Update: 02/23/2017
COMPARABLE PARTS
REFERENCE MATERIALS
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Tutorials
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Capacitance on VFB and CFB Op Amps Used in Current-toVoltage Converters
DOCUMENTATION
Application Notes
DESIGN RESOURCES
• AN-216: Video VCAs and Keyers Using the AD834 and
AD811
• AD811 Material Declaration
• AN-417: Fast Rail-to-Rail Operational Amplifiers Ease
Design Constraints in Low Voltage High Speed Systems
• Quality And Reliability
• AN-649: Using the Analog Devices Active Filter Design
Tool
• AN-692: Universal Precision Op Amp Evaluation Board
Data Sheet
• AD811: High Performance Video Op Amp Data Sheet
• AD811: Military Data Sheet
• PCN-PDN Information
• Symbols and Footprints
DISCUSSIONS
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AD811
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Applications ....................................................................................... 1
Applications Information .............................................................. 12
Connection Diagrams ...................................................................... 1
General Design Considerations ............................................... 12
General Description ......................................................................... 1
Achieving the Flattest Gain Response at High Frequency.... 12
Revision History ............................................................................... 2
Operation as a Video Line Driver ............................................ 14
Specifications..................................................................................... 3
An 80 MHz Voltage-Controlled Amplifier Circuit................ 15
Absolute Maximum Ratings ............................................................ 5
A Video Keyer Circuit ............................................................... 16
Maximum Power Dissipation ..................................................... 5
Outline Dimensions ....................................................................... 18
Metalization Photograph ............................................................. 5
Ordering Guide .......................................................................... 20
ESD Caution .................................................................................. 5
REVISION HISTORY
4/15—Rev. F to Rev. G
Changes to Figure 25 ........................................................................ 9
Changes to Ordering Guide .......................................................... 20
2/14—Rev. E to Rev. F
Changes to R-8 Package, RW-16 Package, and E-20-1 Package;
Deleted R-20 Package .................................................... Throughout
Changes to Applications Section .................................................... 1
Removed Figure 4; Renumbered Sequentially.............................. 1
Moved Figure 4 and Figure 5 .......................................................... 6
Changes to An 80 MHz Voltage-Controlled Amplifier
Circuit Section ................................................................................ 15
Updated Outline Dimensions, Removed Figure 54 ................... 18
Changes to Ordering Guide .......................................................... 19
7/04—Rev. D to Rev. E
Updated Format .................................................................. Universal
Change to Maximum Power Dissipation Section ........................ 7
Changes to Ordering Guide .......................................................... 20
Updated Outline Dimensions ....................................................... 20
Rev. G | Page 2 of 20
Data Sheet
AD811
SPECIFICATIONS
At TA = +25°C, VS = ±15 V dc, RLOAD = 150 Ω, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
Small Signal Bandwidth (No Peaking)
−3 dB
G = +1
G = +2
G = +2
G = +10
0.1 dB Flat
G = +2
Full Power Bandwidth3
Slew Rate
Settling Time to 0.1%
Settling Time to 0.01%
Settling Time to 0.1%
Rise Time, Fall Time
Differential Gain
Differential Phase
THD at fC = 10 MHz
Third-Order Intercept4
AD811J/AD811A1
Min Typ
Max
VS
RFB = 562 Ω
RFB = 649 Ω
RFB = 562 Ω
RFB = 511 Ω
±15 V
±15 V
±15 V
±15 V
140
120
80
100
140
120
80
100
MHz
MHz
MHz
MHz
RFB = 562 Ω
RFB = 649 Ω
VOUT = 20 V p-p
VOUT = 4 V p-p
VOUT = 20 V p-p
10 V Step, AV = − 1
10 V Step, AV = − 1
2 V Step, AV = − 1
RFB = 649, AV = +2
f = 3.58 MHz
f = 3.58 MHz
VOUT = 2 V p-p, AV = +2
At fC = 10 MHz
±15
±15
±15
±15
±15
±15
±15
±15
±15
±15
±15
±15
±15
±15
±5 V, ±15 V
25
35
40
400
2500
50
65
25
3.5
0.01
0.01
−74
36
43
0.5
25
35
40
400
2500
50
65
25
3.5
0.01
0.01
−74
36
43
0.5
MHz
MHz
MHz
V/µs
V/µs
ns
ns
ns
ns
%
Degree
dBc
dBm
dBm
mV
mV
µV/°C
TMIN to TMAX
Offset Voltage Drift
INPUT BIAS CURRENT
−Input
3
5
5
±5 V, ±15 V
2
±5 V, ±1 5 V
2
TMIN to TMAX
+Input
COMMON-MODE REJECTION
VOS (vs. Common Mode)
TMIN to TMAX
TMIN to TMAX
Input Current (vs. Common Mode)
POWER SUPPLY REJECTION
VOS
+Input Current
−Input Current
Unit
Conditions
INPUT OFFSET VOLTAGE
TRANSRESISTANCE
AD811S2
Min
Typ
Max
TMIN to TMAX
TMIN to TMAX
VOUT = ±10 V
RL = ∞
RL = 200 Ω
VOUT = ±2.5 V
RL = 150 Ω
VCM = ±2.5 V
VCM = ±10 V
TMIN to TMAX
VS = ±4.5 V to ±18 V
TMIN to TMAX
TMIN to TMAX
TMIN to TMAX
3
5
5
5
15
10
20
2
2
5
30
10
25
µA
µA
µA
µA
±15 V
±15 V
0.75
0.5
1.5
0.75
0.75
0.5
1.5
0.75
MΩ
MΩ
±5 V
0.25
0.4
0.125
0.4
MΩ
±5 V
±15 V
56
60
60
66
1
50
56
3
60
66
1
3
dB
dB
µA/V
70
0.3
0.4
2
2
70
0.3
0.4
2
2
dB
µA/V
µA/V
Rev. G | Page 3 of 20
60
60
AD811
Data Sheet
Parameter
INPUT VOLTAGE NOISE
Conditions
f = 1 kHz
INPUT CURRENT NOISE
f = 1 kHz
VS
OUTPUT CHARACTERISTICS
Voltage Swing, Useful Operating
Range5
Output Current
Short-Circuit Current
Output Resistance
INPUT CHARACTERISTIC
+Input Resistance
−Input Resistance
Input Capacitance
Common-Mode Voltage Range
AD811S2
Min
Typ
Max
1.9
Unit
20
20
nV/√Hz
pA/√Hz
±5 V
±2.9
±2.9
V
±15 V
±12
100
150
9
±12
100
150
9
V
mA
mA
Ω
1.5
14
7.5
±3
±13
1.5
14
7.5
±3
±13
MΩ
Ω
pF
V
V
TJ = 25°C
(Open Loop at 5 MHz)
+Input
±5 V
±15 V
POWER SUPPLY
Operating Range
Quiescent Current
TRANSISTOR COUNT
AD811J/AD811A1
Min Typ
Max
1.9
±4.5
±5 V
±15 V
Number of Transistors
The AD811JR is specified with ±5 V power supplies only, with operation up to ±12 V.
See the Analog Devices military data sheet for 883B tested specifications.
3
FPBW = slew rate/(2 π VPEAK).
4
Output power level, tested at a closed-loop gain of two.
5
Useful operating range is defined as the output voltage at which linearity begins to degrade.
1
2
Rev. G | Page 4 of 20
14.5
16.5
40
±18
16.0
18.0
±4.5
14.5
16.5
40
±18
16.0
18.0
V
mA
mA
Data Sheet
AD811
ABSOLUTE MAXIMUM RATINGS
MAXIMUM POWER DISSIPATION
Table 2.
Rating
±18 V
±12 V
Observe Derating Curves
θJA = 90°C/ W
θJA = 110°C/W
θJA = 155°C/W
θJA = 85°C/W
θJA = 70°C/W
Observe Derating Curves
±VS
±6 V
−65°C to +150°C
−65°C to +125°C
0°C to +70°C
−40°C to +85°C
−55°C to +125°C
300°C
The maximum power that can be safely dissipated by the AD811 is
limited by the associated rise in junction temperature. For the
plastic packages, the maximum safe junction temperature is 145°C.
For the CERDIP and LCC packages, the maximum junction temperature is 175°C. If these maximums are exceeded momentarily,
proper circuit operation is restored as soon as the die temperature is reduced. Leaving the device in the overheated condition
for an extended period can result in device burnout. To ensure
proper operation, it is important to observe the derating curves
in Figure 21 and Figure 24.
While the AD811 is internally short-circuit protected, this may
not be sufficient to guarantee that the maximum junction temperature is not exceeded under all conditions. An important
example is when the amplifier is driving a reverse-terminated
75 Ω cable and the cable’s far end is shorted to a power supply.
With power supplies of ±12 V (or less) at an ambient temperature
of +25°C or less, and the cable shorted to a supply rail, the
amplifier is not destroyed, even if this condition persists for
an extended period.
METALIZATION PHOTOGRAPH
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Contact the factory for the latest dimensions.
V+
7
VOUT
6
0.0618
(1.57)
3 AD811
+INPUT
–INPUT 2
4
V–
0.098 (2.49)
Figure 4. Metalization Photograph
Dimensions Shown in Inches and (Millimeters)
ESD CAUTION
Rev. G | Page 5 of 20
00866-E-007
Parameter
Supply Voltage
AD811JR Grade Only
Internal Power Dissipation
8-Lead PDIP Package
8-Lead CERDIP Package
8-Lead SOIC_N Package
16-Lead SOIC_W Package
20-Lead LCC Package
Output Short-Circuit Duration
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range (Q, E)
Storage Temperature Range (N, R)
Operating Temperature Range
AD811J
AD811A
AD811S
Lead Temperature Range
(Soldering 60 sec)
AD811
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0.06
0.12
0.05
0.10
0.09
0.04
0.08
PHASE
0.03
0.06
0.02
0.04
GAIN
0.01
30
VS = ±15V
25
20
15
10
VS = ±5V
5
0
5
6
7
8
9
10
11
12
13
14
15
SUPPLY VOLTAGE (±V)
0
10
10k
Figure 8. Output Voltage Swing vs. Resistive Load
12
10
VS = ±15V
6
VS = ±5V
3
0
–3
1
10
100
FREQUENCY (MHz)
NONINVERTING INPUT
±5 TO ±15V
0
VS = ±5V
–5
INVERTING INPUT
–10
VS = ±15V
–15
–20
–25
–30
–60
00866-E-006
–6
5
–40
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE (°C)
00866-E-010
MASTER CLOCK FREQUENCY (MHz)
G = +2
RL = 150Ω
RG = RFB
9
Figure 9. Input Bias Current vs. Junction Temperature
Figure 6. Frequency Response
20
MAGNITUDE OF THE OUTPUT VOLTAGE (±V)
20
TA = 25°C
15
10
0
0
5
10
15
20
SUPPLY VOLTAGE (±V)
00866-E-008
5
TA = 25°C
15
RL = 150Ω
10
NO LOAD
5
0
0
5
10
15
SUPPLY VOLTAGE (±V)
Figure 10. Output Voltage Swing vs. Supply Voltage
Figure 7. Input Common-Mode Voltage Range vs. Supply Voltage
Rev. G | Page 6 of 20
20
00866-E-011
GAIN (dB)
1k
LOAD RESISTANCE (Ω)
Figure 5. Differential Gain and Phase
COMMON-MODE VOLTAGE RANGE (±V)
100
00866-E-009
0.02
0
00866-E-005
DIFFERENTIAL GAIN (%)
0.08
35
OUTPUT VOLTAGE (V p-p)
0.07
0.20
RF = 649Ω
0.18
FC = 3.58MHz
100 IRE
MODULATED RAMP 0.16
RL = 150Ω
0.14
DIFFERENTIAL PHASE (DEGREES)
0.10
Data Sheet
AD811
CLOSED-LOOP OUTPUT RESISTANCE (Ω)
10
VS = ±15V
15
12
VS = ±5V
9
6
3
–60
–40
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE (°C)
1
VS = ±15V
VS = ±5V
0.1
GAIN = –2
RFB = 649Ω
0.01
10k
100k
1M
00866-E-015
18
00866-E-012
QUIESCENT SUPPLY CURRENT (mA)
21
100M
10M
FREQUENCY (Hz)
Figure 11. Quiescent Supply Current vs. Junction Temperature
Figure 14. Closed-Loop Output Resistance vs. Frequency
10
10
100
6
RISE TIME
8
60
VS = ±5V
2
0
VS = ±15V
–2
VS = ±15V
VO = 1V p-p
RL = 150Ω
GAIN = +2
6
OVERSHOOT
40
4
20
2
0
OVERSHOOT (%)
4
RISE TIME (ns)
INPUT OFFSET VOLTAGE (mV)
8
–4
–6
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE (°C)
0
0.4
00866-E-013
–40
0.8
1.2
1.0
–20
1.6
1.4
VALUE OF FEEDBACK RESISTOR [RFB] (kΩ)
Figure 12. Input Offset Voltage vs. Junction Temperature
Figure 15. Rise Time and Overshoot vs. Value of Feedback Resistor, RFB
250
2.0
VS = ±15V
150
VS = ±5V
100
50
–60
–40
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE (°C)
VS = ±15V
RL = 200Ω
VOUT = ±10V
1.5
1.0
VS = ±5V
RL = 150Ω
VOUT = ±2.5V
0.5
0
–60
–40
–20
0
20
40
60
80
100
120
JUNCTION TEMPERATURE (°C)
Figure 16. Transresistance vs. Junction Temperature
Figure 13. Short-Circuit Current vs. Junction Temperature
Rev. G | Page 7 of 20
140
00866-E-017
TRANSRESISTANCE (MΩ)
200
00866-E-014
SHORT-CIRCUIT CURRENT (mA)
0.6
00866-E-016
–8
–10
–60
AD811
Data Sheet
100
100
80
RF = 649Ω
AV = +2
INVERTING CURRENT VS = ±5V TO ±15V
10
10
VS = ±5V
60
PSRR (dB)
NONINVERTING CURRENT VS = ±5V TO ±15V
NOISE CURRENT (pA/ Hz)
NOISE VOLTAGE (nV/ Hz)
70
50
VS = ±15V
40
CURVES ARE FOR WORST
CASE CONDITION WHERE
ONE SUPPLY IS VARIED
WHILE THE OTHER IS
HELD CONSTANT.
30
20
VOLTAGE NOISE VS = ±15V
10
100
1
100k
10k
1k
FREQUENCY (Hz)
5
00866-E-018
1
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 17. Input Noise vs. Frequency
00866-E-021
10
VOLTAGE NOISE VS = ±5V
Figure 20. Power Supply Rejection Ration vs. Frequency
200
10
2.5
TJ MAX = –145°C
120
6
4
80
PEAKING
2
40
0
0.4
0.6
0.8
1.2
1.0
1.4
0
1.6
VALUE OF FEEDBACK RESISTOR [RFB] (kΩ)
Figure 18. −3 dB Bandwidth and Peaking vs. Value of RFB
2.0
8-LEAD PDIP
1.5
1.0
8-LEAD SOIC
0.5
–50 –40 –30 –20 –10
0
20
30
40
50
60
70
80
90
Figure 21. Maximum Power Dissipation vs. Temperature for Plastic Packages
25
110
649Ω
VIN
649Ω
VS = ±15V
VOUT
20
OUTPUT VOLTAGE (V p-p)
100
90
150Ω
150Ω
80
70
VS = ±15V
60
VS = ±5V
50
15
GAIN = +10
OUTPUT LEVEL
FOR 3% THD
10
5
VS = ±5V
30
1k
10k
100k
1M
10M
FREQUENCY (Hz)
0
100k
1M
10M
FREQUENCY (Hz)
Figure 22. Large Signal Frequency Response
Figure 19. Common-Mode Rejection Ratio vs. Frequency
Rev. G | Page 8 of 20
100M
00866-E-023
40
00866-E-020
CMRR (dB)
10
AMBIENT TEMPERATURE (°C)
00866-E-022
VS = ±15V
VO = 1V p-p
RL = 150Ω
GAIN = +2
00866-E-019
–3dB BANDWIDTH (MHz)
BANDWIDTH
PEAKING (dB)
8
160
TOTAL POWER DISSIPATION (W)
16-LEAD SOIC
Data Sheet
AD811
HARMONIC DISTORTION (dBc)
–50
±5V SUPPLIES
RL = 100Ω
VOUT = 2V p-p
GAIN = +2
1V
10ns
100
�–70
SECOND HARMONIC
VIN
90
–90
THIRD HARMONIC
VOUT 10
±15V SUPPLIES
–110
0%
SECOND
HARMONIC
1V
10k
1M
100k
10M
FREQUENCY (Hz)
00866-E-024
1k
00866-E-027
THIRD HARMONIC
–130
Figure 26. Small Signal Pulse Response, Gain = +1
Figure 23. Harmonic Distortion vs. Frequency
3.4
TJ MAX = –175°C
3.2
100mV
2.8
10ns
100
VIN
2.6
90
2.4
20-LEAD LCC
2.2
2.0
1.8
1.6
8-LEAD CERDIP
1.4
VOUT 10
1.2
0%
1.0
0.8
1V
–40
–20
0
20
40
60
80
100
120
140
AMBIENT TEMPERATURE (°C)
00866-E-025
0.4
–60
00866-E-028
0.6
Figure 27. Small Signal Pulse Response, Gain = +10
Figure 24. Maximum Power Dissipation vs.
Temperature for Hermetic Packages
9
+VS
7
AD811
VIN
3 +
6
4
VS = ±15V
RFB = 750Ω
0
–3
RL
VS = ±5V
RFB = 619Ω
–6
HP8130
50Ω
PULSE
GENERATOR
0.1µF
–VS
–9
–12
1
10
100
FREQUENCY (MHz)
Figure 28. Closed-Loop Gain vs. Frequency, Gain = +1
Figure 25. Noninverting Amplifier Connection
Rev. G | Page 9 of 20
00866-E-029
2 –
VOUT TO
TEKTRONIX
P6201 FET
PROBE
GAIN (dB)
3
0.1µF
RG
G = +1
RL = 150Ω
RG = ∞
6
RFB
00866-026
TOTAL POWER DISSIPATION (W)
3.0
AD811
Data Sheet
26
1V
G = +1
RL = 150Ω
23
VIN
VS = ±15V
RFB = 511Ω
20
GAIN (dB)
10ns
100
90
17
VS = ±5V
RFB = 442Ω
14
VOUT 10
0%
11
100
10
FREQUENCY (MHz)
00866-E-030
1
00866-E-033
1V
8
Figure 32. Small Signal Pulse Response, Gain = −1
Figure 29. Closed-Loop Gain vs. Frequency, Gain = +10
1V
100mV
20ns
100
100
VIN
90
90
VOUT 10
VOUT 10
0%
0%
1V
00866-E-031
00866-E-034
10V
Figure 30. Large Signal Pulse Response, Gain = +10
Figure 33. Small Signal Pulse Response, Gain = −10
6
RFB
+VS
RG
7
2
HP8130
PULSE
GENERATOR
–
AD811
3
+
VOUT TO
TEKTRONIX
P6201 FET
PROBE
6
4
VS = ±15V
RFB = 590Ω
0
GAIN (dB)
0.1µF
RL
–3
VS = ±5V
RFB = 562Ω
–6
–9
0.1µF
–VS
00866-E-032
VIN
G = –1
RL = 150Ω
3
Figure 31. Inverting Amplifier Connection
–12
1
10
100
FREQUENCY (MHz)
Figure 34. Closed-Loop Gain vs. Frequency, Gain = −1
Rev. G | Page 10 of 20
00866-E-035
VIN
10ns
Data Sheet
AD811
26
1V
G = –1
RL = 150Ω
23
VIN
VS = ±15V
RFB = 511Ω
20
90
17
VS = ±5V
RFB = 442Ω
14
VOUT 10
0%
11
1
10
100
FREQUENCY (MHz)
00866-E-037
10V
8
00866-E-036
GAIN (dB)
20ns
100
Figure 35. Closed-Loop Gain vs. Frequency, Gain = −10
Figure 36. Large Signal Pulse Response, Gain = −10
Rev. G | Page 11 of 20
AD811
Data Sheet
APPLICATIONS INFORMATION
GENERAL DESIGN CONSIDERATIONS
The AD811 is a current feedback amplifier optimized for use in
high performance video and data acquisition applications.
Because it uses a current feedback architecture, its closed-loop
−3 dB bandwidth is dependent on the magnitude of the
feedback resistor. The desired closed-loop gain and bandwidth
are obtained by varying the feedback resistor (RFB) to tune the
bandwidth and by varying the gain resistor (RG) to obtain the
correct gain. Table 3 contains recommended resistor values for
a variety of useful closed-loop gains and supply voltages.
Table 3. −3 dB Bandwidth vs. Closed-Loop Gain and
Resistance Values
VS = ±15 V
Closed-Loop Gain
+1
+2
+10
−1
−10
VS = ±5 V
Closed-Loop Gain
+1
+2
+10
−1
−10
VS = ±10 V
Closed-Loop Gain
+1
+2
+10
−1
−10
RFB
750 Ω
649 Ω
511 Ω
590 Ω
511 Ω
RFB
619 Ω
562 Ω
442 Ω
562 Ω
442 Ω
RFB
649 Ω
590 Ω
499 Ω
590 Ω
499 Ω
RG
649 Ω
56.2 Ω
590 Ω
51.1 Ω
RG
562 Ω
48.7 Ω
562 Ω
44.2 Ω
RG
590 Ω
49.9 Ω
590 Ω
49.9 Ω
−3 dB BW (MHz)
140
120
100
115
95
ACHIEVING THE FLATTEST GAIN RESPONSE AT
HIGH FREQUENCY
Achieving and maintaining gain flatness of better than 0.1 dB at
frequencies above 10 MHz requires careful consideration of
several issues.
Choice of Feedback and Gain Resistors
Because of the previously mentioned relationship between the
3 dB bandwidth and the feedback resistor, the fine scale gain
flatness varies, to some extent, with feedback resistor tolerance.
Therefore, it is recommended that resistors with a 1% tolerance
be used if it is desired to maintain flatness over a wide range of
production lots. In addition, resistors of different construction
have different associated parasitic capacitance and inductance.
Metal film resistors were used for the bulk of the characterization for this data sheet. It is possible that values other than
those indicated are optimal for other resistor types.
Printed Circuit Board Layout Considerations
As is expected for a wideband amplifier, PC board parasitics can
affect the overall closed-loop performance. Of concern are stray
capacitances at the output and the inverting input nodes. If a
ground plane is used on the same side of the board as the signal
traces, a space (3/16" is plenty) should be left around the signal
lines to minimize coupling. Additionally, signal lines connecting
the feedback and gain resistors should be short enough so that
their associated inductance does not cause high frequency gain
errors. Line lengths less than 1/4" are recommended.
−3 dB BW (MHz)
80
80
65
75
65
Quality of Coaxial Cable
−3 dB BW (MHz)
105
105
80
105
80
Figure 17 and Figure 18 illustrate the relationship between the
feedback resistor and the frequency and time domain response
characteristics for a closed-loop gain of +2. (The response at
other gains is similar.)
The 3 dB bandwidth is somewhat dependent on the power
supply voltage. As the supply voltage is decreased, for example,
the magnitude of the internal junction capacitances is increased,
causing a reduction in closed-loop bandwidth. To compensate
for this, smaller values of feedback resistor are used at lower
supply voltages.
Optimum flatness when driving a coax cable is possible only
when the driven cable is terminated at each end with a resistor
matching its characteristic impedance. If the coax is ideal, then
the resulting flatness is not affected by the length of the cable.
While outstanding results can be achieved using inexpensive
cables, note that some variation in flatness due to varying cable
lengths may occur.
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1 µF) are required to provide the best
settling time and lowest distortion. Although the recommended
0.1 µF power supply bypass capacitors are sufficient in many
applications, more elaborate bypassing (such as using two
paralleled capacitors) may be required in some cases.
Rev. G | Page 12 of 20
Data Sheet
AD811
Driving Capacitive Loads
100
80
RFB
+VS
0.1µF
7
2
–
RS (OPTIONAL)
AD811
VOUT
6
VIN
3
+
RL
CL
4
RT
00866-E-038
0.1µF
–VS
VALUE OF RS (Ω)
70
60
50
40
30
20
10
0
10
1000
Figure 39. Recommended Value of Series Resistor vs.
the Amount of Capacitive Load
Figure 39 shows recommended resistor values for different load
capacitances. Refer again to Figure 38 for an example of the
results of this method. Note that it may be necessary to adjust
the gain setting resistor, RG, to correct for the attenuation which
results due to the divider formed by the series resistor, RS, and
the load resistance.
Applications that require driving a large load capacitance at a
high slew rate are often limited by the output current available
from the driving amplifier. For example, an amplifier limited to
25 mA output current cannot drive a 500 pF load at a slew rate
greater than 50 V/µs. However, because of the 100 mA output
current of the AD811, a slew rate of 200 V/µs is achievable
when driving the same 500 pF capacitor, as shown in Figure 40.
2V
Figure 37. Recommended Connection for Driving a Large Capacitive Load
100ns
100
VIN
12
100
LOAD CAPACITANCE (pF)
00866-E-040
There are at least two very effective ways to compensate for this
effect. One way is to increase the magnitude of the feedback
resistor, which lowers the 3 dB frequency. The other method is
to include a small resistor in series with the output of the amplifier to isolate it from the load capacitance. The results of these
two techniques are illustrated in Figure 38. Using a 1.5 kΩ
feedback resistor, the output ripple is less than 0.5 dB when
driving 100 pF. The main disadvantage of this method is that it
sacrifices a little bit of gain flatness for increased capacitive load
drive capability. With the second method, using a series resistor,
the loss of flatness does not occur.
RG
GAIN = +2
VS = ±15V
RS VALUE SPECIFIED
IS FOR FLATTEST
FREQUENCY RESPONSE
90
The feedback and gain resistor values in Table 3 result in very
flat closed-loop responses in applications where the load
capacitances are below 10 pF. Capacitances greater than this
result in increased peaking and overshoot, although not
necessarily in a sustained oscillation.
90
9
RFB = 1.5kΩ
RS = 0
VOUT 10
RFB = 649Ω
RS = 30Ω
3
0%
VS = ±15V
CL = 100pF
RL = 10kΩ
GAIN = +2
5V
00866-E-041
0
–3
–6
1
10
100
FREQUENCY (MHz)
00866-E-039
GAIN (dB)
6
Figure 38. Performance Comparison of Two Methods
for Driving a Capacitive Load
Rev. G | Page 13 of 20
Figure 40. Output Waveform of an AD811 Driving a 500 pF Load.
Gain = +2, RFB = 649 Ω, RS = 15 Ω, RS = 10 kΩ
AD811
Data Sheet
OPERATION AS A VIDEO LINE DRIVER
1V
The AD811 has been designed to offer outstanding performance
at closed-loop gains of +1 or greater, while driving multiple
reverse-terminated video loads. The lowest differential gain and
phase errors are obtained when using ±15 V power supplies.
With ±12 V supplies, there is an insignificant increase in these
errors and a slight improvement in gain flatness. Due to power
dissipation considerations, ±12 V supplies are recommended
for optimum video performance. Excellent performance can be
achieved at much lower supplies as well.
100
VIN
0%
1V
VOUT No. 1
75Ω
+VS
75Ω
00866-E-044
0.08
0.1µF
–
0.04
a. DRIVING A SINGLE, BACKTERMINATED, 75Ω COAX CABLE
b. DRIVING TWO PARALLEL, BACKTERMINATED, COAX CABLES
0.03
b
a
0
VOUT No. 2
6
75Ω
75Ω CABLE
+
0.05
0.01
75Ω CABLE
3
0.06
0.02
7
AD811
VIN
0.07
5
4
8
9
10
11
12
13
14
15
Figure 44. Differential Gain Error vs. Supply Voltage for
the Video Line Driver of Figure 41
0.20
00866-E-042
0.1µF
Figure 41. A Video Line Driver Operating at a Gain of +2
12
G = +2
RL = 150Ω
RG = RFB
VS = ±15V
RFB = 649Ω
6
VS = ±5V
RFB = 562Ω
3
RF = 649Ω
FC = 3.58MHz
100 IRE
MODULATED RAMP
0.18
DIFFERENTIAL PHASE (DEGREES)
–VS
0.16
0.14
b
0.12
0.10
a. DRIVING A SINGLE, BACKTERMINATED, 75Ω COAX CABLE
b. DRIVING TWO PARALLEL, BACKTERMINATED, COAX CABLES
0.08
a
0.06
0.04
0.02
0
5
6
7
8
9
10
11
12
13
14
15
0
SUPPLY VOLTAGE (V)
Figure 45. Differential Phase Error vs. Supply Voltage for
the Video Line Driver of Figure 41
–3
–6
1
10
100
FREQUENCY (MHz)
00866-E-043
GAIN (dB)
7
SUPPLY VOLTAGE (V)
75Ω
9
6
75Ω
Figure 42. Closed-Loop Gain vs. Frequency, Gain = +2
Rev. G | Page 14 of 20
00866-E-046
2
RF = 649Ω
FC = 3.58MHz
100 IRE
MODULATED RAMP
0.09
00866-E-045
649Ω
Figure 43. Small Signal Pulse Response, Gain = +2, VS = ±15 V
0.10
DIFFERENTIAL GAIN (%)
649Ω
75Ω CABLE
90
VOUT 10
The closed-loop gain versus the frequency at different supply
voltages is shown in Figure 42. Figure 43 is an oscilloscope
photograph of an AD811 line driver’s pulse response with
±15 V supplies. The differential gain and phase error versus the
supply are plotted in Figure 44 and Figure 45, respectively.
Another important consideration when driving multiple cables
is the high frequency isolation between the outputs of the
cables. Due to its low output impedance, the AD811 achieves
better than 40 dB of output-to-output isolation at 5 MHz
driving back-terminated 75 Ω cables.
10ns
Data Sheet
AD811
AN 80 MHZ VOLTAGE-CONTROLLED AMPLIFIER
CIRCUIT
The voltage-controlled amplifier (VCA) circuit of Figure 46 shows
the AD811 being used with the AD834, a 500 MHz, 4-quadrant
multiplier. The AD834 multiplies the signal input by the dc control
voltage, VG. The AD834 outputs are in the form of differential
currents from a pair of open collectors, ensuring that the full
bandwidth of the multiplier (which exceeds 500 MHz) is
available for certain applications. Here, the AD811 op amp
provides a buffered, single-ended, ground-referenced output.
Using feedback resistors R8 and R9 of 511 Ω, the overall gain
ranges from −70 dB for VG = 0 V to +12 V (a numerical gain of
+4) when VG = 1 V. The overall transfer function of the VCA is
VOUT = 4 (X1 − X2)(Y1 − Y2), which reduces to VOUT = 4 VG VIN
using the labeling conventions shown in Figure 46. The circuit’s
−3 dB bandwidth of 80 MHz is maintained essentially constant—
that is, independent of gain. The response can be maintained
flat to within ±0.1 dB from dc to 40 MHz at full gain with the
addition of an optional capacitor of about 0.3 pF across the
feedback resistor R8. The circuit produces a full-scale output of
±4 V for a ±1 V input and can drive a reverse-terminated load
of 50 Ω or 75 Ω to ±2 V.
The gain can be increased to 20 dB (×10) by raising R8 and R9
to 1.27 kΩ, with a corresponding decrease in −3 dB bandwidth
to approximately 25 MHz. The maximum output voltage under
these conditions is increased to ±9 V using ±12 V supplies.
The gain-control input voltage, VG, may be a positive or negative
ground-referenced voltage, or fully differential, depending on
the choice of connections at Pin 7 and Pin 8. A positive value of
VG results in an overall noninverting response. Reversing the sign
of VG simply causes the sign of the overall response to invert. In
fact, although this circuit has been classified as a voltage-controlled
amplifier, it is also quite useful as a general-purpose, four-quadrant
multiplier, with good load driving capabilities and fully
symmetrical responses from the X and Y inputs.
The AD811 and AD834 can both be operated from power supply
voltages of ±5 V. While it is not necessary to power them from
the same supplies, the common-mode voltage at W1 and W2
must be biased within the common-mode range of the input
stage of the AD811. To achieve the lowest differential gain and
phase errors, it is recommended that the AD811 be operated
from power supply voltages of ±10 V or greater. This VCA
circuit operates from a ±12 V dual power supply.
FB
+12V
C1
0.1F
+
VG
R1 100
R8*
–
R2 100
8
7
X2
X1 +VS
6
5
W1
R4
182
R6
294
7
2 –
U1
AD834
U3
AD811
3 +
Y1
Y2
–VS
1
2
3
W2
4
R5
182
VOUT
6
4
R7
294
RL
VIN
R9*
R3
249
C2
0.1F
*R8 = R9 = 511 FOR 4 GAIN
R8 = R9 = 1.27k FOR 10 GAIN
Figure 46. An 80 MHz Voltage-Controlled Amplifier
Rev. G | Page 15 of 20
–12V
00866-E-047
FB
AD811
Data Sheet
A VIDEO KEYER CIRCUIT
By using two AD834 multipliers, an AD811, and a 1 V dc source,
a special form of a two-input VCA circuit called a video keyer
can be assembled. Keying is the term used in reference to blending
two or more video sources under the control of a third signal or
signals to create such special effects as dissolves and overlays.
The circuit shown in Figure 47 is a two-input keyer, with video
inputs VA and VB, and a control input VG. The transfer function
(with VOUT at the load) is given by
VOUT = GVA + (1 − G)VB
where G is a dimensionless variable (actually, just the gain of the
A signal path) that ranges from 0 when VG = 0 to 1 when VG =
1 V. Thus, VOUT varies continuously between VA and VB as G
varies from 0 to 1.
Circuit operation is straightforward. Consider first the signal path
through U1, which handles video input VA. Its gain is clearly 0
when VG = 0, and the scaling chosen ensures that it has a unity
value when VG = 1 V; this takes care of the first term of the transfer
function. On the other hand, the VG input to U2 is taken to the
R7
45.3Ω
VG
The bias currents required at the output of the multipliers are
provided by R8 and R9. A dc level-shifting network comprising
R10/R12 and R11/R13 ensures that the input nodes of the
AD811 are positioned at a voltage within its common-mode
range. At high frequencies, C1 and C2 bypass R10 and R11,
respectively. R14 is included to lower the HF loop gain and is
needed because the voltage-to-current conversion in the
AD834s, via the Y2 inputs, results in an effective value of the
feedback resistance of 250 Ω; this is only about half the value
required for optimum flatness in the AD811’s response. (Note
that this resistance is unaffected by G: when G = +1, all the
feedback is via U1, while when G = 0 it is all via U2). R14
reduces the fractional amount of output current from the
multipliers into the current-summing inverting input of the
AD811 by sharing it with R8. This resistor can be used to adjust
the bandwidth and damping factor to best suit the application.
C1
0.1µF
+5V
R5
113Ω
inverting input X2 while X1 is biased at an accurate 1 V. Thus,
when VG = 0, the response to video input VB is already at its
full-scale value of unity, whereas when VG = 1 V, the differential
input X1 − X2 is 0. This generates the second term.
R14
SEE TEXT
SETUP FOR DRIVING
REVERSE-TERMINATED LOAD
R10
2.49kΩ
R6
226Ω
(0 TO +1V dc)
VOUT
ZO
TO PIN 6
AD811
ZO
200Ω
TO Y2
8
7
6
X2
X1 +VS
5
200Ω
W1
+5V
R1
1.87kΩ
R8
29.4Ω
U1
AD834
U4
AD589
INSET
R12
6.98kΩ
+5V
R2
174Ω
Y1
Y2
–VS
1
2
3
W2
4
FB
VA (±1V FS)
–5V
R3
100Ω
C3
0.1µF
–5V
+5V
LOAD
GND
7
R4
1.02kΩ
8
7
X2
X1 +VS
6
5
R9
29.4Ω
U3
AD811
R13
6.98kΩ
W1
3
VB (±1V FS)
Y2
–VS
1
2
3
+
4
C2
0.1µF
U1
AD834
Y1
–
4
R11
2.49kΩ
–5V
Figure 47. A Practical Video Keyer Circuit
Rev. G | Page 16 of 20
VOUT
C4
0.1µF
LOAD
GND
FB
W2
6
–5V
00866-E-048
2
Data Sheet
AD811
10
R14 = 49.9Ω
0
GAIN
–10
Figure 48 is a plot of the ac response of the feedback keyer when
driving a reverse-terminated 50 Ω cable. Output noise and
adjacent channel feedthrough, with either channel fully off and
the other fully on, is about −50 dB to 10 MHz. The feedthrough
at 100 MHz is limited primarily by board layout. For VG = 1 V,
the −3 dB bandwidth is 15 MHz when using a 137 Ω resistor for
Rev. G | Page 17 of 20
R14 = 137Ω
–20
–30
–40
–50
–60
ADJACENT CHANNEL
FEEDTHROUGH
–70
–80
–90
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 48. A Plot of the AC Response of the Video Keyer
00866-E-049
In this case, an arrangement is shown using dual supplies of ±5 V
for both the AD834 and the AD811. Also, the overall gain is
arranged to be unity at the load when it is driven from a reverseterminated 75 Ω line. This means that the dual VCA has to operate
at a maximum gain of +2, rather than +4 as in the VCA circuit
of Figure 46. However, this cannot be achieved by lowering the
feedback resistor because below a critical value (not much less
than 500 Ω) the peaking of the AD811 may be unacceptable.
This is because the dominant pole in the open-loop ac response
of a current feedback amplifier is controlled by this feedback
resistor. It would be possible to operate at a gain of ×4 and then
attenuate the signal at the output. Instead, the signals have been
attenuated by 6 dB at the input to the AD811; this is the
function of R8 through R11.
R14 and 70 MHz with R14 = 49.9 Ω. For more information on
the design and operation of the VCA and video keyer circuits,
refer to the AN-216 Application Note, Video VCAs and Keyers:
Using the AD834 and AD811 by Brunner, Clarke, and Gilbert,
available on the Analog Devices, Inc. website at www.analog.com.
CLOSED-LOOP GAIN (dB)
To generate the 1 V dc needed for the 1 − G term, an AD589
reference supplies 1.225 V ± 25 mV to a voltage divider consisting
of resistors R2 through R4. Potentiometer R3 should be adjusted
to provide exactly 1 V at the X1 input.
AD811
Data Sheet
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
4
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 49. 8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
0.005 (0.13)
MIN
8
0.055 (1.40)
MAX
5
0.310 (7.87)
0.220 (5.59)
1
4
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
SEATING
PLANE
15°
0°
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 50. 8-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
Rev. G | Page 18 of 20
070606-A
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
Data Sheet
AD811
5.00 (0.1968)
4.80 (0.1890)
1
5
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 51. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
0.200 (5.08)
REF
0.100 (2.54) REF
0.015 (0.38)
MIN
0.075 (1.91)
REF
0.095 (2.41)
0.075 (1.90)
19
18
0.358 (9.09)
0.342 (8.69)
SQ
0.358
(9.09)
MAX
SQ
0.088 (2.24)
0.054 (1.37)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.055 (1.40)
0.045 (1.14)
3
20
4
0.028 (0.71)
0.022 (0.56)
1
BOTTOM
VIEW
0.050 (1.27)
BSC
8
14
13
9
45° TYP
0.150 (3.81)
BSC
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 52. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20-1)
Dimensions shown in inches and (millimeters)
Rev. G | Page 19 of 20
022106-A
0.100 (2.54)
0.064 (1.63)
AD811
Data Sheet
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
45°
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
8°
0°
0.33 (0.0130)
0.20 (0.0079)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
03-27-2007-B
1
Figure 53. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body (RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
AD811ANZ
AD811AR-16
AD811ARZ-16
AD811ARZ-16-REEL
AD811ARZ-16-REEL7
AD811JR-EBZ
AD811JRZ
AD811JRZ-REEL7
AD811SQ/883B
AD811SE/883B
AD811ACHIPS
AD811SCHIPS
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
0°C to +70°C
0°C to +70°C
−55°C to +125°C
−55°C to +125°C
−40°C to +85°C
−55°C to +125°C
Package Description
8-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
8-Lead SOIC Evaluation Board
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Ceramic Dual In-Line Package [CERDIP]
20-Terminal Ceramic Leadless Chip Carrier [LCC]
Z = RoHS Compliant Part.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00866-0-4/15(G)
Rev. G | Page 20 of 20
Package Option
N-8
RW-16
RW-16
RW-16
RW-16
R-8
R-8
Q-8
E-20-1
DIE
DIE