e ADVANCED LINEAR DEVICES, INC. TM EPAD EN ® AB LE D ALD310700A/ALD310700 PRECISION P-CHANNEL EPAD® MOSFET ARRAY VGS(th)= 0.00V QUAD ZERO THRESHOLD™ MATCHED PAIR APPLICATIONS GENERAL DESCRIPTION ALD310700A/ALD310700 high precision monolithic quad P-Channel MOSFET arrays are matched at the factory using ALD's proven EPAD® CMOS technology. This device is available in a quad version and is a member of the EPAD ® Matched Pair MOSFET Family. The ALD310700A/ALD310700 is a P-channel version of the popular ALD110800A/ALD110800 Precision Threshold device. Together, these two MOSFET series enable complementary precision N-Channel and PChannel MOSFET array based circuits. Intended for low voltage and low power small signal applications, the ALD310700A/ALD310700 features precision 0.00V Zero Threshold Voltage, which enables circuit designs with very low operating voltages such as < +0.5V power supplies where the circuits operate below the threshold voltage of the ALD310700A/ALD310700. This feature also enhances input/output signal operating ranges, especially in very low operating voltage environments. With these low threshold precision devices, a circuit with multiple cascading stages can be constructed to operate at extremely low supply or bias voltage levels. ALD310700A/ ALD310700 also features high input impedance (2.5 x 1010Ω) and high DC current gain (>108). ALD310700A/ALD310700 MOSFETs are designed for exceptional matching of device electrical characteristics. The Gate Threshold Voltage VGS(th) is set precisely at 0.00V +/-0.02V, featuring a typical offset voltage of only +/-0.001V (1mV). As these devices are on the same monolithic chip, they also exhibit excellent temperature tracking characteristics. They are versatile design components for a broad range of precision analog applications such as basic building blocks for current mirrors, matching circuits, current sources, differential amplifier input stages, transmission gates, and multiplexers. These devices also excel in limited operating voltage applications such as very low level precision voltage-clamps. In addition to matched pair electrical characteristics, each individual MOSFET exhibits individual well controlled manufacturing characteristics, enabling the user to depend on tight design limits from different production batches. (Continued on next page) BLOCK DIAGRAM • • • • • • • • • • • • • • • • 0.5% precision current mirrors and current sources Low Tempco (<= 50ppm/°C) current mirrors/sources Energy harvesting circuits Very low voltage analog and digital circuits Backup battery circuits & power failure detectors Precision low level voltage-clamps Low level zero-crossing detector Source followers and buffers Precision capacitive probes and sensor interfaces Precision charge detectors and charge integrators Discrete differential amplifier input stage Peak-detectors and level-shifters High-side switches and Sample-and-Hold switches Precision current multipliers Discrete analog switches / multiplexers Discrete voltage comparators FEATURES & BENEFITS • Precision matched Gate Threshold Voltages • Precision offset voltages (VOS): ALD310700A: 2mV max. ALD310700: 10mV max. • Sub-threshold voltage operation • Low min. operating voltage of less than 0.2V • Ultra low min. operating current of less than 1nA • Nano-power operation • Wide dynamic operating current ranges • Exponential operating current ranges • Matched transconductance and output conductance • Matched and tracked temperature characteristics • Tight lot-to-lot parametric control • Positive, zero, and negative VGS(th) tempco bias currents • Low input capacitance • Low input/output leakage currents PIN CONFIGURATION ALD310700 V- (5) DP1 (2) DP2 (15) GP1 (3) ~ IC1* DP4 (6) DP3 (11) GP2 (14) GP3 (10) GP4 (7) IC1 (1) IC2 (16) + SP1 (4) V (12) SP2 (13) SP3 (9) V- V+ (12) SP4 (8) V- ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS)) Operating Temperature Range * 0°C to +70°C 16-Pin SOIC Package ALD310700ASCL ALD310700SCL 16-Pin Plastic Dip Package ALD310700APCL ALD310700PCL 1 M1 16 IC2* 15 DP2 M2 DP1 2 GP1 3 14 GP2 SP1 4 13 SP2 V- 5 12 V+ DP4 6 11 DP3 GP4 7 10 GP3 SP4 8 9 SP3 M4 M3 SCL, PCL PACKAGES *IC pins are internally connected, connect to V- *Contact factory for industrial temp. range or user-specified threshold voltage values. ©2017 Advanced Linear Devices, Inc., Vers. 1.1 www.aldinc.com 1 of 9 GENERAL DESCRIPTION (cont.) or below the Gate Threshold Voltage (subthreshold region). Second, the circuit can be biased and operated in the subthreshold region with nA of bias current and nW of power dissipation. These devices are built to offer minimum offset voltage and differential thermal response, and they can also be used for switching and amplifying applications in -0.40V to -8.0V (+/-0.20V to +/-4.0V) powered systems where low input bias current, low input capacitance, and fast switching speed are desired. These devices, exhibiting well controlled turn-off and sub-threshold characteristics, operate the same as standard enhancement mode P-Channel MOSFETs. However, the precision of the Gate Threshold Voltage enable two key additional characteristics, or operating features. First, the operating current level varies exponentially with gate bias voltage at For most general applications, connect the V+ pin to the most positive voltage and the V- and IC (internally-connected) pins to the most negative voltage in the system. All other pins must have voltages within these voltage limits at all times. Standard ESD protection facilities and procedures for static sensitive devices are required when handling these devices. ABSOLUTE MAXIMUM RATINGS Drain-Source voltage, VDS -8.0V Gate-Source voltage, VGS -8.0V Operating Current 80mA Power dissipation 500mW Operating temperature range SCL, PCL 0°C to +70°C Storage temperature range -65°C to +150°C Lead temperature, 10 seconds +260°C CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. OPERATING ELECTRICAL CHARACTERISTICS V+ = +5V V- = GND TA = 25°C unless otherwise specified ALD310700A Parameter Symbol Min Gate Threshold Voltage VGS(th) -0.02 Offset Voltage VOS Gate Threshold Temperature TCVGS(th) Drain Source On Current IDS(ON) Transconductance Current2 GFS Transconductance Mismatch Typ ALD310700 Max 0.00 0.02 1 2 Min Typ Max -0.02 0.00 0.02 2 10 Unit Test Conditions V IDS = -1µA, VDS = -0.1V mV VGS(th)M1 - VGS(th)M2 or VGS(th)M3 - VGS(th)M4 -2 -2 -2.07 -2.07 570 570 ∆GFS 1 1 Output Conductance2 GOS 48 Drain Source On Resistance RDS(ON) Drain Source On Resistance Mismatch ∆RDS(ON) Drain Source Breakdown BVDSX Drain Source Leakage Current1 IDS (OFF) 400 400 pA Gate Leakage Current IGSS 200 200 pA Input Capacitance 2 CISS Notes: 1 2 mV/°C mA VGS = VDS = -5.0V µA/V VGS = VDS = -5.0V % VGS = VDS = -5.0V 48 µA/V VGS(th) = -4.0V, VDS = -5.0V 1.1 1.1 KΩ VGS = -5.0V, VDS = -0.1V 1 1 -8.0 % -8.0 2.5 V 2.5 pF Consists of junction leakage currents Sample tested parameters ALD310700A/ALD310700, Vers. 1.1 Advanced Linear Devices, Inc. 2 of 9 TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT CHARACTERISTICS -2500 V- = -5.0V TA = +25°C -2000 VGS = VGS(th) - 5V VGS = VGS(th) - 4V -1500 VGS = VGS(th) - 3V -1000 VGS = VGS(th) - 2V -500 VGS = VGS(th) - 1V -2500 DRAIN SOURCE ON CURRENT IDS(ON) (µA) DRAIN SOURCE ON CURRENT IDS(ON) (µA) OUTPUT CHARACTERISTICS VGS = VGS(th) - 4V -25°C -1500 -45°C -1000 -3 -2 -1 -4 0 -5 -2 -3 -4 -5 FORWARD TRANSFER CHARACTERISTICS (SUBTHRESHOLD) -70 100000 VDS = -0.1V V+ = 0V V- = -5V TA = +25°C -60 -50 -40 -30 ALD310700 -20 ALD310702 ALD310704 -10 ALD310708 DRAIN SOURCE ON CURRENT IDS(ON) (nA) DRAIN SOURCE ON CURRENT IDS(ON) (µA) FORWARD TRANSFER CHARACTERISTICS 10000 ALD310700 1000 ALD310702 ALD310704 100 ALD310708 10 VDS = -0.1V V+ = 0V V- = -5V TA = +25°C 1 0.1 0.01 0 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -2.5 1.0 -3.0 LOW VOLTAGE OUTPUT CHARACTERISTICS -1.0 -1.5 -2.0 -2.5 -3.0 -2V 100 VGS - VGS(th) = -1V -100 -200 -300 -400 -500 -2500 DRAIN SOURCE ON CURRENT IDS(ON) (µA) -3V 0 -0.5 DRAIN SOURCE ON CURRENT vs. GATE AND DRAIN SOURCE VOLTAGE -5V -4V V+ = 0V V- = -5V TA = +25°C 0.0 0.5 GATE SOURCE VOLTAGE - VGS (V) GATE SOURCE VOLTAGE - VGS (V) DRAIN SOURCE ON CURRENT IDS(ON) (µA) -1 DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) 300 +125°C 0 0 200 +85°C +70°C -500 0 500 400 +25°C 0°C -2000 V- = -5V TA = +25°C -2000 ALD310700 -1500 ALD310702 -1000 ALD310704 ALD310708 -500 0 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0 DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) ALD310700A/ALD310700, Vers. 1.1 Advanced Linear Devices, Inc. -1 -2 -3 -4 -5 GATE AND DRAIN SOURCE VOLTAGE VGS = VDS (V) 3 of 9 TYPICAL PERFORMANCE CHARACTERISTICS (cont.) FORWARD TRANSFER CHARACTERISTICS EXPANDED (SUBTHRESHOLD) 100000 DRAIN SOURCE ON CURRENT IDS(ON) (nA) DRAIN SOURCE ON CURRENT IDS(ON) (µA) 100 FORWARD TRANSFER CHARACTERISTICS FURTHER EXPANDED (SUBTHRESHOLD) 10 1 ALD310700 0.1 ALD310702 ALD310704 0.01 ALD310708 0.001 VDS = -5.0V V+ = 0V V- = -5V TA = +25°C 0.0001 0.00001 VDS = -5V TA = +25°C 10000 1000 100 10 1 0.1 0.01 0.000001 1.0 0.0 0.5 -0.5 -1.0 -2.0 -1.5 0.6 GATE SOURCE VOLTAGE - VGS (V) 0.4 0.2 0.1 0.0 -0.2 -0.1 GATE THRESHOLD VOLTAGE vs. V- VOLTAGE 0.2 VDS = -0.1V V- = -5V TA = +25°C -1.5 GATE THRESHOLD VOLTAGE VGS(th) (V) -2.0 ALD310708 ALD310704 -1.0 ALD310702 -0.5 ALD310700 0 VDS = -0.1V V+ = 0V TA = +25°C 0 h) 0: V GS(t 1070 ALD3 -0.2 h) 2: V GS(t 1070 ALD3 -0.4 00V = -0.2 )= : V GS(th 10704 ALD3 0V = 0.00 V -0.400 -0.6 -0.8 )= : V GS(th 10708 ALD3 V -0.800 -1.0 0 3 2 1 4 5 6 7 0 8 -1 -2 SUBSTRATE BIAS - V+ (V) -3 -4 -5 -6 -8 -7 V- VOLTAGE (V) GATE THRESHOLD VOLTAGE vs. DRAIN SOURCE VOLTAGE GATE THRESHOLD VOLTAGE vs. AMBIENT TEMPERATURE 1.0 -1.0 GATE THRESHOLD VOLTAGE VGS(th) (V) GATE THRESHOLD VOLTAGE VGS(th) (V) 0.3 GATE SOURCE OVERDRIVE VOLTAGE VGS - VGS(th) (V) GATE THRESHOLD VOLTAGE vs. SUBSTRATE BIAS GATE THRESHOLD VOLTAGE VGS(th) (V) 0.5 V- = -5V TA = +25°C 0.5 ALD310700 0 ALD310702 ALD310704 -0.5 ALD310708 ALD31070 8 -0.5 ALD31070 4 ALD31070 2 0 ALD31070 0 VDS = -0.1V V+ = 0V V- = -5V 0.5 1.0 -1.0 0 -1 -2 -3 -4 -5 -50 DRAIN SOURCE VOLTAGE - VDS (V) ALD310700A/ALD310700, Vers. 1.1 Advanced Linear Devices, Inc. -25 0 +25 +50 +75 +100 +125 AMBIENT TEMPERATURE - TA (°C) 4 of 9 TYPICAL PERFORMANCE CHARACTERISTICS (cont.) TRANSCONDUCTANCE vs. AMBIENT TEMPERATURE TRANSCONDUCTANCE vs. GATE THRESHOLD VOLTAGE 1000 TRANSCONDUCTANCE GFS (µA/V) TRANSCONDUCTANCE GFS (µA/V) 1000 750 VGS = VGS(th) - 4.0V VDS = -5.0V 500 VGS = VGS(th) - 1.0V VDS = -5.0V 250 VGS = VGS(th) - 0.5V VDS = -5.0V 0 -50 750 VGS = VGS(th) - 4.0V VDS = -5.0V 500 VGS = VGS(th) - 1.0V VDS = -5.0V 250 VGS = VGS(th) - 0.5V VDS = -5.0V 0 +25 0 -25 V+ = 0V V- = -5V TA = +25°C +50 +75 +100 0.2 +125 AMBIENT TEMPERATURE - TA (°C) -0.6 -0.8 -1.0 OUTPUT CONDUCTANCE vs. AMBIENT TEMPERATURE 70 800 OUTPUT CONDUCTANCE GDS (µA/V) 700 TRANSCONDUCTANCE GFS (µA/V) -0.4 GATE THRESHOLD VOLTAGE - VGS(th) (V) TRANSCONDUCTANCE vs. GATE SOURCE OVERVOLTAGE VDS = -0.1V V+ = 0V V- = -5V 600 500 400 300 200 100 0 VGS = VGS(th) - 4.0V VDS = -5.0V 60 50 40 30 VGS = VGS(th) - 1.0V VDS = -5.0V 20 VGS = VGS(th) - 0.5V VDS = -5.0V 10 0 1.0 -1.0 0.0 -.2.0 -3.0 -4.0 -5.0 -50 -25 0 +25 +50 +75 +100 +125 GATE SOURCE OVERVOLTAGE - VGS-VGS(th) (V) AMBIENT TEMPERATURE - TA (°C) OUTPUT CONDUCTANCE vs. DRAIN SOURCE ON VOLTAGE ZERO TEMPERATURE COEFFICIENT (ZTC) -60 DRAIN SOURCE ON CURRENT IDS(ON) (µA) 1000 OUTPUT CONDUCTANCE GDS (µA/V) -0.2 0 800 VGS(th) - 4.0V 600 400 VGS(th) - 1.0V 200 VGS(th) - 0.5V -45°C -50 VDS = -0.1V V+ = 0V V- = -5V -40 0°C +25°C -30 -20 +125°C +85°C -10 0 0 0 -1 -2 -3 -4 -5 0.4 DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) ALD310700A/ALD310700, Vers. 1.1 Advanced Linear Devices, Inc. 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 GATE SOURCE OVERDRIVE VOLTAGE VGS - VGS(th) (V) 5 of 9 TYPICAL APPLICATIONS LOW VOLTAGE CURRENT SOURCE MIRROR LOW VOLTAGE CURRENT SOURCE W/ GATE CONTROL V+ = +1.0V to +5.0V V+ M3 ISET V+ = +1.0V to +5.0V 1/2 ALD310700 1/2 ALD310700 M4 M3 M4 RSET ISET I SOURCE M1 M2 ISOURCE RSET Digital Logic Control of Current Source ON ISOURCE = ISET V+ - Vt = RSET M1 OFF 1/2 ALD1108xx, 1/2 ALD2108xx, ALD1109xx or ALD2129xx M1, M2: N-Channel MOSFET M3, M4: P-Channel MOSFET 1/4 ALD1108xx, 1/4 ALD2108xx, 1/2 ALD1109xx or 1/2 ALD2129xx M1 : N-Channel MOSFET M3, M4: P-Channel MOSFET LOW VOLTAGE DIFFERENTIAL AMPLIFIER V+ = +5.0V 1/2 ALD310700 PMOS PAIR M3 M4 VOUT M1 M2 NMOS PAIR VIN+ 1/2 ALD1108xx, 1/2 ALD2108xx, ALD1109xx or ALD2129xx VIN- Current Source M1, M2: N-Channel MOSFET M3, M4: P-Channel MOSFET 0.5% PRECISION LOW VOLTAGE CURRENT SOURCE MULTIPLICATION V+ = +1.0V to +5.0V V+ = +1.0V to +5.0V A ISET ISOURCE = ISET . X RSET ALD310700 MPSET MNSET MN1 MN2 MN3 ALD1108xx or ALD2108xx A MNSET: MN1, MN2..MNX: N-Channel MOSFET ALD310700A/ALD310700, Vers. 1.1 MP1 MNX MP2 MP3 MPY ISOURCE = ISET . X . Y MPSET: MP1, MP2..MPY: P-Channel MOSFET Advanced Linear Devices, Inc. 6 of 9 TYPICAL APPLICATIONS (cont.) 0.5% LOW VOLTAGE PRECISION CURRENT MIRRORS V+ = +1.0V to +5.0V V+ = +1.0V to +5.0V RSET ISET 1/2 ALD310700 ISOURCE M2 M3 M1 M4 I SOURCE ISOURCE = ISET = ISET 1/2 ALD1108xx, 1/2 ALD2108xx, ALD1109xx or ALD2129xx V+ - Vt RSET RSET ISOURCE = ISET = V+ - Vt RSET 1.5KΩ < RSET < 5.0MΩ M1, M2: N-Channel MOSFET M3, M4: P-Channel MOSFET 0.5% PRECISION LOW VOLTAGE CASCODE CURRENT SOURCES V+ = +0.5V to +5.0V MPA2 MPA1 MPA3 MPA4 ALD310700 MPB2 MPB1 MPB3 MPB4 ALD310700 ISET RSET ISOURCE ISOURCE = 3 . ISET = 3 - 2Vt ( VR+SET ) MPA1...MPA4: ALD310700 P-Channel MOSFET (1st individual pkg) MPB1...MPB4: ALD310700 P-Channel MOSFET (2nd individual pkg) 0.5% PRECISION LOW TEMPCO CASCODE CURRENT SOURCES V+ = +3.0V to +5.0V V+ = +1.0V to +1.5V ALD310700 ISET RSET ISOURCE M4 M1 M2 M4 M3 M3 M2 M1 ISET ISOURCE RSET ALD1108xx or ALD2108xx ISOURCE = ISET = V+ - 2Vt RSET Temperature stable <= 100ppm/°C when ISET = 57µA. M1, M2, M3, M4: N-Channel MOSFET ALD310700A/ALD310700, Vers. 1.1 M1, M2, M3, M4: P-Channel MOSFET Advanced Linear Devices, Inc. 7 of 9 SOIC-16 PACKAGE DRAWING 16 Pin Plastic SOIC Package E Millimeters Dim S (45°) D A Min 1.35 Max 1.75 Min 0.053 Max 0.069 A1 0.10 0.25 0.004 0.010 b 0.35 0.45 0.014 0.018 C 0.18 0.25 0.007 0.010 D-16 9.80 10.00 0.385 0.394 E 3.50 4.05 0.140 0.160 1.27 BSC e e Inches 0.050 BSC H 5.70 6.30 0.224 0.248 L 0.60 0.937 0.024 0.037 A ø 0° 8° 0° 8° A1 S 0.25 0.50 0.010 0.020 b S (45°) H L ALD310700A/ALD310700, Vers. 1.1 C ø Advanced Linear Devices, Inc. 8 of 9 PDIP-16 PACKAGE DRAWING 16 Pin Plastic DIP Package E E1 Millimeters Dim D S A2 A1 e b A L Inches A Min 3.81 Max 5.08 Min 0.105 Max 0.200 A1 0.38 1.27 0.015 0.050 A2 1.27 2.03 0.050 0.080 b 0.89 1.65 0.035 0.065 b1 0.38 0.51 0.015 0.020 c 0.20 0.30 0.008 0.012 D-16 18.93 21.33 0.745 0.840 E 5.59 7.11 0.220 0.280 E1 7.62 8.26 0.300 0.325 e 2.29 2.79 0.090 0.110 e1 L 7.37 7.87 0.290 0.310 2.79 3.81 0.110 0.150 S-16 0.38 1.52 0.015 0.060 ø 0° 15° 0° 15° b1 c e1 ø ALD310700A/ALD310700, Vers. 1.1 Advanced Linear Devices, Inc. 9 of 9