Panasonic AN5819K Sound multiplex demodulator ic for tv in the north american market Datasheet

ICs for TV
AN5819K
Sound multiplex demodulator IC for TV in the North American market
■ Overview
■ Features
• Stereo demodulation, SAP demodulation and dbx noise
reduction are integrated into a single chip
• Enabling various kinds of adjustment and mode
changeover thanks to I2C bus
• Built-in input volume (I2C control) for interface with
intermediate frequency processing IC
0.5±0.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1.778
26.7±0.3
The AN5819K is a single chip IC, which includes a
sound multiplex demodulator for Zenith TV system and
the dbx TV sound noise reduction function.
0.9±0.25
Unit: mm
1.05±0.25
3.05±0.25
8.4±0.3
4.8±0.25
+0.1
■ Applications
3° to 15°
• TV and VCR for the North American market
(A licensing agreement with THAT Corporation is necessary in order to use this IC with built-in dbx-TV noise
reduction function.)
10.16±0.25
0.3 –0.05
SDIP028-P-0400B
11
75 µs
de-emph.
L+R
filter
L−R
demod.
L−R
filter
SAP
filter
SAP
demod.
SAP out
filter
Noise
filter
SAP
noise
det.
SAP
Stereo
4
SDA
3
SCL
1 I2C
GND
dbx
de-emph. 2
dbx
wide band
Wide band
filter
dbx
spectral
Spectral
filter
22
23
20
19
dbx
de-emph. 1
24
16
15
27
(L−R)/SAP
switch
28
14
13
2
18
V-reg.
I-reg.
9
LED
driver
I2C
decoder
L+R
demod.
Input
VCA
5
R-out
Matrix
St.PLL
Stereo
filter
MPX in 12
25
L-out
Pilot det.
26
17
10
6
7
GND
21
8
VCC 9 V
■ Block Diagram
1
AN5819K
ICs for TV
■ Pin Descriptions
Pin No.
Description
1
I2C
2
Pin No.
GND
Description
15
(L−R)/SAP demodulation output
SDA
16
dbx input
3
SCL
17
(L+R) demodulation output offset cancel
4
SAP LED
18
Spectral level adjustment
5
Stereo LED
19
Spectral timing
6
Pilot signal detection
20
Spectral level sensor input
7
Stereo PLL filter
21
GND
8
VCC
22
Wide band level sensor input
9
SAP trap filter
23
Wide band timing
10
Quasi sine-wave filter
24
dbx offset cancel
11
Stereo filter offset cancel
25
R output
12
Composite input
26
L output
13
dbx timing current
27
SAP carrier detection
14
Reference voltage source filter
28
SAP noise level detection
■ Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
VCC
11.0
V
ICC
75
mA
ILED
10
mA
PD
1 143
mW
Topr
−20 to +75
°C
Tstg
−55 to +150
°C
Supply voltage
Supply current
LED drive current
*3
Power dissipation
*2
Operating ambient temperature
Storage temperature
*1
*1
Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
*2: Power dissipation shown is for the IC package in free air at Ta = 70°C
*3: LED drive currents are the currents flowing into pin 4 and pin 5.
■ Recommended Operating Range
Parameter
Supply voltage
2
Symbol
Range
Unit
VCC
8.5 to 9.5
V
ICs for TV
AN5819K
■ Electrical Characteristics at VCC = 9.0 V, Ta = 25°C
• Stereo PLL VCO adjustment: 15.734 kHz ± 50 Hz
• Input level (at 100% modulation)
L+R: 0.424 V[p-p] (pre-emphasis off)
L−R: 0.848 V[p-p] (dbx noise reduction off)
Pilot: 0.084 V[p-p]
SAP: 0.254 V[p-p] (dbx noise reduction off)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
No signal
35
55
75
mA
580 mV[rms]
Total circuit current
ICC
Mono output level
V0(MON)
f = 1 kHz, (mono) 100%mod.
480
530
Mono frequency characteristics-1 V1(MON)
f = 300 Hz, (mono) 30%mod.
− 0.5
0
+0.5
dB
Mono frequency characteristics-2 V2(MON)
f = 8 kHz, (mono) 30%mod.
−1.5
− 0.4
+0.4
dB
Mono distortion ratio
THD(MON)
f = 1 kHz, (mono) 100%mod.


0.7
%
Mono noise level
VN(MON)
Input short-circuit, BPF (A curve)


−60
dBV
+0.5
dB
(L), (R) output voltage difference VLR(MON)
f = 1 kHz, (mono) 100%mod.
− 0.5
0
Stereo output level
V0(ST)
f = 1 kHz, (L(R)-only) 100%mod.
420
520
Stereo frequency characteristics-1 V1(ST)
f = 300 Hz, (L(R)-only) 30%mod.
− 0.7
0
+0.7
dB
Stereo frequency characteristics-2 V2(ST)
f = 3 kHz, (L(R)-only) 30%mod.
−1
0
+1
dB
Stereo frequency characteristics-3 V3(ST)
f = 8 kHz, (L(R)-only) 30%mod.
−2.5
− 0.5
+1.5
dB
Stereo distortion ratio
f = 1 kHz, (L(R)-only) 100%mod.


1
%
THD(ST)
620 mV[rms]
Stereo noise level
VN(ST)
f = 15.73 kHz, (fH), V= 0.084 V[p-p], BPF


−60
dBV
Stereo discrimination level
VTH(ST)
f = 15.73 kHz (fH)
9
17
26
mV[rms]
Stereo discrimination hysteresis VHY(ST)
f = 15.73 kHz (fH)
−6

− 0.5
dB
SAP output level
V0(SAP)
f = 1 kHz, (SAP) 100%mod.
350
500
700 mV[rms]
SAP frequency characteristics-1 V1(SAP)
f = 300 Hz, (SAP) 30%mod.
−1.0
0
+1.0
dB
SAP frequency characteristics-2 V2(SAP)
f = 3 kHz, (SAP) 30%mod.
−3
−1.5
+0.5
dB
SAP distortion ratio
f = 1 kHz, (SAP) 100%


1.5
%
THD(SAP)
SAP noise level
VN(SAP)
f = 78.7 kHz, (5fH),V= 0.42 V[p-p], BPF


−65
dBV
SAP discrimination level
VTH(SAP)
f = 78.7 kHz, (5fH)
22

53
mV[rms]
SAP discrimination hysteresis
VHY(SAP)
f = 78.7 kHz, (5fH)
−4

− 0.5
dB
SAP → Stereo crosstalk
CT1
(SAP) 1 kHz, 100%mod.
(Stereo) pilot-signal


−50
dB
Stereo → SAP crosstalk
CT2
(Stereo) 1 kHz, 100%mod.
(SAP) carrier-signal


−50
dB
VTH(NOI)
Pin 27: f = 240 kHz at 5 V applied
38

84
mV[rms]
Noise discrimination hysteresis VHY(NOI)
Pin 27: f = 240 kHz at 5 V applied
−5.5

− 0.3
dB
Noise discrimination level
3
AN5819K
ICs for TV
■ Electrical Characteristics at VCC = 9.0 V, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Sink current at ACK
IACK
Maximum pin-2 sink current at ACK
2.0
10
20
mA
SCL, SDA signal input high level
VIHI

3.5

5.0
V
SCL, SDA signal input low level
VILO

0

0.9
V
Input available maximum frequency
fIMAX



100
kbit/s
I2C
interface
• Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Stereo separation (30%)-1
Sep30-1
f = 300 Hz, (L(R)-only) 30%mod.
22
30

dB
Stereo separation (30%)-2
Sep30-2
f = 1 kHz, (L(R)-only) 30%mod.
22
30

dB
Stereo separation (30%)-3
Sep30-3
f = 3 kHz, (L(R)-only) 30%mod.
22
30

dB
Stereo separation (30%)-4
Sep30-4
f = 8 kHz, (L(R)-only) 30%mod.
12
18

dB
Stereo separation (100%)-1
Sep100-1
f = 300 Hz, (L(R)-only) 100%mod.
20
30

dB
Stereo separation (100%)-2
Sep100-2
f = 1 kHz, (L(R)-only) 100%mod.
20
25

dB
Stereo separation (100%)-3
Sep100-3
f = 3 kHz, (L(R)-only) 100%mod.
20
30

dB
Stereo separation (100%)-4
Sep100-4
f = 8 kHz, (L(R)-only) 100%mod.
8
11

dB
Stereo separation (10%)-1
Sep10-1
f = 300 Hz, (L(R)-only) 10%mod.
20
30

dB
Stereo separation (10%)-2
Sep10-2
f = 1 kHz, (L(R)-only) 10%mod.
20
30

dB
Stereo separation (10%)-3
Sep10-3
f = 3 kHz, (L(R)-only) 10%mod.
20
30

dB
Stereo separation (10%)-4
Sep10-4
f = 8 kHz, (L(R)-only) 10%mod.
12
18

dB
SAP → Mono crosstalk
CT3
(SAP) 1 kHz, 100%mod.
(Mono)1 kHz, 0%mod.


−53
dB
Mono → SAP crosstalk
CT4
(SAP) 1 kHz, 0%mod.
(Mono) 1 kHz, 100%mod.


−56
dB
I2C interface
tBUF

4.0


µs
Start condition set-up time
tSU.STA

4.0


µs
Start condition hold time
tHD.STA

4.0


µs
Low period SCL, SDA
tLO

4.0


µs
High period SCL
tHI

4.0


µs
Rise time SCL, SDA
tr



1.0
µs
Fall time SCL, SDA
tf



0.35
µs
Data set-up time (write)
tSU.DAT

0.25


µs
Data hold time (write)
tHD.DAT

0


µs
Bus free before start
4
ICs for TV
AN5819K
■ Electrical Characteristics at VCC = 9.0 V, Ta = 25°C (continued)
• Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Acknowledge set-up time
tSU.ACK



3.5
µs
Acknowledge hold time
tHD.ACK

0


µs
Stop condition set-up time
tSU.STO

4.0


µs
L6
1LSB = (data (max.)−data (00))/63
0.1
1.0
1.9
LSB
Step
I2C
interface (continued)
DAC
6-bit DAC DNLE
• DAC timing chart
Start
condition
Slave
address
Sub
address
ACK
ACK
Data
byte
Stop
ACK condition
SDA
tBUF
tSU.DAT
tLO
tSU.STO
tHD.DAT
SCL
tSU.STA
tHD.STA
tr
tf
tHI
tLO
■ Terminal Equivalent Circuits
Pin No.
Equivalent circuit
1

Description
2
100 kΩ
VDD
5V
Voltage (V)
I2C
GND:
• I2C bus DAC GND pin
0
SDA:
• I2C bus data input pin

SCL:
• I2C bus clock input pin

1 kΩ
2
2.5 V
500 Ω
GND
3
100 kΩ
3
VDD
5V
1 kΩ
2.5 V
500 Ω
GND
5
AN5819K
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
4
Description
VCC
4
Voltage (V)
SAP LED:
• SAP LED connection pin

Stereo LED:
• Stereo LED connection pin

3 kΩ
35 kΩ
GND
5
VCC
5
3 kΩ
35 kΩ
GND
6
VCC
6
Pilot signal detection:
• Stereo pilot signal detection pin
VCC
2
Stereo PLL filter:
• Stereo PLL low-pass filter connection pin
2.8
VCC:
• VCC pin
VCC
SAP trap filter:
• SAP trap filter
VCC
2
18 kΩ
VCC
2
GND
7
VCC
7
6 kΩ
28 kΩ
GND

8
9
VCC
9
100 Ω
VCC
2
GND
6
ICs for TV
AN5819K
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
10
VCC
Voltage (V)
Quasi sine-wave filter:
• Low-pass filter pin in quasi-sine
wave circuit
VCC
2
Stereo filter offset cancel:
• Offset cancel pin for stereo filter
output
VCC
2
Composite input:
• Composite signal input pin
VCC
2
dbx timing current:
• Timing current setting pin for dbx
RMS detection
1.3
Reference:
• Reference power supply stabilization
pin
VCC
2
10
13.5 kΩ
VCC
2
GND
11
VCC
11
10 kΩ
VCC
2
GND
12
VCC
12
50 kΩ
VCC
2
GND
13
VCC
13
220 Ω
25 kΩ
3.9 V
GND
14
VCC
45 kΩ
14
220 Ω
45 kΩ
GND
7
AN5819K
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
15
VCC
(L-R)/SAP demodulation output:
• (L-R)/SAP demodulation signal
output pin
Voltage (V)
VCC
− 0.7
2
15
VCC
2
GND
16
VCC
dbx input:
• Input signal of (L-R)/SAP
signal to dbx NR
VCC
2
(L+R) demodulation output offset cancel:
• (L+R) demodulation signal offset
cancel pin
VCC
2
Spectral level adjustment:
• Variable emphasis level adjustment
pin
VCC
2
Spectral timing:
• RMS detection recovery time setting
pin for variable emphasis
0.2
16
50 kΩ
VCC
2
GND
17
VCC
17
10 kΩ
VCC
2
GND
18
VCC
18
360 Ω
18 kΩ
VCC
2
GND
19
7.5 µA
VCC
19
15 µA
GND
8
ICs for TV
AN5819K
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
20
VCC
Description
Voltage (V)
Spectral level sensor input:
• RMS detection circuit input pin for
variable emphasis
VCC
2
3.1 kΩ
20
VCC
2
GND

21
GND:
• GND pin
22
VCC
22
0
Wideband level sensor input:
• RMS detection circuit input pin for
wide band expander
VCC
2
Wideband timing:
• RMS detection recovery time setting
pin for wide band expander
0.2
dbx offset cancel:
• dbx NR output offset cancel pin
VCC
2
R output:
• R line-out output pin
VCC
2
4 kΩ
VCC
2
GND
23
7.5 µA
VCC
23
15 µA
GND
24
VCC
24
10 kΩ
VCC
2
GND
25
VCC
50 Ω
25
GND
9
AN5819K
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
26
VCC
Voltage (V)
L output:
• L line-out output pin
VCC
2
SAP carrier detection:
• SAP signal carrier level detection
pin
VCC
2
SAP noise level setting:
• Noise detection pin for SAP malfunction prevention circuit (Mute
SAP demodulation at detecting
noise)
VCC
2
50 Ω
26
GND
27
VCC
27
20 kΩ
VCC
2
GND
28
VCC
a
28
10
11 µA
SW
b
V28>V27
V28<V27
SW
a
b
Pin 27
8.9 kΩ
VCC
2
GND
ICs for TV
AN5819K
Pilot det.
11
L+R
demod.
L+R
filter
L−R
demod.
L−R
filter
SAP
demod.
Noise
filter
SAP
noise
det.
SAP out
filter
(L−R)/SAP
switch
27
13
91 kΩ
(allowance: ±1%)
14
4.7 µF
28
10 µF
0.0047 µF
470 µH
9
V-reg.
I-reg.
SAP
Stereo
4
2
3
SDA
SCL
1
I2C GND
dbx
de-emph. 2
dbx
wide band
Wide band
filter
dbx
spectral
Spectral
filter
dbx
de-emph. 1
22
1 µF
23
20 10 µF
0.1 µF
19
18 3.3 µF
0.022 µF
24
4.7 µF
16
SAP
filter
75 µs
de-emph.
15
Input
VCA
1 mH
MPX in
12
0.01 µF
4.7 µF
I2 C
decoder
St. PLL
Stereo
filter
LED
driver
4.7 µF
2.2 µF
4.7 µF
Matrix
5
26 4.7 µF
L-out
25 4.7 µF
R-out
17 4.7 µF
6 4.7 µF
10 0.0033 µF
0.68 µF
7 6.8 kΩ 0.33 µF
8
21
GND
VCC 9 V
■ Application Circuit Example
11
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