ASM1816 Low Power, 3.3 V/3.0 V, mP Reset, Active LOW, Open-Drain Output Description Set−top Boxes Cellular Phones PDAs Energy Management Systems Embedded Control Systems Printers Single Board Computers © Semiconductor Components Industries, LLC, 2011 August, 2011 − Rev. 3 1 RESET 3 GND SOT−23 (Top View) 1 2 3 (Top View) 1 2 3 RESET VCC GND 20 mA Maximum (5.5 V) 15 mA Maximum (3.6 V) Automatically Restarts a Microprocessor after Power Failure 150 ms Reset Delay after VCC Returns to an In−tolerance Condition Active LOW Power−up Reset Precision Temperature−compensated Voltage Reference and Comparator Eliminates External Components TO−92 and Compact Surface Mount SOT−23 Package Operating Temperature −40°C to +85°C Applications • • • • • • • TO−92 3 LEAD CASE 29−11 PIN CONFIGURATIONS VCC • Low Supply Current • • • SOT−23 3 LEAD CASE 527AG 2 Features • • • • http://onsemi.com ASM1816−R The ASM1816 is a voltage supervisory device with low−power, 3.3 V/3 V mP Reset, active LOW, open−drain output. Maximum supply current over temperature is a low 15 mA (at 3.6 V). The ASM1816 generates an active LOW reset signal whenever the monitored supply is out of tolerance. A precision reference and comparator circuit monitor power supply (VCC) level. Tolerance level options are 5%, 10%, 15% and 20%. When an out−of−tolerance condition is detected, an internal power−fail signal is generated which forces an active LOW reset signal. After VCC returns to an in−tolerance condition, the reset signal remains active for 150 ms to allow the power supply and system microprocessor to stabilize. The ASM1816 is designed with a open−drain output stage and operates over the extended industrial temperature range. Devices are available in TO−92 and compact surface mount SOT−23 packages. Other low power products in this family include the ASM1810/11/12/15/17, ASM1233D and ASM1233M. TO−92 ASM1816 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. 1 Publication Order Number: ASM1816/D ASM1816 Figure 1. Typical Application Figure 2. Block Diagram Table 1. PIN DESCRIPTION TO−92 SOT−23 Pin # Pin # Pin Name Description 1 1 RESET Active LOW reset output 2 2 VCC Power supply input 3 3 GND Ground http://onsemi.com 2 ASM1816 Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Min Max Unit Voltage on VCC (Note 1) −0.5 7 V Voltage on RESET (Note 1) −0.5 VCC + 0.5 V Operating Temperature Range −40 +85 °C +260 °C +125 °C HBM 2 KV MM 200 V Soldering Temperature (for 10 sec) Storage Temperature ESD rating −55 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Voltages are measured with respect to ground. Table 3. DC ELECTRICAL CHARACTERISTICS (Unless otherwise noted, VCC = 1.2 V to 5.5 V and specifications are over the operating temperature range of −40°C to +85°C. All voltages are referenced to ground.) Parameter Symbol Conditions Min Typ Unit 5.5 V Supply Voltage VCC Output Current IOL Output = 0.4 V, VCC > 2.7 V Operating Current ICC VCC < 5.5 V, RESET output open 8 20 VCC ≤ 3.6 V, RESET output open 6 15 VCC Trip Point Internal Pull−up Resistor VCCTP 1.2 Max COUT VCC Detect to RESET Low tRPD mA mA V ASM1816R−5 2.98 3.06 3.15 ASM1816R−10 2.80 2.88 2.97 ASM1816R−15 2.635 2.72 2.805 ASM1816R−20 2.47 2.55 2.64 3.5 5.5 7.5 KW 10 pF 5 ms RP Output Capacitance 10 2 VCC Slew Rate (VCCTP (MAX) to VCCTP (MIN) tF (Note 2) 300 ms VCC Slew Rate (VCCTP (MIN) to VCCTP (MAX) tR 0 ns VCC Detect to RESET High tRPU tr = 5 ms 100 150 2. The tF value is for reference in defining values for tRPD and should not be considered for proper operation or use. http://onsemi.com 3 250 ms ASM1816 Application Information Operation − Power Monitor detected, the RESET signal is asserted. On power−up, RESET is kept active (LOW) for approximately 150 ms after the power supply voltage has reached the selected tolerance. This allows the power supply and microprocessor to stabilize before RESET is released. The ASM1816 detects out−of−tolerance power supply conditions. It resets a processor during power−up, power down and issues a reset to the system processor when the monitored power supply voltage is below the reset threshold. When an out−of−tolerance VCC voltage is Figure 3. Timing Diagram: Power−Up Figure 4. Timing Diagram: Power−Down Table 4. FAMILY SELECTION GUIDE Part # RESET Voltage (V) RESET Time (ms) Output Stage RESET Polarity ASM1810 4.620, 4.370, 4.120 ASM1811 4.620, 4.350, 4.130 150 Push−Pull LOW 150 Open−Drain LOW ASM1812 4.620, 4.350, 4.130 150 Push−Pull HIGH ASM1815 3.060, 2.880, 2.550 150 Push−Pull LOW ASM1816 3.060, 2.720, 2.880, 2.550 150 Open−Drain LOW ASM1817 3.060, 2.880, 2.550 150 Push−Pull HIGH ASM1233D 4.625, 4.375, 4.125 350 Open−Drain LOW ASM1233M 4.625, 4.375, 2.720 350 Open−Drain LOW http://onsemi.com 4 ASM1816 PACKAGE DIMENSIONS SOT−23, 3 Lead CASE 527AG−01 ISSUE O MIN SYMBOL D 3 E1 1 E 2 e e1 A 0.89 1.12 0.013 0.10 b 0.37 0.50 c 0.085 0.18 D 2.80 3.04 E 2.10 2.64 E1 1.20 1.40 e 0.95 BSC e1 1.90 BSC L 0.40 REF 0.54 REF 0º θ A MAX A1 L1 TOP VIEW NOM 8º q b L1 A1 SIDE VIEW L END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC TO-236. http://onsemi.com 5 c ASM1816 PACKAGE DIMENSIONS TO−92 (TO−226) CASE 29−11 ISSUE AM A B STRAIGHT LEAD BULK PACK R P L SEATING PLANE K D X X G J H V C N 1 SECTION X−X N http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. DIM A B C D G H J K L N P R V INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --0.250 --0.080 0.105 --0.100 0.115 --0.135 --- MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --6.35 --2.04 2.66 --2.54 2.93 --3.43 --- ASM1816 Table 5. RESET Output Voltage RESET Tolerance RESET Time Open Drain Output (Note 4) RESET Polarity Package Package Marking (Note 5) ASM1233D−L−5 (ASM1233A−5) 3.06 5% 350 ms ♦ LOW 3L TO−92 ASM1233D−L−5 ASM1233D−L−10 (ASM1233A−10) 2.88 10% 350 ms ♦ LOW 3L TO−92 ASM1233D−L−10 ASM1233D−L−15 (ASM1233A−15) 2.72 15% 350 ms ♦ LOW 3L TO−92 ASM1233D−L−15 ASM1233D−LZ−5 (ASM1233AZ−5) 3.06 5% 350 ms ♦ LOW 4L SOT−223 RVLL ASM1233D−LZ−10 (ASM1233AZ−10) 2.88 10% 350 ms ♦ LOW 4L SOT−223 RWLL ASM1233D−LZ−15 (ASM1233AZ−15) 2.72 15% 350 ms ♦ LOW 4L SOT−223 RXLL ASM1233D−5 4.625 5% 350 ms ♦ LOW 3L TO−92 ASM1233D−5 ASM1233D−10 4.375 10% 350 ms ♦ LOW 3L TO−92 ASM1233D−10 Part Number (Note 3) TIN − LEAD DEVICES ASM1233D−15 4.125 15% 350 ms ♦ LOW 3L TO−92 ASM1233D−15 ASM1233DZ−5 4.625 5% 350 ms ♦ LOW 4L SOT−223 RSLL ASM1233DZ−10 4.375 10% 350 ms ♦ LOW 4L SOT−223 RTLL ASM1233DZ−15 4.125 15% 350 ms ♦ LOW 4L SOT−223 RULL ASM1233M−55 4.625 5% 350 ms ♦ LOW 3L TO−92 ASM1233M−55 ASM1233M−5 4.375 10% 350 ms ♦ LOW 3L TO−92 ASM1233M−5 ASM1233M−3 2.72 15% 350 ms ♦ LOW 3L TO−92 ASM1233M−3 ASM1233MS−55 4.625 5% 350 ms ♦ LOW 8L SOIC ASM1233MS−55 ASM1233MS−5 4.38 10% 350 ms ♦ LOW 8L SOIC ASM1233MS−5 ASM1233MS−3 2.72 15% 350 ms ♦ LOW 8L SOIC ASM1233MS−3 LEAD FREE DEVICES ASM1233D−L−5F 3.06 5% 350 ms ♦ LOW 3L TO−92 ASM1233D−L−5F ASM1233D−L−10F 2.88 10% 350 ms ♦ LOW 3L TO−92 ASM1233D−L−10F ASM1233D−L−15F 2.72 15% 350 ms ♦ LOW 3L TO−92 ASM1233D−L−15F ASM1233D−LZ−5F 3.06 5% 350 ms ♦ LOW 4L SOT−223 KVLL ASM1233D−LZ−10F 2.88 10% 350 ms ♦ LOW 4L SOT−223 KWLL ASM1233D−LZ−15F 2.72 15% 350 ms ♦ LOW 4L SOT−223 KXLL ASM1233D−5F 4.625 5% 350 ms ♦ LOW 3L TO−92 ASM1233D−5F ASM1233D−10F 4.375 10% 350 ms ♦ LOW 3L TO−92 ASM1233D−10F ASM1233D−15F 4.125 15% 350 ms ♦ LOW 3L TO−92 ASM1233D−15F ASM1233DZ−5F 4.625 5% 350 ms ♦ LOW 4L SOT−223 KSLL ASM1233DZ−10F 4.375 10% 350 ms ♦ LOW 4L SOT−223 KTLL ASM1233DZ−15F 4.125 15% 350 ms ♦ LOW 4L SOT−223 KULL ASM1233M−5F 4.375 5% 350 ms ♦ LOW 3L TO−92 ASM1233M−5F ASM1233M−55F 4.625 10% 350 ms ♦ LOW 3L TO−92 ASM1233M−55F ASM1233M−3F 2.72 15% 350 ms ♦ LOW 3L TO−92 ASM1233M−3F ASM1233MS−5F 4.38 5% 350 ms ♦ LOW 8L SOIC ASM1233MS−5F ASM1233MS−55F 4.625 10% 350 ms ♦ LOW 8L SOIC ASM1233MS−55F ASM1233MS−3F 2.72 15% 350 ms ♦ LOW 8L SOIC ASM1233MS−3F 3. Add /T to Part Number for Tape and Reel (i.e., ASM18xx−x/T) 4. Internal 5.5 kW resistor pull−up 5. LL = Lot Code http://onsemi.com 7 ASM1816 Table 6. ORDERING INFORMATION Device Summary Part Number (Note 6) RESET Output Voltage (V) RESET Tolerance (%) RESET Time (ms) Open−Drain Output Stage (Note 7) SOT−23 Package RESET Polarity Package Marking (Note 8) TIN − LEAD DEVICES ASM1816R−5 3.06 5 150 ♦ ♦ LOW RMLL ASM1816R−10 2.88 10 150 ♦ ♦ LOW RNLL ASM1816R−15 2.72 15 150 ♦ ♦ LOW RZLL ASM1816R−20 2.55 20 150 ♦ ♦ LOW ROLL ASM1816R−5F 3.06 5 150 ♦ ♦ LOW KMLL ASM1816R−10F 2.88 10 150 ♦ ♦ LOW KNLL ASM1816R−15F 2.72 15 150 ♦ ♦ LOW KZLL ASM1816R−20F 2.55 20 150 ♦ ♦ LOW KOLL Part Number (Note 6) RESET Output Voltage (V) RESET Tolerance (%) RESET Time (ms) Open−Drain Output Stage (Note 7) TO−92 Package RESET Polarity Package Marking ASM1816−5 3.06 5 150 ♦ ♦ LOW ASM1816−5 ASM1816−10 2.88 10 150 ♦ ♦ LOW ASM1816−10 ASM1816−20 2.55 20 150 ♦ ♦ LOW ASM1816−20 LEAD FREE DEVICES TIN − LEAD DEVICES LEAD FREE DEVICES ASM1816−5F 3.06 5 150 ♦ ♦ LOW ASM1816−5F ASM1816−10F 2.88 10 150 ♦ ♦ LOW ASM1816−10F ASM1816−20F 2.55 20 150 ♦ ♦ LOW ASM1816−20F 6. Add /T to Part Number for Tape and Reel (i.e., ASM18xx−x/T) 7. Internal 5.5 kW resistor pull−up 8. LL = Lot Code ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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