Target Specifications Datasheet HAF1010RJ Silicon P Channel MOS FET Series Power Switching R07DS1361EJ0200 Rev.2.00 Sep 06, 2016 Description This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. Features Logic level operation to (–4 to –6 V Gate drive) Built-in the over temperature shut-down circuit High endurance capability against to the shut-down circuit Latch type shut down operation (need 0 voltage recovery) Built-in the current limitation circuit. High density mounting Power supply voltage applies 12 V and 24 V. Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8<FP-8DA>)) 8 7 5 D 65 3 1 2 6 D 7 D 8 D 4 4 G Temperature Sensing Circuit Latch Circuit 1, 2, 3 4 5, 6, 7, 8 Current Limitation Circuit Gate Resistor Source Gate Drain Gate Shut-down Circuit S 1 S 2 S 3 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Drain to source voltage VDSS –60 Gate to source voltage VGSS –16 Gate to source voltage VGSS 2.5 Drain current ID –5 Note1 Drain peak current ID (pulse) –10 Body-drain diode reverse drain current IDR –5 Cannel dissipation Pch Note2 2.5 Cannel temperature Tch 150 Storage temperature Tstg –55 to +150 Notes: 1. PW 10 s, duty cycle 1% 2. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s R07DS1361EJ0200 Rev.2.00 Sep 06, 2016 Unit V V V A A A W C C Page 1 of 6 HAF1010RJ Target Specifications Typical Operation Characteristics (Ta = 25°C) Item Input voltage Symbol VIH VIL Input current (Gate non shut down) Input current (Gate shut down) Shut down temperature Gate operation voltage IIH1 IIH2 IIL IIH(sd)1 IIH(sd)2 Tsd Vop Min –3.5 — — — — — — — –3.5 Typ — — — — — –0.8 –0.35 175 — Max — –1.2 –100 –50 –1 — — — –12 Unit V V A A A mA mA C V Test Conditions Vi = –8V, VDS =0 Vi = –3.5V, VDS =0 Vi = –1.2V, VDS =0 Vi = –8V, VDS =0 Vi = –3.5V, VDS =0 Cannel temperature Electrical Characteristics (Ta = 25°C) Item Drain current Drain current Drain to source breakdown voltage Symbol ID1 ID2 V(BR)DSS Min –1.5 — –60 Typ — — — Max — –10 — Unit A mA V Test Conditions VGS = –3.5 V, VDS = –2 V VGS = –1.2 V, VDS = –2 V ID = –10 mA, VGS = 0 Gate to source breakdown voltage Gate to source breakdown voltage Gate to source leak current V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(OP)1 IGS(OP)2 IDSS VGS(off) |yfs| — — — — — — –0.8 –0.35 — — 4 200 140 326 — — –100 –50 –1 100 — — –10 –2.25 — 340 200 ― V V A A A A mA mA A V S m m pF IG = –800 A, VDS = 0 IG = 100 A, VDS = 0 VGS = –8 V, VDS = 0 VGS = –3.5 V, VDS = 0 VGS = –1.2 V, VDS = 0 VGS = 2.4 V, VDS = 0 VGS = –8 V, VDS = 0 VGS = –3.5 V, VDS = 0 VDS = –60 V, VGS = 0 VDS = –10 V, ID = –1 mA ID =–2.5 A, VDS =–10 Vnote3 ID = –2.5 A, VGS = –4 Vnote3 ID = –2.5 A, VGS = –10 Vnote3 Output capacitance RDS(on) RDS(on) Coss –16 2.5 — — — — — — — –1.1 2 — — — Turn-on delay time Rise time Turn off delay time Fall time td(on) tr td(off) tf — — — — 2 7.6 3.2 3.2 ― — ― — s s s s Input current (shut down) Zero gate voltage drain current Gate to source cut off voltage Forward transfer admittance Static drain to source on state resistance VDS = –10 V, VGS = 0, f = 1 MHz VGS = –5 V, ID= –2.5 A, RL = 12 Body-drain diode forward voltage VDF — –0.9 — V IF = –5 A, VGS = 0 Body-drain diode reverse recovery time trr — 77 — ns Over lord shut down operation time note4 tos1 tos2 — — 4.4 2 — — ms ms IF = –5 A, VGS = 0 diF/dt = 50 A/s VGS = –5 V, VDD = –16 V VGS = –5 V, VDD = –24 V Notes: 3. Pulse test 4. Including the junction temperature rise of the lorded condition R07DS1361EJ0200 Rev.2.00 Sep 06, 2016 Page 2 of 6 HAF1010RJ Target Specifications Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating -100 Test condition. When using the glass epoxy board. 3 (FR4 40 x 40 x 1.6 mm), (PW ≤ 10s) Ta = 25°C Thermal shut down 10 operation area (A) -30 2 1 0 -3 PW -1 DC 50 100 150 s =1 s Op er -0.3 1m 0m ati Operation -0.01 in this area is limited by RDS(on) 0 μs -10 Drain Current ID Channel Dissipation Pch (W) 4 on (P W No ≤1 te 0s 5 ) -0.03 200 -0.3 -0.5 -1 -2 -5 -10 -20 -50 -100 Drain Source Voltage VDS (V) Case Temperature Tc (°C) Note 5: When using the glass epoxy board. ( FR4 40 x 40 x 1.6 mm) Typical Transfer Characteristics Typical Output Characteristics –10 V –8 V –5 –6 V –8 Drain Current ID (A) Drain Current ID (A) –10 –4 V –6 VGS = –3.5 V –4 –2 V DS = –10 V –25°C Pulse Test 25°C Tc = 75°C –4 –3 –2 Tc = 75°C –1 25°C –25°C Pulse Test 0 Drain to Saturation Voltage vs. Gate to Source Voltage –2.0 Pulse Test –1.6 –1.2 I D = –5 A –0.8 –2.5 A –0.4 –1 A 0 –2 –4 –6 –8 –10 Gate to Source Voltage VGS (V) R07DS1361EJ0200 Rev.2.00 Sep 06, 2016 RDS(on) (mΩ) –2 –4 –6 –8 –10 Drain to Source Voltage VDS (V) Drain Source On Sate Resistance Drain to Source Saturation Voltage VDS(on) (V) 0 –1 –2 –3 –4 –5 Gate to Source Voltage VGS (V) Static Drain to Source State Resistance vs. Drain Current 1000 Pulse Test 500 V GS = –4 V 200 100 –10 V 50 20 10 –0.1 –0.2 –0.5 –1 –2 –5 –10 Drain Current ID (A) Page 3 of 6 Target Specifications RDS(on) (mΩ) Drain Source On State Resistance Drain to Source On State Resistance vs. Temperature 500 Pulse Test 400 ID = –5 A –2.5 A 300 VGS = –4 V –1 A 200 –5 A –2.5 A 100 0 –25 –1 A VGS = –10 V 0 25 50 75 100 Forward Transfer Admittance |yfs| (S) HAF1010RJ 10 Forward Transfer Admittance vs. Drain Current VDS = –10 V 5 Pulse Test 2 1 25°C 0.5 75°C 0.2 0.1 0.05 0.02 0.01 –0.01 125 –0.1 Body to Drain Diode Reverse Recovery Time Switching Characteristics 50 500 Switching Time t (μs) Reverse Recovery Time trr (ns) 200 100 50 di / dt = 50 A / μs VGS = 0, Ta = 25°C 20 20 t 10 d(off) 5 2 td(on) 1 0.5 VGS = –10 V, VDD = –30 V PW = 300 μs, duty < 1 % 0.1 –0.1 –0.2 –0.5 –1 –2 Reverse Drain Current –5 –10 tr tf 0.2 10 –0.1 –0.2 IDR (A) –0.5 –1 Drain Current –2 –5 –10 ID (A) Typical capacitance vs. Drain to Source Voltage Reverse Drain Current vs. Source to Drain Voltage 10000 –5 VGS = 0 f = 1 MHz Pulse Test -10 V Capacitance C (pF) Reverse Drain Current IDR (A) –10 100 1000 –3 –2 -5 V VGS = 0 V –1 0 –1 Drain Current ID (A) Case Temperature Tc (°C) –4 Tc = –25°C 1000 Coss 100 –0.4 –0.8 –1.2 –1.6 Source to Drain Voltage VSD (V) R07DS1361EJ0200 Rev.2.00 Sep 06, 2016 –2.0 0 –10 –20 –30 –40 –50 Drain to Source VDS (V) –60 Page 4 of 6 HAF1010RJ Target Specifications Shutdown Case Temperature vs. Gate to Source Voltage Gate to Source Voltage vs. Shutdown Time of Load-Short Test Gate to Source Voltage VGS (V) Shutdown Case Temperature Tc (°C) -15 -10 VDD = -16 V -24 V -5 0 0.0001 0.001 0.01 0.1 200 180 160 140 120 100 0 –4 –6 –8 –10 Normalized Transient Thermal Impedance vs. Pulse Width 10 Normalized Transient Thermal Impedance γs (t) –2 Gate to Source Voltage VGS (V) Shutdown Time of Lord-Short Test Pw (S) 1 ID = –0.5 A D=1 0.5 0.2 0.1 0.1 0.05 θch − f(t) = γs (t) • θch − f θch − f = 83.3°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.02 0.01 0.01 0.0001 10 μ PDM e 0.001 ot 1sh ls pu D= PW T PW T 100 μ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) R07DS1361EJ0200 Rev.2.00 Sep 06, 2016 Page 5 of 6 HAF1010RJ Target Specifications Package Dimensions JEITA Package Code RENESAS Code Package Name P-SOP8-3.95 × 4.9-1.27 PRSP0008DD-A FP-8DA 0.085g F *1 D MASS[Typ.] bp b1 1 Z c1 c *2 E Index mark HE 5 8 4 *3 Terminal cross section bp NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. x M e Reference Symbol L1 Dimension in Millimeters Min Nom Max D 4.90 5.3 E 3.95 A2 A1 0.10 0.14 0.25 0.34 0.42 0.50 1.75 A A A1 bp L 0.40 b1 c 0.19 c1 y 0.22 0° Detail F HE 0.25 0.20 8° 5.80 6.10 e 6.20 1.27 x 0.25 y 0.1 Z 0.75 L 0.40 L1 0.60 1.27 1.08 Ordering Information Part Name HAF1010RJ Quantity 2500 pcs/ Reel Shipping Container Embossed tape (Reel) Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. R07DS1361EJ0200 Rev.2.00 Sep 06, 2016 Page 6 of 6 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. 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