PD - 94983
IRF9Z34NPbF
Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l P-Channel
l Fully Avalanche Rated
l Lead-Free
Description
HEXFET® Power MOSFET
l
D
VDSS = -55V
RDS(on) = 0.10Ω
G
ID = -19A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the
industry.
TO-220AB
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
V GS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
-19
-14
-68
68
0.45
± 20
180
-10
6.8
-5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
300 (1.6mm from case )
10 lbfin (1.1Nm)
°C
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
0.50
2.2
62
°C/W
02/05/04
IRF9Z34NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-55
-2.0
4.2
Typ.
-0.05
13
55
30
41
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
4.5
LS
Internal Source Inductance
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
620
280
140
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
V
VGS = 0V, ID = -250µA
V/°C Reference to 25°C, ID = -1mA
0.10
Ω
VGS = -10V, ID = -10A
-4.0
V
VDS = V GS, ID = -250µA
S
VDS = 25V, I D = -10A
-25
VDS = -55V, VGS = 0V
µA
-250
VDS = -44V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
35
ID = -10A
7.9
nC
VDS = -44V
16
VGS = -10V, See Fig. 6 and 13
VDD = -28V
ID = -10A
ns
RG = 13Ω
RD = 2.6Ω, See Fig. 10
Between lead,
6mm (0.25in.)
nH
G
from package
and center of die contact
VGS = 0V
pF
VDS = -25V
= 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
I SM
VSD
trr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
-19
showing the
A
G
integral reverse
-68
p-n junction diode.
S
-1.6
V
TJ = 25°C, IS = -10A, VGS = 0V
54
82
ns
TJ = 25°C, IF = -10A
110 160
nC
di/dt = -100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
ISD ≤ -10A, di/dt ≤ -290A/µs, VDD ≤ V(BR)DSS,
Starting TJ = 25°C, L = 3.6mH
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS = -10A. (See Figure 12)
TJ ≤ 175°C
IRF9Z34NPbF
100
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-ID , Drain-to-Source Current (A)
-ID , Drain-to-Source Current (A)
10
-4.5V
20µs PULSE WIDTH
Tc = 25°C
A
1
0.1
1
10
10
-4.5V
100
2.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-ID , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
VDS = -25V
20µs PULSE WIDTH
6
7
8
9
-VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
A
100
Fig 2. Typical Output Characteristics
100
5
1
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1
20µs PULSE WIDTH
TC = 175°C
1
0.1
-VDS , Drain-to-Source Voltage (V)
4
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
TOP
10
A
I D = -17A
1.5
1.0
0.5
VGS = -10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRF9Z34NPbF
1200
-VGS , Gate-to-Source Voltage (V)
1000
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
800
Coss
600
400
Crss
200
0
1
10
100
I D = -10A
VDS = -44V
VDS = -28V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
-VDS , Drain-to-Source Voltage (V)
20
30
40
A
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
-I D , Drain Current (A)
-ISD , Reverse Drain Current (A)
10
10
TJ = 175°C
TJ = 25°C
1
100
10µs
100µs
10
1ms
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
-VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
1.6
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10ms
10
-VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
A
100
IRF9Z34NPbF
20
RD
V DS
VGS
ID , Drain Current (A)
D.U.T.
RG
15
-
+
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
5
td(on)
tr
t d(off)
tf
VGS
0
10%
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
90%
VDS
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.01
0.00001
0.02
0.01
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
0.1
L
VDS
D.U.T
RG
IAS
-20V
tp
VDD
A
DRIVER
0.01Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
E AS , Single Pulse Avalanche Energy (mJ)
IRF9Z34NPbF
500
TOP
BOTTOM
400
300
200
100
A
0
25
I AS
ID
-4.2A
-7.2A
-10A
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
-10V
QGS
.2µF
.3µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
175
IRF9Z34NPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
V DD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
[ISD ]
IRF9Z34NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
LOT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/