AD AD8620AR-REEL7 Precision, very low noise, low input bias current, wide bandwidth jfet operational amplifier Datasheet

Precision, Very Low Noise,
Low Input Bias Current, Wide
Bandwidth JFET Operational Amplifier
AD8610/AD8620
APPLICATIONS
Photodiode amplifier
ATE
Instrumentation
Sensors and controls
High performance filters
Fast precision integrators
High performance audio
NULL 1
–IN 2
AD8610
8
NC
7
V+
6 OUT
TOP VIEW
V– 4 (Not to Scale) 5 NULL
+IN 3
NC = NO CONNECT
02730-001
Low noise: 6 nV/√Hz
Low offset voltage: 100 μV maximum
Low input bias current: 10 pA maximum
Fast settling: 600 ns to 0.01%
Low distortion
Unity gain stable
No phase reversal
Dual-supply operation: ±5 V to ±13 V
PIN CONFIGURATIONS
Figure 1. AD8610 8-Lead MSOP and SOIC_N
OUTA 1
–INA 2
AD8620
8
V+
7
OUTB
6 –INB
TOP VIEW
V– 4 (Not to Scale) 5 +INB
+INA 3
02730-002
FEATURES
Figure 2.AD8620 8-Lead SOIC
GENERAL DESCRIPTION
The AD8610/AD8620 are very high precision JFET input amplifiers featuring ultralow offset voltage and drift, very low input
voltage and current noise, very low input bias current, and wide
bandwidth. Unlike many JFET amplifiers, the AD8610/AD8620
input bias current is low over the entire operating temperature
range. The AD8610/AD8620 are stable with capacitive loads of
over 1000 pF in noninverting unity gain; much larger capacitive
loads can be driven easily at higher noise gains. The AD8610/
AD8620 swing to within 1.2 V of the supplies even with a 1 kΩ
load, maximizing dynamic range even with limited supply voltages. Outputs slew at 50 V/μs in either inverting or noninverting
gain configurations, and settle to 0.01% accuracy in less than
600 ns. Combined with high input impedance, great precision
and very high output drive, the AD8610/AD8620 are ideal
amplifiers for driving high performance ADC inputs and
buffering DAC converter outputs.
Applications for the AD8610/AD8620 include electronic instruments; ATE amplification, buffering, and integrator circuits;
CAT/MRI/ultrasound medical instrumentation; instrumentation
quality photodiode amplification; fast precision filters (including
PLL filters); and high quality audio.
The AD8610/AD8620 are fully specified over the extended
industrial (−40°C to +125°C) temperature range. The AD8610
is available in the narrow 8-lead SOIC and the tiny 8-lead MSOP
surface-mount packages. The AD8620 is available in the narrow
8-lead SOIC package. 8-lead MSOP packaged devices are available only in tape and reel.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
AD8610/AD8620
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Applications....................................................................................... 1
Typical Performance Characteristics ..............................................6
Pin Configurations ........................................................................... 1
Theory of Operation ...................................................................... 13
General Description ......................................................................... 1
Functional Description.............................................................. 13
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 22
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 22
Electrical Specifications............................................................... 4
REVISION HISTORY
5/02—Rev. A to Rev. B
11/06—Rev. D to Rev. E
Addition of part number AD8620 ...................................Universal
Addition of 8-Lead SOIC (R-8 Suffix) Drawing............................1
Changes to General Description .....................................................1
Additions to Specifications ..............................................................2
Change to Electrical Specifications.................................................3
Additions to Ordering Guide...........................................................4
Replace TPC 29..................................................................................8
Add Channel Separation Test Circuit Figure.................................9
Add Channel Separation Graph ......................................................9
Changes to Figure 26...................................................................... 15
Addition of High-Speed, Low Noise Differential Driver
section .............................................................................................. 16
Addition of Figure 30..................................................................... 16
Updated Format..................................................................Universal
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Changes to Outline Dimensions................................................... 21
Changes to Ordering Guide .......................................................... 21
2/04—Rev. C to Rev. D.
Changes to Specifications ................................................................ 2
Changes to Ordering Guide ............................................................ 4
Updated Outline Dimensions ....................................................... 17
10/02—Rev. B to Rev. C.
Updated Ordering Guide................................................................. 4
Edits to Figure 15............................................................................ 12
Updated Outline Dimensions ....................................................... 16
Rev. E | Page 2 of 24
AD8610/AD8620
SPECIFICATIONS
@ VS = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage (AD8610B)
Symbol
Conditions
Min
VOS
–40°C < TA < +125°C
Offset Voltage (AD8620B)
VOS
Offset Voltage (AD8610A/AD8620A)
VOS
–40°C < TA < +125°C
+25°C < TA < +125°C
–40°C < TA < +125°C
Input Bias Current
IB
–40°C < TA < +85°C
–40°C < TA < +125°C
Input Offset Current
IOS
–40°C < TA < +85°C
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift (AD8610B)
Offset Voltage Drift (AD8620B)
Offset Voltage Drift (AD8610A/AD8620A)
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Input Capacitance
Differential Mode
Common Mode
Channel Separation
f = 10 kHz
f = 300 kHz
–10
–250
–2.5
–10
–75
–150
–2
90
100
CMRR
AVO
ΔVOS/ΔT
ΔVOS/ΔT
ΔVOS/ΔT
VCM = –1.5 V to +2.5 V
RL = 1 kΩ, VO = –3 V to +3 V
–40°C < TA < +125°C
–40°C < TA < +125°C
–40°C < TA < +125°C
VOH
VOL
IOUT
RL = 1 kΩ, –40°C < TA < +125°C
RL = 1 kΩ, –40°C < TA < +125°C
VOUT > ±2 V
3.8
PSRR
ISY
VS = ±5 V to ±13 V
VO = 0 V
–40°C < TA < +125°C
100
SR
GBP
tS
RL = 2 kΩ
40
en p-p
en
in
CIN
Typ
Max
Unit
45
80
45
80
85
90
150
+2
+130
+1.5
+1
+20
+40
100
200
150
300
250
350
850
+10
+250
+2.5
+10
+75
+150
+3
μV
μV
μV
μV
μV
μV
μV
pA
pA
nA
pA
pA
pA
V
dB
V/mV
μV/°C
μV/°C
μV/°C
95
180
0.5
0.5
0.8
4
–4
±30
110
2.5
3.0
1
1.5
3.5
–3.8
3.0
3.5
V
V
mA
dB
mA
mA
AV = +1, 4 V step, to 0.01%
50
25
350
V/μs
MHz
ns
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
1.8
6
5
μV p-p
nV/√Hz
fA/√Hz
8
15
pF
pF
137
120
dB
dB
CS
Rev. E | Page 3 of 24
AD8610/AD8620
ELECTRICAL SPECIFICATIONS
@ VS = ±13 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage (AD8610B)
Symbol
Conditions
Min
VOS
–40°C < TA < +125°C
Offset Voltage (AD8620B)
VOS
Offset Voltage (AD8610A/AD8620A)
VOS
–40°C < TA < +125°C
Input Bias Current
Input Offset Current
Max
Unit
45
100
μV
80
200
μV
45
150
μV
80
300
μV
85
250
μV
+25°C < TA < +125°C
90
350
μV
–40°C < TA < +125°C
150
850
μV
IB
–10
+3
+10
pA
–40°C < TA < +85°C
–250
+130
+250
pA
–40°C < TA < +125°C
–3.5
+3.5
nA
IOS
–40°C < TA < +85°C
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Typ
–10
+1.5
+10
pA
–75
+20
+75
pA
–150
+40
+150
pA
–10.5
+10.5
110
V
CMRR
VCM = –10 V to +10 V
90
dB
Large Signal Voltage Gain
AVO
RL = 1 kΩ, VO = –10 V to +10 V
100
Offset Voltage Drift (AD8610B)
ΔVOS/ΔT
–40°C < TA < +125°C
0.5
1
μV/°C
Offset Voltage Drift (AD8620B)
ΔVOS/ΔT
–40°C < TA < +125°C
0.5
1.5
μV/°C
Offset Voltage Drift (AD8610A/AD8620A)
ΔVOS/ΔT
–40°C < TA < +125°C
0.8
3.5
μV/°C
200
V/mV
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
RL = 1 kΩ, −40°C < TA < +125°C
Output Voltage Low
VOL
RL = 1 kΩ, −40°C < TA < +125°C
+11.75
+11.84
–11.84
V
Output Current
IOUT
VOUT > 10 V
±45
mA
Short Circuit Current
ISC
±65
mA
110
dB
–11.75
V
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
VS = ±5 V to ±13 V
100
Supply Current/Amplifier
ISY
VO = 0 V
3.0
3.5
mA
–40°C < TA < +125°C
3.5
4.0
mA
DYNAMIC PERFORMANCE
Slew Rate
SR
Gain Bandwidth Product
GBP
Settling Time
tS
RL = 2 kΩ
40
60
V/μs
25
MHz
AV = 1, 10 V step, to 0.01%
600
ns
NOISE PERFORMANCE
Voltage Noise
en p-p
0.1 Hz to 10 Hz
1.8
μV p-p
Voltage Noise Density
en
f = 1 kHz
6
nV/√Hz
Current Noise Density
in
f = 1 kHz
5
fA/√Hz
Input Capacitance
CIN
Differential Mode
8
pF
Common Mode
15
pF
f = 10 kHz
137
dB
f = 300 kHz
120
dB
Channel Separation
CS
Rev. E | Page 4 of 24
AD8610/AD8620
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration to GND
Storage Temperature Range
R, RM Packages
Operating Temperature Range
AD8610/AD8620
Junction Temperature Range
R, RM Packages
Lead Temperature Range (Soldering, 10 sec)
Rating
27.3 V
VS− to VS+
± Supply Voltage
Indefinite
–65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Thermal Resistance
–40°C to +125°C
–65°C to +150°C
300°C
Package Type
8-Lead MSOP (RM)
8-Lead SOIC (R)
1
θJA 1
190
158
θJC
44
43
Unit
°C/W
°C/W
θJA is specified for worst-case conditions; that is, θJA is specified for a device
soldered in circuit board for surface-mount packages.
ESD CAUTION
Rev. E | Page 5 of 24
AD8610/AD8620
TYPICAL PERFORMANCE CHARACTERISTICS
14
600
VS = ±13V
VS = ±5V
INPUT OFFSET VOLTAGE (µV)
10
8
6
4
400
200
0
–200
–400
02730-003
2
0
–250
–150
–50
50
150
02730-006
NUMBER OF AMPLIFIERS
12
–600
250
–40
25
INPUT OFFSET VOLTAGE (µV)
Figure 3. Input Offset Voltage at ±13 V
14
VS = ±5V OR ±13V
12
400
NUMBER OF AMPLIFIERS
200
0
–200
–400
25
85
8
6
4
2
02730-004
–40
10
0
125
02730-007
INPUT OFFSET VOLTAGE (µV)
VS = ±13V
0
0.2
0.6
1.0
Figure 4. Input Offset Voltage vs. Temperature at ±13 V (300 Amplifiers)
1.8
2.2
2.6
Figure 7. Input Offset Voltage Drift
18
3.6
VS = ±13V
VS = ±5V
3.4
INPUT BIAS CURRENT (pA)
14
12
10
8
6
4
–250
–150
–50
50
150
3.0
2.8
2.6
2.4
2.2
02730-005
2
3.2
2.0
250
INPUT OFFSET VOLTAGE (µV)
02730-008
16
NUMBER OF AMPLIFIERS
1.4
TCVOS (µV/°C)
TEMPERATURE (°C)
0
125
Figure 6. Input Offset Voltage vs. Temperature at ±5 V (300 Amplifiers)
600
–600
85
TEMPERATURE (°C)
–10
–5
0
5
10
COMMON-MODE VOLTAGE (V)
Figure 5. Input Offset Voltage at ±5 V
Figure 8. Input Bias Current vs. Common-Mode Voltage
Rev. E | Page 6 of 24
AD8610/AD8620
3.0
2.0
1.5
1.0
0
02730-009
0.5
0
1
2
3
4
5
6
7
8
9
10
11
12
VS = ±13V
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
02730-012
SUPPLY CURRENT (mA)
2.5
OUTPUT VOLTAGE TO SUPPLY RAIL (V)
1.8
0
100
13
1k
SUPPLY VOLTAGE (±V)
Figure 9. Supply Current vs. Supply Voltage
1M
4.20
OUTPUT VOLTAGE HIGH (V)
2.85
2.75
2.65
4.15
4.10
4.05
–40
25
85
3.95
125
02730-013
02730-010
4.00
–40
TEMPERATURE (°C)
25
85
Figure 13. Output Voltage High vs. Temperature at ±5 V
2.65
–3.95
VS = ±5V
RL = 1kΩ
VS = ±5V
–4.00
OUTPUT VOLTAGE LOW (V)
2.60
2.55
2.50
2.45
2.40
25
85
–4.05
–4.10
–4.15
–4.20
–4.30
125
TEMPERATURE (°C)
02730-014
–4.25
02730-011
2.35
–40
125
TEMPERATURE (°C)
Figure 10. Supply Current vs. Temperature at ±13 V
SUPPLY CURRENT (mA)
100M
VS = ±5V
RL = 1kΩ
2.95
2.30
10M
4.25
VS = ±13V
SUPPLY CURRENT (mA)
100k
Figure 12. Output Voltage to Supply Rail vs. Load
3.05
2.55
10k
RESISTANCE LOAD (Ω)
–40
25
85
125
TEMPERATURE (°C)
Figure 11. Supply Current vs. Temperature at ±5 V
Figure 14. Output Voltage Low vs. Temperature at ±5 V
Rev. E | Page 7 of 24
AD8610/AD8620
60
VS = ±13V
RL = 1kΩ
12.00
VS = ±13V
RL = 2kΩ
CL = 20pF
CLOSED-LOOP GAIN (dB)
40
11.95
11.90
11.85
G = +100
20
G = +10
0
G = +1
11.80
–40
25
85
–40
125
02730-018
–20
02730-015
OUTPUT VOLTAGE HIGH (V)
12.05
1k
10k
TEMPERATURE (°C)
10M
100M
Figure 18. Closed-Loop Gain vs. Frequency
260
–11.80
VS = ±13V
RL = 1kΩ
VS = ±13V
VO = ±10V
RL = 1kΩ
240
–11.85
220
AVO (V/mV)
–11.90
–11.95
200
180
160
140
–12.00
–40
25
85
100
125
02730-019
–12.05
120
02730-016
OUTPUT VOLTAGE LOW (V)
1M
FREQUENCY (Hz)
Figure 15. Output Voltage High vs. Temperature at ±13 V
–40
VS = ±13V
RL = 1kΩ
MARKER AT 27MHz
φM = 69.5
CL = 20pF
270
190
225
180
180
170
90
20
45
0
0
–20
–45
–40
–90
–60
–135
–80
1
10
100
–180
200
VS = ±5V
VO = ±3V
RL = 1kΩ
160
AVO (V/mV)
40
PHASE (Degrees)
135
150
140
130
120
02730-017
60
125
110
100
02730-020
120
80
85
Figure 19. AVO vs. Temperature at ±13 V
Figure 16. Output Voltage Low vs. Temperature at ±13 V
100
25
TEMPERATURE (°C)
TEMPERATURE (°C)
GAIN (dB)
100k
–40
25
85
TEMPERATURE (°C)
FREQUENCY (MHz)
Figure 20. AVO vs. Temperature at ±5 V
Figure 17. Open-Loop Gain and Phase vs. Frequency
Rev. E | Page 8 of 24
125
AD8610/AD8620
160
140
VS = ±13V
140
VS = ±13V
120
120
100
+PSRR
80
60
CMRR (dB)
PSRR (dB)
100
–PSRR
40
20
80
60
40
0
–40
100
1k
10k
100k
1M
10M
0
10
60M
02730-024
20
02730-021
–20
100
FREQUENCY (Hz)
1k
10k
100k
1M
10M
60M
FREQUENCY (Hz)
Figure 21. PSRR vs. Frequency at ±13 V
Figure 24. CMRR vs. Frequency
160
VS = ±5V
140
VS = ±13V
VIN = –300mV p-p
AV = –100
RL = 10kΩ
PSRR (dB)
100
VOLTAGE (300mV/DIV)
120
+PSRR
80
60
–PSRR
40
20
0V
VIN
CH2 = 5V/DIV
VOUT
–40
100
1k
10k
100k
1M
10M
02730-025
02730-022
0
–20
0V
60M
TIME (4µs/DIV)
FREQUENCY (Hz)
Figure 22. PSRR vs. Frequency at ±5V
Figure 25. Positive Overvoltage Recovery
122
VS = ±13V
VIN = 300mV p-p
AV = –100
RL = 10kΩ
CL = 0pF
VOLTAGE (300mV/DIV)
121
118
117
116
–40
25
85
VIN
0V
0V
VOUT
CH2 = 5V/DIV
02730-026
119
02730-023
PSRR (dB)
120
125
TIME (4µs/DIV)
TEMPERATURE (°C)
Figure 23. PSRR vs. Temperature
Figure 26. Negative Overvoltage Recovery
Rev. E | Page 9 of 24
AD8610/AD8620
100
PEAK TO PEAK VOLTAGE NOISE (1µV/DIV)
VS = ±5V
90
VS = ±13V
VIN p-p = 1.8µV
80
ZOUT (Ω)
70
60
GAIN = +1
50
40
30
GAIN = +100
GAIN = +10
02730-030
20
02730-027
10
0
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
TIME (1s/DIV)
Figure 27. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 30. ZOUT vs. Frequency
3000
1000
2500
2000
IB (pA)
100
10
1500
1000
1
1
10
100
1k
10k
100k
02730-031
500
02730-028
VOLTAGE NOISE DENSITY (nV/ Hz)
VS = ±13V
0
1M
0
25
FREQUENCY (Hz)
Figure 28. Input Voltage Noise Density vs. Frequency
100
40
50
40
GAIN = +100
GAIN = +10
20
10
10k
100k
1M
10M
100M
FREQUENCY (Hz)
30
25
20
15
+OS
–OS
10
5
0
02730-032
SMALL SIGNAL OVERSHOOT (%)
GAIN = +1
02730-029
ZOUT (Ω)
70
0
1k
VS = ±13V
RL = 2kΩ
VIN = 100mV p-p
35
80
30
125
Figure 31. Input Bias Current vs. Temperature
VS = ±13V
90
60
85
TEMPERATURE (°C)
0
10
100
1k
CAPACITANCE (pF)
Figure 29. ZOUT vs. Frequency
Figure 32. Small Signal Overshoot vs. Load Capacitance
Rev. E | Page 10 of 24
10k
AD8610/AD8620
40
VS = ±5V
RL = 2kΩ
VIN = 100mV
SMALL SIGNAL OVERSHOOT (%)
35
30
20
15
+OS
–OS
10
0
VS = ±13V
VIN p-p = 20V
AV = +1
RL = 2kΩ
CL = 20pF
02730-033
5
0
10
100
1k
10k
02730-036
VOLTAGE (5V/DIV)
25
TIME (400ns/DIV)
CAPACITANCE (pF)
Figure 33. Small Signal Overshoot vs. Load Capacitance
Figure 36. +SR at G = +1
VOLTAGE (5V/DIV)
VIN
VOUT
TIME (400µs/DIV)
02730-037
VS = ±13V
VIN p-p = 20V
AV = +1
RL = 2kΩ
CL = 20pF
02730-034
VOLTAGE (5V/DIV)
VS = ±13V
VIN = ±14V
AV = +1
FREQ = 0.5kHz
TIME (400ns/DIV)
Figure 34. No Phase Reversal
Figure 37. −SR at G = +1
VS = ±13V
VIN p-p = 20V
AV = +1
RL = 2kΩ
CL = 20pF
02730-035
02730-038
VOLTAGE (5V/DIV)
VOLTAGE (5V/DIV)
VS = ±13V
VIN p-p = 20V
AV = –1
RL = 2kΩ
CL = 20pF
TIME (1µs/DIV)
TIME (1µs/DIV)
Figure 35. Large Signal Response at G = +1
Figure 38. Large Signal Response at G =−1
Rev. E | Page 11 of 24
02730-040
VOLTAGE (5V/DIV)
VS = ±13V
VIN p-p = 20V
AV = –1
RL = 2kΩ
SR = 55V/µs
CL = 20pF
VS = ±13V
VIN p-p = 20V
AV = –1
RL = 2kΩ
SR = 50V/µs
CL = 20pF
02730-039
VOLTAGE (5V/DIV)
AD8610/AD8620
TIME (400ns/DIV)
TIME (400ns/DIV)
Figure 39. +SR at G = −1
Figure 40. −SR at G = −1
Rev. E | Page 12 of 24
AD8610/AD8620
THEORY OF OPERATION
R1
20kΩ
2
–
0
–13V
R2
2kΩ
V–
V+
5
R3
R4
2kΩ 2kΩ U2
0
0
6
7
136
134
0
0
132
CS (dB)
VIN
20V p-p
U1
V+
V–
02730-041
3
+
138
Figure 41. Channel Separation Test Circuit
FUNCTIONAL DESCRIPTION
130
128
126
The AD8610/AD8620 are manufactured on Analog Devices,
Inc.'s XFCB (eXtra fast complementary bipolar) process. XFCB
is fully dielectrically isolated (DI) and used in conjunction with
N-channel JFET technology and thin film resistors (that can be
trimmed) to create the JFET input amplifier. Dielectrically isolated NPN and PNP transistors fabricated on XFCB have an FT
greater than 3 GHz. Low TC thin film resistors enable very accurate
offset voltage and offset voltage tempco trimming. These process
breakthroughs allow Analog Devices’ IC designers to create an
amplifier with faster slew rate and more than 50% higher bandwidth at half of the current consumed by its closest competition.
The AD8610/AD8620 are unconditionally stable in all gains,
even with capacitive loads well in excess of 1 nF. The AD8610/
AD8620B grade achieves less than 100 μV of offset and 1 μV/°C
of offset drift, numbers usually associated with very high precision
bipolar input amplifiers. The AD8610 is offered in the tiny 8-lead
MSOP as well as narrow 8-lead SOIC surface-mount packages
and is fully specified with supply voltages from ±5 V to ±13 V.
The very wide specified temperature range, up to 125°C, guarantees
superior operation in systems with little or no active cooling.
The unique input architecture of the AD8610/AD8620 features
extremely low input bias currents and very low input offset voltage. Low power consumption minimizes the die temperature and
maintains the very low input bias current. Unlike many competitive JFET amplifiers, the AD8610/AD8620 input bias currents
are low even at elevated temperatures. Typical bias currents are
less than 200 pA at 85°C. The gate current of a JFET doubles
every 10°C resulting in a similar increase in input bias current
over temperature. Give special care to the PC board layout to
minimize leakage currents between PCB traces. Improper layout and board handling generates a leakage current that exceeds
the bias current of the AD8610/AD8620.
124
122
120
02730-042
+13V
0
50
100
150
200
250
300
350
FREQUENCY (kHz)
Figure 42. AD8620 Channel Separation Graph
8
SUPPLY CURRENT (mA)
7
OPA627
6
5
4
3
02730-043
CS (dB) = 20 log (VOUT / 10 × VIN)
AD8610
2
–75
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
Figure 43. Supply Current vs. Temperature
Power Consumption
A major advantage of the AD8610/AD8620 in new designs is
the power saving capability. Lower power consumption of the
AD8610/AD8620 makes them much more attractive for portable
instrumentation and for high density systems, simplifying thermal management, and reducing power-supply performance
requirements. Compare the power consumption of the AD8610
vs. the OPA627 in Figure 43.
Rev. E | Page 13 of 24
AD8610/AD8620
+5V
3
The AD8610/AD8620 have excellent capacitive load driving
capability and can safely drive up to 10 nF when operating with
±5 V supply. Figure 44 and Figure 45 compare the AD8610/
AD8620 against the OPA627 in the noninverting gain configu­
ration driving a 10 kΩ resistor and 10,000 pF capacitor placed
in parallel on its output, with a square wave input set to a frequency
of 200 kHz. The AD8610/AD8620 have much less ringing than
the OPA627 with heavy capacitive loads.
2
7
4
–5V
2kΩ
2kΩ
2µF
Figure 46. Capacitive Load Drive Test Circuit
VOLTAGE (20mV/DIV)
VOLTAGE (50mV/DIV)
VS = ±5V
RL = 10kΩ
CL = 10,000pF
VIN = 50mV
02730-046
Driving Large Capacitive Loads
02730-047
VS = ±5V
RL = 10kΩ
CL = 2µF
02730-044
TIME (20µs/DIV)
Figure 47. OPA627 Capacitive Load Drive, AV = +2
TIME (2µs/DIV)
Figure 44. OPA627 Driving CL = 10,000 pF
VOLTAGE (20mV/DIV)
VOLTAGE (50mV/DIV)
VS = ±5V
RL = 10kΩ
CL = 10,000pF
02730-048
VS = ±5V
RL = 10kΩ
CL = 2µF
02730-045
TIME (20µs/DIV)
Figure 48. AD8610/AD8620 Capacitive Load Drive, AV = +2
TIME (2µs/DIV)
Figure 45. AD8610/AD8620 Driving CL = 10,000 pF
The AD8610/AD8620 can drive much larger capacitances
without any external compensation. Although the AD8610/
AD8620 are stable with very large capacitive loads, remember
that this capacitive loading limits the bandwidth of the amplifier.
Heavy capacitive loads also increase the amount of overshoot
and ringing at the output. Figure 47 and Figure 48 show the
AD8610/AD8620 and the OPA627 in a noninverting gain of +2
driving 2 μF of capacitance load. The ringing on the OPA627 is
much larger in magnitude and continues 10 times longer than
the AD8610/AD8620.
Rev. E | Page 14 of 24
AD8610/AD8620
Slew Rate (Unity Gain Inverting vs. Noninverting)
VS = ±13V
RL = 2kΩ
G = –1
VOLTAGE (5V/DIV)
Amplifiers generally have a faster slew rate in an inverting unity
gain configuration due to the absence of the differential input
capacitance. Figure 49 through Figure 52 show the performance
of the AD8610/AD8620 configured in a gain of –1 compared to
the OPA627. The AD8610/AD8620 slew rate is more symmetrical,
and both the positive and negative transitions are much cleaner
than in the OPA627.
SR = 54V/µs
02730-051
SR = 54V/µs
TIME (400ns/DIV)
Figure 51. –Slew Rate of AD8610/AD8620 in Unity Gain of –1
VOLTAGE (5V/DIV)
VS = ±13V
RL = 2kΩ
G = –1
02730-049
VOLTAGE (5V/DIV)
VS = ±13V
RL = 2kΩ
G = –1
TIME (400ns/DIV)
Figure 49. +Slew Rate of AD8610/AD8620 in Unity Gain of –1
SR = 56V/µs
02730-052
TIME (400ns/DIV)
SR = 42.1V/µs
Figure 52. –Slew Rate of OPA627 in Unity Gain of –1
02730-050
VOLTAGE (5V/DIV)
VS = ±13V
RL = 2kΩ
G = –1
TIME (400ns/DIV)
Figure 50. +Slew Rate of OPA627 in Unity Gain of –1
The AD8610/AD8620 have a very fast slew rate of 60 V/μs even
when configured in a noninverting gain of +1. This is the toughest
condition to impose on any amplifier since the input commonmode capacitance of the amplifier generally makes its SR appear
worse. The slew rate of an amplifier varies according to the voltage
difference between its two inputs. To observe the maximum SR,
a voltage difference of about 2 V between the inputs must be
ensured. This is required for virtually any JFET op amp so that
one side of the op amp input circuit is completely off, thus maxi­
mizing the current available to charge and discharge the internal
compensation capacitance. Lower differential drive voltages
produce lower slew rate readings. A JFET input op amp with a
slew rate of 60 V/μs at unity gain with VIN = 10 V might slew at
20 V/μs, if it is operated at a gain of +100 with VIN = 100 mV.
Rev. E | Page 15 of 24
AD8610/AD8620
The slew rate of the AD8610/AD8620 is double that of the
OPA627 when configured in a unity gain of +1 (see Figure 53
and Figure 54).
VOLTAGE (5V/DIV)
VS = ±13V
RL = 2kΩ
G = +1
02730-053
SR = 85V/µs
TIME (400ns/DIV)
Figure 53. +Slew Rate of AD8610/AD8620 in Unity Gain of +1
VOLTAGE (5V/DIV)
VS = ±13V
RL = 2kΩ
G = +1
Input Overvoltage Protection
When the input of an amplifier is driven below VEE or above
VCC by more than one VBE, large currents flow from the sub­
strate through the negative supply (V–) or the positive supply
(V+), respectively, to the input pins and can destroy the device.
If the input source can deliver larger currents than the maximum
forward current of the diode (>5 mA), a series resistor can be
added to protect the inputs. With its very low input bias and
offset current, a large series resistor can be placed in front of
the AD8610/AD8620 inputs to limit current to below damaging
levels. Series resistance of 10 kΩ generates less than 25 μV of offset.
This 10 kΩ allows input voltages more than 5 V beyond either
power supply. Thermal noise generated by the resistor adds
7.5 nV/√Hz to the noise of the AD8610/AD8620. For the AD8610/
AD8620, differential voltages equal to the supply voltage do not
cause any problem (see Figure 55). In this context, please note that
the high breakdown voltage of the input FETs eliminates the need
to include clamp diodes between the inputs of the amplifier, a practice that is mandatory on many precision op amps. Unfortunately,
clamp diodes greatly interfere with many application circuits
such as precision rectifiers and comparators. The AD8610/
AD8620 are free from these limitations.
+13V
3
14V
SR = 23V/µs
0
2
7
4
6
AD8610
–13V
02730-056
V1
02730-054
Figure 56. Unity Gain Follower
No Phase Reversal
TIME (400ns/DIV)
Figure 54. +Slew Rate of OPA627 in Unity Gain of +1
The slew rate of an amplifier determines the maximum frequency
at which it can respond to a large signal input. This frequency
(known as full-power bandwidth or FPBW) can be calculated
for a given distortion (for example, 1%) from the equation:
FPBW =
SR
(2π × VPEAK )
Many amplifiers misbehave when one or both of the inputs are
forced beyond the input common-mode voltage range. Phase
reversal is typified by the transfer function of the amplifier, effecttively reversing its transfer polarity. In some cases, this can cause
lockup and even equipment damage in servo systems, and can
cause permanent damage or no recoverable parameter shifts to
the amplifier itself. Many amplifiers feature compensation circuitry to combat these effects, but some are only effective for
the inverting input. The AD8610/AD8620 are designed to prevent
phase reversal when one or both inputs are forced beyond their
input common-mode voltage range.
CH1 = 20.8V p-p
VIN
VOLTAGE (5V/DIV)
VOLTAGE (10V/DIV)
0V
CH2 = 19.4V p-p
VOUT
02730-057
02730-055
0V
TIME (400ns/DIV)
TIME (400µs/DIV)
Figure 55. AD8610 FPBW
Figure 57. No Phase Reversal
Rev. E | Page 16 of 24
AD8610/AD8620
THD Readings vs. Common-Mode Voltage
Settling Time
Total harmonic distortion of the AD8610/AD8620 is well below
0.0006% with any load down to 600 Ω. The AD8610/AD8620
outperform the OPA627 for distortion, especially at frequencies
above 20 kHz.
The AD8610/AD8620 have a very fast settling time, even to a
very tight error band, as can be seen from Figure 60. The AD8610/
AD8620 are configured in an inverting gain of +1 with 2 kΩ input
and feedback resistors. The output is monitored with a 10 X,
10 MΩ, 11.2 pF scope probe.
0.1
1.2k
VS = ±13V
VIN = 5V rms
BW = 80kHz
SETTLING TIME (ns)
1.0k
THD + N (%)
0.01
OPA627
0.001
800
600
400
AD8610
0.0001
10
100
1k
10k
0
0.001
80k
02730-060
02730-058
200
0.01
FREQUENCY (Hz)
0.1
1
10
ERROR BAND (%)
Figure 58. AD8610 vs. OPA627 THD + Noise @ VCM = 0 V
Figure 60. AD8610/AD8620 Settling Time vs. Error Band
0.1
1.2k
VS = ±13V
RL = 600Ω
SETTLING TIME (ns)
THD + N (%)
1.0k
2V rms
0.01
4V rms
800
600
400
6V rms
OPA627
0.001
10
100
1k
10k
0
0.001
20k
FREQUENCY (Hz)
0.01
0.1
1
ERROR BAND (%)
Figure 59. THD + Noise vs. Frequency
Figure 61. OPA627 Settling Time vs. Error Band
Noise vs. Common-Mode Voltage
AD8610/AD8620 noise density varies only 10% over the input
range as shown in Table 5.
Table 5. Noise vs. Common-Mode Voltage
VCM at F = 1 kHz (V)
−10
−5
0
+5
+10
02730-061
02730-059
200
Noise Reading (nV/√Hz)
7.21
6.89
6.73
6.41
7.21
Rev. E | Page 17 of 24
10
AD8610/AD8620
ERROR BAND = ±0.01%
2.0
1.5
1.0
02730-062
0
500
1000
1500
DELTA FROM RESPECTIVE RAIL (V)
ERROR BAND = ±0.01%
SETTLING TIME (µs)
2.5
2.0
1.5
1.0
0.1
1
02730-063
1500
VCC
1
0.1
0.00001
0.5
1000
0.01
10
3.0
500
0.001
Figure 64. AD8610/AD8620 Dropout from ±13 V vs. Load Current
2000
CL (pF)
0
0.0001
LOAD CURRENT (A)
Figure 62. AD8610/AD8620 Settling Time vs. Load Capacitance
0
VEE
VCC
0.1
0.00001
0.5
0
1
VEE
02730-065
SETTLING TIME (µs)
2.5
02730-064
3.0
10
DELTA FROM RESPECTIVE RAIL (V)
The AD8610/AD8620 maintain this fast settling when loaded
with large capacitive loads as shown in Figure 62.
0.0001
0.001
0.01
0.1
1
LOAD CURRENT (A)
Figure 65. OPA627 Dropout from ±15 V vs. Load Current
2000
CL (pF)
Figure 63. OPA627 Settling Time vs. Load Capacitance
Output Current Capability
The AD8610/AD8620 can drive very heavy loads due to its
high output current. It is capable of sourcing or sinking 45 mA
at ±10 V output. The short circuit current is quite high and the
part is capable of sinking about 95 mA and sourcing over 60 mA
while operating with supplies of ±5 V. Figure 64 and Figure 65
compare the load current vs. output voltage of AD8610/
AD8620 and OPA627.
Although operating conditions imposed on the AD8610/AD8620
(±13 V) are less favorable than the OPA627 (±15 V), it can be
seen that the AD8610/AD8620 have much better drive capability
(lower headroom to the supply) for a given load current.
Operating with Supplies Greater than ±13 V
The AD8610/AD8620 maximum operating voltage is specified
at ±13 V. When ±13 V is not readily available, an inexpensive
LDO can provide ±12 V from a nominal ±15 V supply.
Rev. E | Page 18 of 24
AD8610/AD8620
5V
Input Offset Voltage Adjustment
Offset of AD8610 is very small and normally does not require
additional offset adjustment. However, the offset adjust pins can
be used as shown in Figure 66 to further reduce the dc offset. By
using resistors in the range of 50 kΩ, offset trim range is ±3.3 mV.
100Ω
VIN
7
1
3
AD8610
2
10kΩ
5pF
+5V
7
6
1
5
4
VOUT
R1
02730-066
Y0
–VS
1
G
Programmable Gain Amplifier (PGA)
The combination of low noise, low input bias current, low input
offset voltage, and low temperature drift make the AD8610/
AD8620 a perfect solution for programmable gain amplifiers.
PGAs are often used immediately after sensors to increase the
dynamic range of the measurement circuit. Historically, the large
on resistance of switches (combined with the large IB currents
of amplifiers) created a large dc offset in PGAs. Recent and
improved monolithic switches and amplifiers completely remove
these problems. A PGA discrete circuit is shown in Figure 67.
In Figure 67, when the 10 pA bias current of the AD8610 is
dropped across the (<5 Ω) RON of the switch, it results in a
negligible offset error.
A0
A
A1
B
13
VDD
S1
3
1kΩ
D1
2
10kΩ
G = +1
IN1
ADG452 S2
Y1
Figure 66. Offset Voltage Nulling Circuit
When high precision resistors are used, as in the circuit of
Figure 67, the error introduced by the PGA is within the
½ LSB requirement for a 16-bit system.
+5V
12
VL
Y2
Y3
74HC139
16
9
8
14
G = +10
IN2
D2
15
S3
11
D3
10
S4
6
D4
7
1kΩ
G = +100
IN3
100Ω
G = +1000
IN4
VSS
4
GND
11Ω
5
–5V
02730-067
+5V
AD8610
3
VOUT
4
+VS
2
6
5
Figure 67. High Precision PGA
1. Room temperature error calculation due to RON and IB:
ΔVOS = IB × RON = 2 pA × 5 Ω = 10 pV
Total Offset = AD8610 (Offset) + ΔVOS
Total Offset = AD8610 (Offset_Trimmed) + ΔVOS
Total Offset = 5 μV + 10 pV ≅ 5 μV
2. Full temperature error calculation due to RON and IB:
ΔVOS (@ 85°C) = IB (@ 85°C) × RON (@ 85°C) =
250 pA × 15 Ω = 3.75 nV
3. Temperature coefficient of switch and AD8610/AD8620
combined is essentially the same as the TCVOS of the
AD8610/AD8620:
ΔVOS/ΔT(total) = ΔVOS/ΔT(AD8610/AD8620) +
ΔVOS/ΔT(IB × RON)
ΔVOS / ΔT (total ) = 0.5 μV / °C + 0.06 nV/°C ≅ 0.5 μV / °C
Rev. E | Page 19 of 24
AD8610/AD8620
High Speed Instrumentation Amplifier
The three op amp instrumentation amplifiers shown in Figure 68
can provide a range of gains from unity up to 1000 or higher. The
instrumentation amplifier configuration features high commonmode rejection, balanced differential inputs, and stable, accurately
defined gain. Low input bias currents and fast settling are achieved
with the JFET input AD8610/AD8620. Most instrumentation
amplifiers cannot match the high frequency performance of this
circuit. The circuit bandwidth is 25 MHz at a gain of 1, and close to
5 MHz at a gain of 10. Settling time for the entire circuit is 550 ns to
0.01% for a 10 V step (gain = 10). Note that the resistors around
the input pins need to be small enough in value so that the RC
time constant they form in combination with stray circuit capaci­
tance does not reduce circuit bandwidth.
V+
At higher frequencies, the dynamic response of the amplifier
must be carefully considered. In this case, slew rate, bandwidth,
and open-loop gain play a major role in amplifier selection. The
slew rate must be both fast and symmetrical to minimize
distortion. The bandwidth of the amplifier, in conjunction with the
gain of the filter, dictates the frequency response of the filter. The
use of high performance amplifiers such as the AD8610/AD8620
minimizes both dc and ac errors in all active filter applications.
8
3
1/2 AD8620
Second-Order Low-Pass Filter
1
U1
2
4
C5
V– 10pF
V+
R1
1kΩ
7
3
R4
2kΩ
R7
2kΩ
C4
15pF
AD8610
U2
2
RG
R8
2kΩ
6
VOUT
Figure 69 shows the AD8610 configured as a second-order,
Butterworth, low-pass filter. With the values as shown, the corner
frequency of the filter is 1 MHz. The wide bandwidth of the
AD8610/AD8620 allows a corner frequency up to tens of mega­
hertz. The following equations can be used for component
selection:
R1 = R2 = User Selected (Typical Values : 10 kΩ−100 kΩ )
R6
2kΩ
4
V–
(2π )( f CUTOFF )(R1)
C2 =
(2π )( f CUTOFF )(R1)
R5
2kΩ
VIN2
5
1/2 AD8620
6
C3
15pF
7
U1
1.414
C1 =
0.707
where C1 and C2 are in farads.
R2
1kΩ
02730-068
+13V
C2
10pF
VIN
Figure 68. High Speed Instrumentation Amplifier
R2
R1
10kΩ 10kΩ
7
5
3
C2
11pF
AD8610
U1
2
High Speed Filters
C1
22pF
6
VOUT
1
4
The four most popular configurations are Butterworth, Elliptical,
Bessel (Thompson), and Chebyshev. Each type has a response
that is optimized for a given characteristic as shown in Table 6.
–13V
Figure 69. Second-Order Low-Pass Filter
Table 6. Filter Types
Type
Butterworth
Sensitivity
Moderate
Overshoot
Good
Phase
Amplitude (Pass Band)
Max Flat
Chebyshev
Elliptical
Good
Best
Moderate
Poor
Nonlinear
Equal Ripple
Equal Ripple
Bessel (Thompson)
Poor
Best
Linear
Rev. E | Page 20 of 24
02730-069
VIN1
In active filter applications using operational amplifiers, the dc
accuracy of the amplifier is critical to optimal filter performance.
The offset voltage and bias current of the amplifier contribute to
out-put error. Input offset voltage is passed by the filter, and can
be amplified to produce excessive output offset. For low frequency
applications requiring large value input resistors, bias and offset
currents flowing through these resistors also generate an offset
voltage.
AD8610/AD8620
High Speed, Low Noise Differential Driver
Rev. E | Page 21 of 24
V+
3
V+
3
6
2
R4
1kΩ
AD8610
V–
R3
1kΩ
1
R8
1kΩ
0
R9
1kΩ
2
R10
1/2 AD8620 50Ω
U2
V–
5
R7
1kΩ
R11
50Ω
7
R5
1kΩ
R6
10kΩ
R12
1kΩ
R1
1kΩ
V+
6
VO1
R13
1kΩ
VO2
1/2 AD8620
V–
U3
R2
1kΩ
Figure 70. Differential Driver
VO2 – VO1 = VIN
0
02730-070
The AD8620 is a perfect candidate as a low noise differential
driver for many popular ADCs. There are also other applica­
tions (such as balanced lines) that require differential drivers.
The circuit of Figure 70 is a unique line driver widely used in
industrial applications. With ±13 V supplies, the line driver can
deliver a differential signal of 23 V p-p into a 1 kΩ load. The
high slew rate and wide bandwidth of the AD8620 combine to
yield a full power bandwidth of 145 kHz while the low noise
front end produces a referred-to-input noise voltage spectral
density of 6 nV/√Hz. The design is a balanced transmission system
without transformers, where output common-mode rejection of
noise is of paramount importance. Like the transformer-based
design, either output can be shorted to ground for unbalanced
line driver applications without changing the circuit gain of 1.
This allows the design to be easily set to noninverting, invert­
ing, or differential operation.
AD8610/AD8620
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
3.20
3.00
2.80
1
5
4.00 (0.1574)
3.80 (0.1497)
5.15
4.90
4.65
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
0.65 BSC
0.95
0.85
0.75
COPLANARITY
0.10
SEATING
PLANE
1.10 MAX
0.38
0.22
COPLANARITY
0.10
6.20 (0.2440)
5.80 (0.2284)
4
PIN 1
0.15
0.00
8
1
0.23
0.08
8°
0°
0.80
0.60
0.40
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 71. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 72. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
AD8610AR
AD8610AR-REEL
AD8610AR-REEL7
AD8610ARZ 1
AD8610ARZ-REEL1
AD8610ARZ-REEL71
AD8610ARM-REEL
AD8610ARM-R2
AD8610ARMZ-REEL1
AD8610ARMZ-R21
AD8610BR
AD8610BR-REEL
AD8610BR-REEL7
AD8610BRZ1
AD8610BRZ-REEL1
AD8610BRZ-REEL71
AD8620AR
AD8620AR-REEL
AD8620AR-REEL7
AD8620ARZ1
AD8620ARZ-REEL1
AD8620ARZ-REEL71
AD8620BR
AD8620BR-REEL
AD8620BR-REEL7
AD8620BRZ1
AD8620BRZ-REEL1
AD8620BRZ-REEL71
1
Temperature Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Package Description
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Z = Pb-free part, # denotes lead-free product can be top or bottom marked.
Rev. E | Page 22 of 24
45°
Package Option
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
Branding
B0A
B0A
B0A#
B0A#
060506-A
8
3.20
3.00
2.80
AD8610/AD8620
NOTES
Rev. E | Page 23 of 24
AD8610/AD8620
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02730-0-11/06(E)
Rev. E | Page 24 of 24