AS5047P 14-bit On-Axis Magnetic Rotary Position Sensor with 12-Bit Decimal & Binary Incremental Pulse Count for 28krpm high speed capability General Description The AS5047P is a high-resolution rotary position sensor for high speed (up to 28krpm) angle measurement over a full 360 degree range. This new position sensor is equipped with revolutionary integrated dynamic angle error compensation (DAEC™) with almost 0 latency and offers a robust design that suppresses the influence of any homogenous external stray magnetic field. A standard 4-wire SPI serial interface allows a host microcontroller to read 14-bit absolute angle position data from the AS5047P and to program non-volatile settings without a dedicated programmer. Incremental movements are indicated on a set of ABI signals with a maximum resolution of 4000 steps / 1000 pulses per revolution in decimal mode and 4096 steps / 1024 pulses per revolution in binary mode. The resolution of the ABI signal is programmable and can be reduced to 100 steps per revolution, or 25 pulses per revolution. Brushless DC (BLDC) motors are controlled through a standard UVW commutation interface with a programmable number of pole pairs from 1 to 7. The absolute angle position is also provided as PWM-encoded output signal The AS5047P is available as a single die in a compact 14-pin TSSOP package. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS5047P, 14-bit On-Axis Magnetic Rotary Position Sensor with 12-Bit Decimal & Binary Incremental Pulse Count for 28krpm high speed capability are listed below: Figure 1: Added Value of using the AS5047P Benefits Features High speed application Up to 28krpm Easy to use – saving costs on DSP DAEC™ Dynamic angle error compensation Good resolution for motor & position control 14-bit core resolution ams Datasheet [v1-00] 2014-Oct-31 Page 1 Document Feedback AS5047P − General Description Benefits Features Simple optical encoder replacement ABI programmable decimal and binary pulse-count: 1000,500,400,300,200,100,50,25,1024,512,256 ppr No programmer needed (via SPI command) Zero position, configuration programmable Versatile choice of the interface Independent output interfaces: SPI, ABI, UVW, PWM Lower system costs (no shielding) Immune to external stray field Applications The AS5047P is ideally suited to support BLDC motor commutation for the most challenging industrial applications such as factory automation, building automation, robotics, PMSM (permanent magnet synchronous motor) and stepper motors closed loop in as well optical encoder replacement. Block Diagram The functional blocks of this device for reference are shown below: Figure 2: AS5047P Block Diagram VDD3V3 CSn SCL MISO MOSI Volatile Memory SPI VDD OTP LDO ABI Hall Sensors Analog Front-End A/D AGC ATAN (CORDIC) INTERPOLATOR Dynamic Angle Error Compensation UWV A B I/PWM U V W / PWM PWM Decoder Selectable on I or W GND Page 2 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Pin Assignment Pin Assignment Figure 3: TSSOP-14 Pin Assignment I / PWM CLK GND MISO MOSI TEST AS5047P CSn B VDD3V VDD U V A W / PWM Figure 4: Pin Description Pin Number Pin Name Pin Type 1 CSn Digital input SPI chip select (active low) 2 CLK Digital input SPI clock 3 MISO Digital output SPI master data input, slave output 4 MOSI Digital input SPI master data output, slave input 5 Test 6 B Digital output Incremental signal B 7 A Digital output Incremental signal A ams Datasheet [v1-00] 2014-Oct-31 Description Test pin (connect to ground) Page 3 Document Feedback AS5047P − Pin Assignment Pin Number Pin Name Pin Type Description 8 W/PWM Digital output Commutation signal W or PWM 9 V Digital output Commutation signal V 10 U Digital output Commutation signal U 11 VDD Power supply 5V power supply voltage for on-chip regulator 12 VDD3V3 Power supply 3.3V on-chip low-dropout (LDO) output. Requires an external decoupling capacitor (1uF) 13 GND Power supply Ground 14 I Digital output Incremental signal I (index) or PWM Note(s) and/or Footnote(s): 1. Floating state of a digital input is not allowed. 2. If SPI is not used, an Pull up resistor on CSn is required. 3. If SPI is not used, an Pull down resistor on CLK is required. Page 4 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Absolute Maximum Ratings Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Electrical Characteristics” is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 5: Absolute Maximum Ratings Symbol Parameter Min Max Units VDD5 DC supply voltage at VDD pin -0.3 7.0 V VDD3 DC supply voltage at VDD3V3 pin -0.3 5.0 V VSS DC supply voltage at GND pin -0.3 0.3 V Vin Input pin voltage VDD+0.3 V Iscr Input current (latch-up immunity) 100 mA Norm: AEC-Q100-004 ESD Electrostatic discharge kV Norm: AEC-Q100-002 Pt Total power dissipation (all supplies and outputs) Ta5V0 Ambient temperature 5V0 Ta3V3 TaProg -100 ±2 Note 150 mW -40 125 °C In the 5.0V power supply mode only Ambient temperature 3V3 -40 125 °C In the 3.3V power supply mode if NOISESET = 0 Programming Temperature 5 45 °C Programming @ Room temperature (25°C ± 20°C) -55 150 °C 260 °C 85 % Tstrg Storage temperature Tbody Package body temperature Humidity non-condensing Moisture sensitivity level ams Datasheet [v1-00] 2014-Oct-31 5 3 Norm: IPC/JEDEC J-STD-020 Represents a maximum floor lifetime of 168h Page 5 Document Feedback AS5047P − Electrical Characteristics Electrical Characteristics All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Figure 6: Electrical Characteristics Symbol Parameter VDD Positive supply voltage VDD3V3 VDD_Burn Min Typ Max Units 5.0V operation mode 4.5 5.0 5.5 V Positive supply voltage 3.3V operation mode; only from -40 to 125°C 3.0 3.3 3.6 V Positive supply voltage Supply voltage required for programming in 3.3V operation 3.3 3.5 V Regulated Voltage Voltage at VDD3V3 pin if VDD ≠ VDD3V3 3.2 3.6 V VporON Internal POR-ON level 3V operation. Pin VDD5 & VDD3 shorted 2.3 2.85 V VporOFF Internal POR-OFF level 3V operation. Pin VDD5 & VDD3 shorted 2.05 2.65 V Vporh Internal POR hysteresis 150 300 mV 15 mA VREG Conditions 3.4 IDD Supply current VIH High-level input voltage VIL Low-level input voltage VOH High-level output voltage VOL Low-level output voltage VSS+0.4 V I_Out Current on digital output 1 mA C_L Capacitive load on digital output 50 pf Page 6 Document Feedback 0.7×VDD V 0.3×VDD VDD-0.5 V V ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Magnetic Characteristics Magnetic Characteristics Figure 7: Magnetic Specifications Symbol Parameter Conditions Min Max Unit Bz Orthogonal magnetic field strength, normal operating mode Required orthogonal component of the magnetic field strength measured at the die's surface along a circle of 1.1mm 35 70 mT Note(s) and/or Footnote(s): 1. it is possible to operate the AS5047P below 35mT with reduced noise performance. System Characteristics Figure 8: System Specifications Symbol RES Parameter Conditions Min Core resolution RES_ABI Resolution of the ABI interface INLOPT @ 25°C Typ Max 14 bit 4096 Steps per revolution Non-linearity, optimum placement of the magnet ±0.8 Deg INLOPT+TEMP Non-linearity optimum placement of the magnet over the full Temperature Range ±1 Deg INLDIS+TEMP Non-linearity @ displacement of magnet and temperature -40°C to 150°C ±1.2 Deg ONL RMS output noise (1 sigma). Not tested, guaranteed by design. Orthogonal component for the magnetic field within the specified range (Bz), NOISESET = 0 0.068 degree RMS output noise (1 sigma) on PWM interface Orthogonal component for the magnetic field within the specified range (Bz) 0.068 degree System propagation delay –core Reading angle via SPI 110 μs ON_PWM tdelay ams Datasheet [v1-00] 2014-Oct-31 Programmable with register setting (ABIRES) Units 100 Assuming N35H Magnet (D=8mm, H=3mm) 500um displacement in x and y z-distance @ 2000um 90 Page 7 Document Feedback AS5047P − Timing Characteristics Symbol Parameter tdelay_ System propagation delay after dynamic angle error correction. At ABI and UVW interfaces 1.5 Sampling rate Refresh rate at SPI 202 DAE1700 Dynamic angle error DAEmax DAEacc DAEC tsampl MS Conditions Min Typ Max Units 1.9 μs 247 ns At 1700 RPM constant speed 0.02 degree Dynamic angle error At 14500 RPM constant speed 0.18 degree Dynamic angle error at constant acceleration (25krad/s²) 25k radians/s² constant acceleration 0.175 degree 28000 RPM 222 Maximum speed Reference magnet: N35H, 8mm diameter; 3mm thickness. Timing Characteristics Figure 9: Timing Specifications Symbol tpon Parameter Power-on time Page 8 Document Feedback Conditions Min Typ Max Units 10 ms ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description Detailed Description The AS5047P is a Hall-effect magnetic sensor using a CMOS lateral technology. The lateral Hall sensors convert the magnetic field component perpendicular to the surface of the chip into a voltage. The signals from the Hall sensors are amplified and filtered by the analog front-end (AFE) before being converted by the analog-to-digital converter (ADC). The output of the ADC is processed by the hardwired CORDIC (coordinate rotating digital computer) block to compute the angle and magnitude of the magnetic vector. The intensity of the magnetic field (magnitude) is used by the automatic gain control (AGC) to adjust the amplification level for compensation of the temperature and magnetic field variations. The internal 14-bit resolution is available by reading a register through the SPI interface. The resolution on the ABI output can be programmed from 4096 to 100 steps per revolution. The Dynamic Angle Error Compensation block corrects the calculated angle for latency using a linear prediction calculation algorithm. At constant rotation speed the latency time is internally compensated by the AS5047P, reducing the dynamic angle error at the SPI, ABI and UVW outputs. The AS5047P allows to switch OFF the UVW output interface to display the absolute angle as PWM-encoded signal on the pin W. At higher speeds, the interpolator fills in missing ABI pulses and generates the UVW signals with no loss of resolution. The non-volatile settings in the AS5047P can be programmed through the SPI interface without any dedicated programmer. The AS5047P is built for high speed application up to 28krpm. Power Management The AS5047P can be either powered from a 5.0V supply using the on-chip low-dropout regulator or from a 3.3V voltage supply. The LDO regulator is not intended to power any other loads, and it needs a 1 μF capacitor to ground located close to the chip for decoupling as shown in Figure 10. In 3.3V operation, VDD and VREG must be tied together. ams Datasheet [v1-00] 2014-Oct-31 Page 9 Document Feedback AS5047P − Detailed Description Figure 10: 5.0V and 3.3V Power Supply Options 5.0V Operation 4.5 - 5.5V VDD LDO 100nF 3.3V Operation VDD3V3 3.0 – 3.6V 1µF 100nF GND VDD VDD3V3 LDO GND AS5047P AS5047P After applying power to the chip, the power-on time (t pon ) must elapse before the AS5047P provides the first valid data. Dynamic Angle Error Compensation The AS5047P uses 4 integrated Hall sensors which produce a voltage proportional to the orthogonal component of the magnetic field to the die. These voltage signals are amplified, filtered, and converted into the digital domain to allow the CORDIC digital block to calculate the angle of the magnetic vector. Propagation of these signals through the analog front-end and digital back-end generates a fixed delay between the time of measurement and the availability of the measured angle at the outputs. This latency generates a dynamic angle error represented by the product of the angular speed (ω)and the system propagation delay (t delay): DAE = ω x t delay The dynamic angle compensation block calculates the current magnet rotation speed (ω) and multiplies it with the system propagation delay (tdelay) to determine the correction angle to reduce this error. At constant speed, the residual system propagation delay is tdelay_DAEC. The angle represented on the PWM interface is not compensated by the Dynamic Angle Error Compensation algorithm. it is also possible to disable the Dynamic Angle Error Compensation with the setting DAECDIS. Disabling the Dynamic Angle Error Compensation gives a noise benefit of 0.016 degree rms.This setting can be advantageous for low speed (under 100rpm) respectively static positioning applications. Page 10 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description SPI Interface (slave) The SPI interface is used by a host microcontroller (master) to read or write the volatile memory as well as to program the non-volatile OTP registers. The AS5047P SPI only supports slave operation mode. It communicates at clock rates up to 10 MHz. The AS5047P SPI uses mode=1 (CPOL=0, CPHA=1) to exchange data. As shown in Figure 11, a data transfer starts with the falling edge of CSn (SCL is low). The AS5047P samples MOSI data on the falling edge of SCL. SPI commands are executed at the end of the frame (rising edge of CSn). The bit order is MSB first. Data is protected by parity. SPI Timing The AS5047P SPI timing is shown in Figure 11. Figure 11: SPI Timing Diagram tCSn CSn (Input) tL tclk tclkL tclkH tH CLK (Input) tMISO tOZ MISO (Output) Data[15] Data[14] Data[0] tOZ tMOSI MOSI (Input) ams Datasheet [v1-00] 2014-Oct-31 Data[15] Data[14] Data[0] Page 11 Document Feedback AS5047P − Detailed Description Figure 12: SPI Timing Parameter Description Min tL Time between CSn falling edge and CLK rising edge 350 ns tclk Serial clock period 100 ns tclkL Low period of serial clock 50 ns tclkH High period of serial clock 50 ns tclk / 2 ns Time between last falling edge of CLK and rising edge of CSn tH Max Units tCSn High time of CSn between two transmissions 350 ns tMOSI Data input valid to falling clock edge 20 ns tMISO CLK edge to data output valid 51 ns Release bus time after CS rising edge. 10 ns tOZ SPI Transaction An SPI transaction consists of a 16-bit command frame followed by a 16-bit data frame. Figure 13 shows the structure of the command frame. Figure 13: SPI Command Frame Bit Name Description 15 PARC Parity bit (even) calculated on the command frame 14 R/W 0: Write 1: Read 13:0 ADDR Address to read or write To increase the reliability of communication over the SPI, an even parity bit PARC must be generated and sent. A wrong setting of the parity bit causes the PARERR bit in the error flag register to be set. The parity bit is calculated from the 16-bit command frame. The 16-bit command specifies whether the transaction is a read or a write and the address. Page 12 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description Figure 14 shows the read data frame. Figure 14: SPI Read Data Frame Bit Name 15 PARD 14 EF 13:0 DATA Description Parity bit (even) for the data frame 0: No command frame error occurred 1: Error occurred Data The data is sent on the MISO pin. The parity bit PARD is calculated by the AS5047P for the 16-bit data frame. If an error is detected in the previous SPI command frame, the EF bit is set high. The SPI read is sampled on the rising edge of CSn and the data is transmitted on MISO with the next read command, as shown in Figure 15. Figure 15: SPI Read CSn MOSI MISO Command Command Command Command Read ADD[n] Read ADD[k] Read ADD[p] Read ADD[m] Data Data Data Data ADD[n] Data ADD[k] Data ADD[p] Figure 16: SPI Write Data Frame ams Datasheet [v1-00] 2014-Oct-31 Bit Name Description 15 PARD Parity bit (even) 14 0 Always low 13:0 DATA Data Page 13 Document Feedback AS5047P − Detailed Description The parity bit PARD must be calculated from the 16-bit data. In an SPI write transaction, the write command frame (e.g. Write ADD[n]) is followed by a data frame (e.g. DATA [x]). In addition to writing an address in the AS5047P, a write command frame causes the old contents of the addressed register (e.g. DATA [y]) to be sent on MISO in the following frame. This is followed by the new contents of the addressed register (DATA [x]) as shown in Figure 18. Figure 17: SPI Write Transaction CSn MOSI Command Data to write into ADD[n] Command Data to write into ADD[n] Command Write ADD[n] DATA (x) Write (ADDm) DATA (y) Next command Data content of ADD[n] New Data content of ADD[n] DATA (y) DATA (x) MISO Page 14 Document Feedback Data content of ADD[m] DATA (p) New Data content of ADD[m] DATA (y) ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description Volatile Registers The volatile registers are shown in Figure 18. Each register has a 14-bit address. Figure 18: Volatile Register Table Address Name Default Description 0x0000 NOP 0x0000 No operation 0x0001 ERRFL 0x0000 Error register 0x0003 PROG 0x0000 Programming register 0x3FFC DIAAGC 0x0180 Diagnostic and AGC 0x3FFD MAG 0x0000 CORDIC magnitude 0x3FFE ANGLEUNC 0x0000 Measured angle without dynamic angle error compensation 0x3FFF ANGLECOM 0x0000 Measured angle with dynamic angle error compensation Reading the NOP register is equivalent to a nop (no operation) instruction for the AS5047P. Figure 19: ERRFL (0x0001) Name Read/Write Bit Position Description PARERR R 2 Parity error INVCOMM R 1 Invalid command error: set to 1 by reading or writing an invalid register address FRERR R 0 Framing error: is set to 1 when a non-compliant SPI frame is detected Reading the ERRFL register automatically clears its contents (ERRFL=0x0000). ams Datasheet [v1-00] 2014-Oct-31 Page 15 Document Feedback AS5047P − Detailed Description Figure 20: PROG (0x0003) Name Read/Write Bit Position Description PROGVER R/W 6 Program verify: must be set to 1 for verifying the correctness of the OTP programming PROGOTP R/W 3 Start OTP programming cycle OTPREF R/W 2 Refreshes the non-volatile memory content with the OTP programmed content PROGEN R/W 0 Program OTP enable: enables programming the entire OTP memory The PROG register is used for programming the OTP memory. (See programming the zero position.) Figure 21: DIAAGC (0x3FFC) Name Read/Write Bit Position Description MAGH R 11 Diagnostics: Magnetic field strength too low; AGC=0xFF MAGL R 10 Diagnostics: Magnetic field strength too high; AGC=0x00 COF R 9 Diagnostics: CORDIC overflow LF R 8 Diagnostics: Offset compensation LF=0:internal offset loops not ready regulated LF=1:internal offset loop finished AGC R 7:0 Automatic gain control value Figure 22: MAG (0x3FFD) Name Read/Write Bit Position CMAG R 13:0 Name Read/Write Bit Position CORDICANG R 13:0 Description CORDIC magnitude information Figure 23: ANGLE (0x3FFE) Page 16 Document Feedback Description Angle information without dynamic angle error compensation ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description Figure 24: ANGLECOM (0x3FFF) Name Read/Write Bit Position DAECANG R 13:0 Description Angle information with dynamic angle error compensation Non-Volatile Registers (OTP) A nonvolatile memory (One-Time Programmable) is used store the zero position of the magnet and custom settings. Figure 25: Non-Volatile Register Table Address Name Default Description 0x0016 ZPOSM 0x0000 Zero position MSB 0x0017 ZPOSL 0x0000 Zero position LSB /MAG diagnostic 0x0018 SETTINGS1 0x0000 Custom setting register 1 0x0019 SETTINGS2 0x0000 Custom setting register 2 0x001A RED 0x0000 Redundancy register Figure 26: ZPOSM (0x0016) Name Read/Write/Program Bit Position ZPOSM R/W/P 7:0 Description 8 most significant bits of the zero position Figure 27: ZPOSL (0x0017) Name Read/Write/Program Bit Position Description ZPOSL R/W/P 5:0 6 least significant bits of the zero position comp_l_error_en R/W/P 6 This bit enables the contribution of MAGH (Magnetic field strength too high) to the system_error comp_h_error_en R/W/P 7 This bit enables the contribution of MAGL (Magnetic field strength too low) to the system_error ams Datasheet [v1-00] 2014-Oct-31 Page 17 Document Feedback AS5047P − Detailed Description Figure 28: SETTINGS1 (0x0018) Name Read/Write/Program Bit Position Description Factory Setting R 0 Pre-Programmed to 1 NOISESET R/W/P 1 Noise setting DIR R/W/P 2 Rotation direction UVW_ABI R/W/P 3 Defines the PWM Output (0 = ABI is operating, W is used as PWM 1 = UVW is operating, I is used as PWM) DAECDIS R/W/P 4 Disable Dynamic Angle Error Compensation (0 = DAE compensation ON, 1 = DAE compensation OFF) ABIBIN R/W/P 5 ABI decimal or binary selection of the ABI pulses per revolution Dataselect R/W/P 6 This bit defines which data can be read form address 16383dec (3FFFhex). 0->DAECANG 1->CORDICANG PWMon R/W/P 7 enables PWM (setting of UVW_ABI Bit necessary) Page 18 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description Figure 29: SETTINGS2 (0x0019) Name Read/Write/Program Bit Position Description UVWPP R/W/P 2:0 UVW number of pole pairs (000 = 1, 001 = 2, 010 = 3, 011 = 4, 100 = 5, 101 = 6, 110 = 7, 111 = 7) HYS R/W/P 4:3 Hysteresis setting ABIRES R/W/P 7:5 Resolution of ABI Figure 30: RED (0x001A) Name REDUNDANCY ams Datasheet [v1-00] 2014-Oct-31 Read/Write/Program R/W/P Bit Position Description 4:0 Redundancy bits. This field enables with force to high one bit of the Non-Volatile register map after a non-successful burning. For more details please refer to the application note “AN5000 – AS5147_Redundancy_Bits” Page 19 Document Feedback AS5047P − Detailed Description ABI Incremental Interface The AS5047P can send the angle position to the host microcontroller through an incremental interface. This interface is available simultaneously with the other interfaces. By default, the incremental interface is set to work at the highest resolution 4096 step per revolution, or 1024 pulses per revolution (ppr). It is possible to select between a decimal and binary pulses per revolution, respectively with the bit ABIBIN and select the pulses per revolution with the bit ABIRES as shown in Figure 31. Figure 31: ABI Resolution Setting ABIRES ABIBIN Steps per revolution Pulses per revolution 000 0 4000 1000 001 0 2000 500 010 0 1600 400 011 0 1200 300 100 0 800 200 101 0 400 100 110 0 200 50 111 0 100 25 000 1 4096 1024 001 1 2048 512 010 1 1024 256 The phase shift between the signals A and B indicates the rotation direction: e.g. DIR-Bit = 0, clockwise (A leads, B follows) or counterclockwise (B leads, A follows). During the start-up time, after power ON to the chip, all three ABI signals are high. Page 20 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description Figure 32: ABI Signals at 11-Bit Resolution A B I Steps N-7 N-6 N-5 N-4 N-3 N-2 N-1 0 1 Clockwise rotation 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 N-1 N-2 N-3 N-4 Counter-clockwise rotation The Figure 32 shows the ABI signal flow if the magnet rotates in clockwise direction, placing the magnet on the top of the AS5047P and looking at the magnet from the top (DIR=0). With the bit DIR, it is possible to invert the rotation direction. ams Datasheet [v1-00] 2014-Oct-31 Page 21 Document Feedback AS5047P − Detailed Description UVW Commutation Interface The AS5047P can emulate the UVW signals generated by the three discrete Hall switches commonly used in BLDC motors. The UVWPP field in the SETTINGS register selects the number of pole pairs of the motor (from 1 to 7 pole pairs). The UVW signals are generated with 14-bit resolution. During the start-up time, after power ON of the chip, the UVW signals are low. Figure 33: UVW Signals U V W Electrical Angle 0° 60° 120° 180° 240° 300° 360° The Figure 33 shows the UVW signal flow if the magnet rotates in clockwise direction, placing the magnet on the top of the AS5047P and looking at the magnet from the top (DIR=0). With the bit DIR, it is possible to invert the rotation direction. Page 22 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description PWM The PWM can be enabled with the bit setting PWMon. The PWM encoded signal is displayed on the pin W or the pin I. The bit setting UVW_ABI defines which output is used as PWM.The PWM output consists of a frame of 4119 PWM clock periods, as shown in Figure 34. The PWM frame has the following sections: • 12 PWM Clocks for INIT • 4 PWM Clocks for Error detection • 16 PWM clock periods high • 4095 PWM clock periods of data • 8 PWM clock periods low The angle is represented in the data part of the frame with a 12-bit resolution. One PWM clock period represents 0.088 degree and has a typical duration of 444 ns. If the embedded diagnostic of the AS5047P detects any error the PWM interface displays only 12 clock periods high (0.3% duty-cycle). 16 clock pulse high ams Datasheet [v1-00] 2014-Oct-31 4089 4090 4091 4092 4093 4094 4095 0 1 2 3 4 5 6 7 8 Error_n Init Figure 34: Pulse Width Modulation Encoded Signal data 8 clock pulse low time Page 23 Document Feedback AS5047P − Detailed Description Hysteresis The hysteresis can be programmed in the HYS bits if the SETTINGS2 register and depends on the chosen resolution of the incremental interface (ABIRES), as shown in the Figure 35. Figure 35: Hysteresis Settings HYS Hysteresis related to 11 Bit ABI Resolution 00 3 01 2 10 1 11 0 Automatic Gain Control (AGC) and CORDIC Magnitude The AS5047P uses AGC to compensate for variations in the magnetic field strength due to changes of temperature, air gap between the chip and the magnet, and demagnetization of the magnet. The automatic gain control value can be read in the AGC field of the DIAAGC register. Within the specified input magnetic field strength (Bz), the Automatic Gain Control works in a closed loop and keeps the CORDIC magnitude value (MAG) constant. Below the minimum input magnetic field strength, the CORDIC magnitude decreases and the MAGL bit is set. Diagnostic Features The AS5047P supports embedded self-diagnostics. MAGL: magnetic field strength too high, set if AGC = 0xFF. This indicates the non-linearity error may be increased. MAGH: magnetic field strength too low, set if AGC = 0x00 . This indicates the output noise of the measured angle may be increased. COF: CORDIC overflow. This indicates the measured angle is not reliable. LF: offset compensation completed. At power-up, an internal offset compensation procedure is started, and this bit is set when the procedure is completed. Page 24 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Detailed Description OCF Error / COF Error In case of an OCF or COF error, all outputs are changing into a safe state: SPI Output: Information in the DIAAGC (0x3FFC) register. The angle information is still valid. PWM Output: PWM Clock Period 13 - 16 of the first 16 PWM Clock Periods = low. Additional there is no angle information valid (all 4096 clock periods = low) ABI Output : The state of ABI is frozen to ABI = 111 UVW Output : The state of UVW is frozen to UVW = 000 MAGH Error /MAGL Error Default diagnostic setting for MAGH error /MAGL error: In case of a MAGH error or MAGL error, there is no safe state on the PWM,ABI or UVW outputs if comp_h_error_en= 0 & comp_h_error_en = 0. The device is operating with the performance as explained. The error flags can be read out with the DIAAGC (0x3FFC) register. Enhanced diagnosis setting for MAGH error / MAGL error: In case of a MAGH error or MAGL error, the PWM,ABI or UVW outputs are going into a safe state if comp_h_error_en= 1 & comp_h_error_en = 1. SPI Output: Information in the DIAAGC (0x3FFC) register. The angle information is still valid, if the MAGH or MAGL error flag is on. PWM Output: PWM Clock Period 13 - 16 of the first 16 PWM Clock Periods = low. Additional there is no angle information valid (all 4096 clock periods = low) ABI Output : The state of ABI is frozen to ABI = 111 UVW Output : The state of UVW is frozen to UVW = 000 Important: When comp_(h/l)_error_en is enabled a marginal magnetic field input can cause toggling of MAGH or MAGL which will lead to toggling of the ABI/UVW outputs between operational mode and failure mode. ams Datasheet [v1-00] 2014-Oct-31 Page 25 Document Feedback AS5047P − Application Information Application Information Burn and Verification of the OTP Memory Step-by-step procedure to permanently program the non-volatile memory (OTP): Figure 36: Minimum Programming Diagram for the AS5047P in 5 V Operation 5V operation VDD during programming 4.5 – 5.5V VDD CSn I CLK GND MISO Programmer TEST A B AS5047P MOSI VDD3V VDD U V 100nF 1μF W GND Note(s) and/or Footnote(s): 1. In terms of EMC and for remote application, additional circuits are necessary. Page 26 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Application Information Figure 37: Minimum Programming Diagram for the AS5047P in 3.3V Operation 3.3V operation VDD during programming: 3.3V – 3.5V VDD CSn I CLK GND MISO TEST Programmer A VDD3V AS5047P MOSI B VDD U V 100nF W GND Note(s) and/or Footnote(s): 1. In terms of EMC and for remote application, additional circuits are necessary. Figure 38: Programming Parameter Symbol Parameter Conditions Min TaProg Programming temperature Programming @ Room Temperature (25°C +-20°C VDD Positive supply voltage 5 V operation mode. Supply voltage during programming 4.5 VDD Positive supply voltage 3.3 V operation mode. Supply voltage during programming 3.3 IProg Current for programming max current during OTP burn procedure. ams Datasheet [v1-00] 2014-Oct-31 Typ 5 5 Max Units 45 °C 5.5 V 3.5 V 100 mA Page 27 Document Feedback AS5047P − Application Information The programming can either be performed in 5V operation using the internal LDO (1uF on regulator output pin), or in 3V Operation but using a supply voltage between 3.3V and 3.5V. 1. Power ON cycle 2. Write the SETTINGS1 and SETTINGS2 registerswith the Custom settings for this application (Bit0 of Settings1 is a factory bit. For programming its mandatory to set this bit to 0). 3. Position the magnet at the desired zero position 4. Read out the measured angle from the ANGLE register 5. Write ANGLE [5:0] into the ZPOSL register and ANGLE [13:6] into the ZPOSM register 6. Read reg(0x0016) to reg(0x0019) → Read register step1 7. Comparison of written content (settings and angle) with content of read register step1 (Removing of Bit0 of Settings1 from the comparison is mandatory. Bit0 is preprogrammed) 8. If point 7 is correct, enable OTP read / write by setting PROGEN = 1 in the PROG register 9. Start the OTP burn procedure by setting PROGOTP = 1 in the PROG register 10. Read the PROG register until it reads 0x0000 (Programming procedure complete) 11. Clear the memory content writing 0x00 in the whole non-volatile memory 12. Enable OTP read / write by setting PROGEN = 1 in the PROG register 13. Set the PROGVER = 1 to set the Guard band for the guard band test(1). 14. Refresh the non-volatile memory content with the OTP content by setting OTPREF = 1 Page 28 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Application Information 15. Read reg(0x0016) to reg(0x0019) → Read register step2 16. Comparison of written content (settings and angle) with content of read register step2. Mandatory: guard band test (Removing of Bit0 of Settings1 from the comparison is mandatory. Bit0 is preprogrammed) 17. New power ON cycle, if point 16 is correct. If point 16 fails, the test with the guard band test 1 was not successful and the device is incorrectly programmed. A reprogramming is not allowed! 18. Read reg(0x0016) to reg(0x0019) → Read register step3 19. Comparision of written content (settings and angle) with content of read register step3(Removing of Bit0 of Settings1 from the comparison is mandatory. Bit0 is preprogrammed). 20. If point 19 is correct, the programming was successful. If point 19 fails, device is incorrectly programmed. A reprogramming is not allowed 1. Guard band test: - Restricted to temperature range: 25 °C ± 20 °C - Right after the programming procedure (max. 1 hour with same - Conditions 25°C ± 20 °C) - Same VDD voltage The guard band test is only for the verification of the burned OTP fuses during the programming sequence. A use of the guard band in other cases is not allowed. ams Datasheet [v1-00] 2014-Oct-31 Page 29 Document Feedback AS5047P − Application Information Figure 39: OTP Memory Burn and Verification Flowchart Power on cycle START AS5047P settings Write reg(0x0018) Write reg(0x0019) Position of the magnet to the zero position Read ANGLE Write Reg(0x0016)=0x00 Reg(0x0017)=0x00 Reg(0x0018=0x00 Reg(0x0019)=0x00 Clear memory Write Reg(0x0003)=0x08 Set the magnet to the zero position Unlock OTParea for read/write (PROGEN=1) Write Reg(0x0003)=0x40 Not correct Read reg(0x3FFF) Write Angle into ZPOSL and ZPOSM Write Reg(0x0017(5:0))= reg(0x3FFF(5:0)) Reg(0x0016(7:0))= reg(0x3FFF(13:6)) Read Register step 1 Read Reg(0x0016) Reg(0x0017) Reg(0x0018) Reg(0x0019) Set Guardband Refresh memory with OTP content Write Reg(0003)=0x04 Read Reg(0x0016) Reg(0x0017) Reg(0x0018) Reg(0x0016) Verify 2 Read Register step 2 Not correct Comparison of written content (settings and angle) with content of Read Register step 2* Mandatory Guardband-Test YES correct Comparison of written content (settings and angle) with content of Read Register step 1* Verify 1 Power-on cycle Guardbandtest fails. Wrong programming. Reprogramming not allowed correct Unlock OTParea for read/write (PROGEN=1) Write Reg(0x0003)=0x01 Read Reg(0x0016) Reg(0x0017) Reg(0x0018) Reg(0x0016) Start OTP burning procedure (PROGOTP=1) Write Reg(0x0003)=0x08 Verify 3 Read Register step 3 Not correct Comparison of written content (settings and angle) with content of Read Register step 3* correct Read OTP_CTRL END Correct programming and verification Read Reg(0x0003) END Wrong programming Reprogramming not allowed NO OTP burning procedure complete if Reg(0x0003) =0x00 Reg(0x0003)=0x00 * During the comparison the bit0 of settings1 has to be ignored. This bit is pre-programmed. Page 30 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Application Information Figure 40: Minimum Circuit Diagram for the AS5047P 4.5 – 5.5V VDD I CSn CLK GND MOSI MCU TEST A VDD3V AS5047P MISO B VDD U V 100nF 1μF W GND Note(s) and/or Footnote(s): 1. In terms of EMC and for remote application, additional circuits are necessary. ams Datasheet [v1-00] 2014-Oct-31 Page 31 Document Feedback AS5047P − Package Drawings & Markings The axis of the magnet must be aligned over the center of the package. Package Drawings & Markings Figure 41: Package Outline Drawing Green RoHS Symbol Min Nom Max Symbol Min Nom Max A - - 1.20 R 0.09 - - A1 0.05 - 0.15 R1 0.09 - - A2 0.80 1.00 1.05 S 0.20 - - b 0.19 - 0.30 Θ1 0º - 8º c 0.09 - 0.20 Θ2 - 12 REF - D 4.90 5.00 5.10 Θ3 - 12 REF - E - 6.40 BSC - aaa - 0.10 - E1 4.30 4.40 4.50 bbb - 0.10 - e - 0.65 BSC - ccc - 0.05 - L 0.45 0.60 0.75 ddd - 0.20 - L1 - 1.00 REF - N 14 Note(s) and/or Footnote(s): 1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994. 2. All dimensions are in millimeters. Angles are in degrees. 3. N is the total number of terminals. Page 32 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Package Drawings & Markings Figure 42: Packaging Code YY Last two digits of the current year WW M Manufacturing week Plant identifier ZZ Free choice / traceability code @ Sublot identifier Figure 43: Package Marking AS5047P YYWWMZZ @ ams Datasheet [v1-00] 2014-Oct-31 Page 33 Document Feedback AS5047P − Mechanical Data Mechanical Data Figure 44: Angle Detection by Default (no zero position programmed) S AS5047P S Page 34 Document Feedback 270 Deg N N N N 180 Deg AS5047P AS5047P S S AS5047P 90 Deg 0 Deg ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Ordering & Contact Information Ordering & Contact Information Figure 45: Ordering Information Ordering Code Package Marking Delivery Form Delivery Quantity AS5047P-ATST TSSOP-14 AS5047P 13” Tape & Reel in dry pack 4500 AS5047P-ATSM TSSOP-14 AS5047P 7” Tape & Reel in dry pack 500 Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: [email protected] For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com ams Datasheet [v1-00] 2014-Oct-31 Page 35 Document Feedback AS5047P − RoHS Compliant & ams Green Statement RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Page 36 Document Feedback ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Copyrights & Disclaimer Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services. ams Datasheet [v1-00] 2014-Oct-31 Page 37 Document Feedback AS5047P − Document Status Document Status Document Status Product Preview Preliminary Datasheet Datasheet Datasheet (discontinued) Page 38 Document Feedback Product Status Definition Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs ams Datasheet [v1-00] 2014-Oct-31 AS5047P − Revision Information Revision Information Changes from 0-02 (2014-Oct-30) to current revision 1-00 (2014-Oct-31) Page Initial version for release Note(s) and/or Footnote(s): 1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision. 2. Correction of typographical errors is not explicitly mentioned. ams Datasheet [v1-00] 2014-Oct-31 Page 39 Document Feedback AS5047P − Content Guide Content Guide Page 40 Document Feedback 1 1 2 2 General Description Key Benefits & Features Applications Block Diagram 3 5 6 7 7 8 Pin Assignment Absolute Maximum Ratings Electrical Characteristics Magnetic Characteristics System Characteristics Timing Characteristics 9 9 10 11 11 12 15 17 20 22 23 24 24 24 25 25 Detailed Description Power Management Dynamic Angle Error Compensation SPI Interface (slave) SPI Timing SPI Transaction Volatile Registers Non-Volatile Registers (OTP) ABI Incremental Interface UVW Commutation Interface PWM Hysteresis Automatic Gain Control (AGC) and CORDIC Magnitude Diagnostic Features OCF error / COF error MAGH error /MAGL error 26 26 Application Information Burn and Verification of the OTP Memory 32 34 35 36 37 38 39 Package Drawings & Markings Mechanical Data Ordering & Contact Information RoHS Compliant & ams Green Statement Copyrights & Disclaimer Document Status Revision Information ams Datasheet [v1-00] 2014-Oct-31