LINER LTC3610EWP 24v, 12a monolithic synchronous step-down dc/dc converter Datasheet

LTC3610
24V, 12A Monolithic
Synchronous Step-Down
DC/DC Converter
DESCRIPTION
FEATURES
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12A Output Current
Wide VIN Range = 4V to 24V
Internal N-Channel MOSFETs
True Current Mode Control
Optimized for High Step-Down Ratios
tON(MIN) ≤100ns
Extremely Fast Transient Response
Stable with Ceramic COUT
±1% 0.6V Voltage Reference
Power Good Output Voltage Monitor
Adjustable On-Time/Switching Frequency
Adjustable Current Limit
Programmable Soft-Start
Output Overvoltage Protection
Optional Short-Circuit Shutdown Timer
Low Shutdown IQ: 15μA
Available in a 9mm × 9mm 64-Pin QFN Package
APPLICATIONS
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Point of Load Regulation
Distributed Power Systems
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
5481178, 6100678, 6580258, 5847554, 6304066.
The LTC®3610 is a high efficiency, monolithic synchronous
step-down DC/DC converter that can deliver up to 12A
output current from a 4V to 24V (28V maximum) input
supply. It uses a valley current control architecture to deliver very low duty cycle operation at high frequency with
excellent transient response. The operating frequency is
selected by an external resistor and is compensated for
variations in VIN and VOUT.
The LTC3610 can be configured for discontinuous or
forced continuous operation at light load. Forced continuous operation reduces noise and RF interference while
discontinuous mode provides high efficiency by reducing
switching losses at light loads.
Fault protection is provided by internal foldback current
limiting, an output overvoltage comparator and an optional
short-circuit shutdown timer. Soft-start capability for supply sequencing is accomplished using an external timing
capacitor. The regulator current limit is user programmable.
A power good output voltage monitor indicates when
the output is in regulation. The LTC3610 is available in a
compact 9mm × 9mm QFN package.
TYPICAL APPLICATION
High Efficiency Step-Down Converter
Efficiency vs Load Current
ION
RUN/SS
VIN
10μF
×3
LTC3610
0.47μH
SW
470pF
31.83k
0.22μF
ITH
BOOST
SGND
INTVCC
100μF
×2
VIN
4V TO 24V
VOUT
2.5V
12A
VIN = 5V
90
85
80
100
75
70
POWER LOSS 12V
65
30.1k
PGOOD
EXTVCC
50
0.01
4.7μF
PGND
10
POWER LOSS 5V
VOUT = 2.5V
0.1
1
LOAD CURRENT (A)
1
10
3610 TA01b
VFB
3610 TA01a
60
55
FCB
VRNG
1000
VIN = 12V
POWER LOSS (mW)
100pF
95
EFFICIENCY (%)
VON
10000
100
604k
0.1μF
9.5k
3610fd
1
LTC3610
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
PGND 1
49 SGND
50 SGND
51 SVIN
52 SVIN
53 INTVCC
54 INTVCC
55 SW
56 PGND
57 PGND
58 PGND
59 PGND
60 PGND
61 PGND
62 PGND
63 PGND
TOP VIEW
64 PGND
Input Supply Voltage (VIN, ION) .................. 28V to –0.3V
Boosted Topside Driver Supply Voltage
(BOOST) ................................................ 34V to –0.3V
SW Voltage ............................................... 28V to –5V
INTVCC, EXTVCC, (BOOST – SW), RUN/SS,
PGOOD Voltages ...................................... 7V to –0.3V
FCB, VON, VRNG Voltages............ INTVCC + 0.3V to –0.3V
ITH, VFB Voltages ....................................... 2.7V to –0.3V
Operating Temperature Range
(Note 4) ............................................... –40°C to 85°C
Junction Temperature (Note 2) ............................. 125°C
Storage Temperature Range................... –55°C to 125°C
48 SGND
65
PGND
PGND 2
47 SGND
PGND 3
46 SGND
SW 4
45 SGND
SW 5
44 EXTVCC
SW 6
43 VFB
SW 7
42 SGND
66
SW
SW 8
41 ION
SW 9
40 SGND
SW 10
39 FCB
68
SGND
SW 11
PVIN 12
38 ITH
37 VRNG
PVIN 13
36 PGOOD
67
PVIN
PVIN 14
PVIN 15
35 VON
34 SGND
33 SGND
SGND 32
SGND 31
RUN/SS 30
BOOST 29
SGND 28
NC 27
SW 26
PVIN 25
PVIN 24
PVIN 23
PVIN 22
PVIN 21
PVIN 20
PVIN 19
PVIN 17
PVIN 18
PVIN 16
WP PACKAGE
64-LEAD (9mm × 9mm) QFN MULTIPAD
TJMAX = 125°C, θJA = 28°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3610EWP#PBF
LTC3610EWP#TRPBF
LTC3610WP
64-Lead (9mm × 9mm) Plastic QFN
–40°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3610EWP
LTC3610EWP#TR
LTC3610WP
64-Lead (9mm × 9mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3610fd
2
LTC3610
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop
VIN
Operating Input Voltage Range
IQ
Input DC Supply Current
Normal
Shutdown Supply Current
4
●
24
V
900
15
2000
30
μA
μA
0.600
0.606
VFB
Feedback Reference Voltage
ITH = 1.2V (Note 3)
ΔVFB(LINEREG)
Feedback Voltage Line Regulation
VIN = 4V to 28V, ITH = 1.2V (Note 3)
0.002
ΔVFB(LOADREG)
Feedback Voltage Load Regulation
ITH = 0.5V to 1.9V (Note 3)
–0.05
–0.3
%
IFB
Feedback Input Current
VFB = 0.6V
–5
±50
nA
ITH = 1.2V (Note 3)
mS
gm(EA)
Error Amplifier Transconductance
VFCB
Forced Continuous Threshold
IFCB
Forced Continuous Pin Current
VFCB = 0.6V
tON
On-Time
ION = 60μA, VON = 1.5V
ION = 60μA, VON = 0V
tON(MIN)
Minimum On-Time
ION = 180μA, VON = 0V
tOFF(MIN)
Minimum Off-Time
ION = 30μA, VON = 1.5V
IVALLEY(MAX)
Maximum Valley Current
VRNG = 0.5V, VFB = 0.56V, FCB = 0V
VRNG = 0V, VFB = 0.56V, FCB = 0V
IVALLEY(MIN)
Maximum Reverse Valley Current
VRNG = 0.5V, VFB = 0.64V, FCB = 0V
VRNG = 0V, VFB = 0.64V, FCB = 0V
ΔVFB(OV)
Output Overvoltage Fault Threshold
0.594
V
%/V
●
1.4
1.7
2
●
0.54
0.6
0.66
V
–1
–2
μA
250
120
310
ns
ns
60
100
ns
290
500
ns
170
●
●
●
9
12
16
19
A
A
–3
–6
–6
–9
–9
–12
A
A
7
10
13
%
0.8
VRUN/SS(ON)
RUN Pin Start Threshold
1.5
2
V
VRUN/SS(LE)
RUN Pin Latchoff Enable Threshold
RUN/SS Pin Rising
4
4.5
V
VRUN/SS(LT)
RUN Pin Latchoff Threshold
RUN/SS Pin Falling
3.5
4.2
V
IRUN/SS(C)
Soft-Start Charge Current
VRUN/SS = 0V
–1.2
–3
μA
IRUN/SS(D)
Soft-Start Discharge Current
VRUN/SS = 4.5V, VFB = 0V
1.8
3
μA
VIN(UVLO)
Undervoltage Lockout
VIN Falling
●
3.4
3.9
V
VIN(UVLOR)
Undervoltage Lockout Release
VIN Rising
●
3.5
4
V
RDS(ON)
Top Switch On-Resistance
Bottom Switch On-Resistance
12
6.5
16
10
mΩ
mΩ
–0.5
0.8
3610fd
3
LTC3610
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
4.7
5
5.5
V
–0.1
±2
%
300
mV
Internal VCC Regulator
VINTVCC
Internal VCC Voltage
6V < VIN < 28V, VEXTVCC = 4V
ΔVLDO(LOADREG)
Internal VCC Load Regulation
ICC = 0mA to 20mA, VEXTVCC = 4V
VEXTVCC
EXTVCC Switchover Voltage
ICC = 20mA, VEXTVCC Rising
ΔVEXTVCC
EXTVCC Switch Drop Voltage
ICC = 20mA, VEXTVCC = 5V
ΔVEXTVCC(HYS)
EXTVCC Switchover Hysteresis
●
●
4.5
4.7
150
V
500
mV
PGOOD Output
ΔVFBH
PGOOD Upper Threshold
VFB Rising
7
10
13
%
ΔVFBL
PGOOD Lower Threshold
VFB Falling
–7
–10
–13
%
ΔVFB(HYS)
PGOOD Hysteresis
VFB Returning
1
2.5
%
VPGL
PGOOD Low Voltage
IPGOOD = 5mA
0.15
0.4
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD as follows:
LTC3610E: TJ = TA + (PD • 28°C/W) (θJA is simulated per JESD51-7
high effective thermal conductivity test board)
θJC = 0.24°C/W (θJC is simulated when heat sink is applied at the
bottom of the package).
Note 3: The LTC3610E is tested in a feedback loop that adjusts VFB to
achieve a specified error amplifier output voltage (ITH).
Note 4: The LTC3610E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
3610fd
4
LTC3610
TYPICAL PERFORMANCE CHARACTERISTICS
Transient Response
(Discontinuous Mode)
Transient Response
VOUT
100mV/DIV
VOUT
100mV/DIV
IL
5A/DIV
IL
5A/DIV
ILOAD
5A/DIV
ILOAD
5A/DIV
Start-Up
RUN/SS
2V/DIV
VOUT
1V/DIV
3610 G01
40μs/DIV
LOAD STEP 0A TO 8A
VIN = 12V
VOUT = 2.5V
FCB = 0V
FIGURE 6 CIRCUIT
3610 G02
40μs/DIV
40ms/DIV
VIN = 12V
VOUT = 2.5V
RLOAD = 0.5Ω
FIGURE 6 CIRCUIT
ILOAD = 1A TO 7A
VIN = 12V
VOUT = 2.5V
FCB = INTVCC
FIGURE 6 CIRCUIT
Efficiency vs Load Current
Efficiency vs Input Voltage
100
100
3610 G03
Frequency vs Input Voltage
640
FCB = 5V
FIGURE 6 CIRCUIT
DISCONTINUOUS
MODE
90
IL
5A/DIV
ILOAD = 10A
600
80
CONTINUOUS
MODE
70
50
0.001
0.01
0.1
1
LOAD CURRENT (A)
ILOAD = 10A
90
ILOAD = 1A
85
VIN = 12V
VOUT = 2.5V
EXTVCC = 5V
FIGURE 6 CIRCUIT
60
520
ILOAD = 0A
480
FCB = 0V
FIGURE 6 CIRCUIT
400
80
10
5
5
25
10
15
20
INPUT VOLTAGE (V)
10
3610 G05
Frequency vs Load Current
15
20
INPUT VOLTAGE (V)
25
3610 G06
ITH Voltage vs Load Current
Load Regulation
0.80
2.5
FIGURE 6 CIRCUIT
FIGURE 6 CIRCUIT
0.60
CONTINUOUS MODE
2.0
DISCONTINUOUS MODE
ITH VOLTAGE (V)
0.40
ΔVOUT (%)
FREQUENCY (kHz)
560
440
3610 G04
650
600
550
500
450
400
350
300
250
200
150
100
50
0
FREQUENCY (kHz)
EFFICIENCY (%)
EFFICIENCY (%)
95
0.20
0
–0.20
–0.40
1.5
CONTINUOUS
MODE
1.0
DISCONTINUOUS
MODE
0.5
–0.60
–0.80
0
2
4
6
8
LOAD CURRENT (A)
10
12
3610 G07
0
2
4
6
8
LOAD CURRENT (A)
10
12
3610 G08
0
0
3
6
9
LOAD CURRENT (A)
12
3610 G09
3610fd
5
LTC3610
TYPICAL PERFORMANCE CHARACTERISTICS
Load Current
vs ITH Voltage and VRNG
25
VRNG =
On-Time vs ION Current
10000
On-Time vs VON Voltage
1000
VVON = 0V
1V
ION = 30μA
20
800
0.7V
10
5
1000
0
ON-TIME (ns)
0.5V
ON-TIME (ns)
LOAD CURRENT (A)
15
600
400
100
200
–5
–10
0.5
1.0
1.5
2.0
ITH VOLTAGE (V)
2.5
1
3
1
2
VON VOLTAGE (V)
0
3610 G11
3610 G12
Maximum Valley Current Limit
vs RUN/SS Voltage
18
MAXIMUM VALLEY CURRENT LIMIT (A)
250
ON-TIME (ns)
100
Maximum Valley Current Limit
vs VRNG Voltage
IION = 30μA
VVON = 0V
200
150
100
50
0
–50 –25
10
ION CURRENT (μA)
3610 G10
On-Time vs Temperature
300
0
10
3.0
24
MAXIMUM VALLEY CURRENT LIMIT (A)
0
22
20
18
16
14
12
10
25
75
0
50
TEMPERATURE (°C)
100
0.5
125
0.6
0.7
0.8
VRNG VOLTAGE (V)
0.9
15
12
9
6
3
0
1.65 1.90 2.15 2.40 2.65 2.90 3.15 3.40
RUN/SS VOLTAGE (V)
1.0
3610 G14
3610 G15
3610 G13
Maximum Valley Current Limit
vs Temperature
Input Voltage
vs Maximum Valley Current
10
5
–25
0
50
75
25
TEMPERATURE (°C)
100
125
3610 G16
MAXIMUM VALLEY CURRENT LIMIT (A)
15
0
–50
15
18
MAXIMUM VALLEY CURRENT (A)
MAXIMUM VALLEY CURRENT LIMIT (A)
20
Maximum Valley Current Limit
in Foldback
16
14
12
10
8
6
4
10
5
0
4
7
10
13 16 19 22
INPUT VOLTAGE (V)
25
28
3610 G17
0
0.1
0.2
0.3
VFB (V)
0.4
0.5
0.6
3610 G18
3610fd
6
LTC3610
TYPICAL PERFORMANCE CHARACTERISTICS
Feedback Reference Voltage
vs Temperature
2.0
0.62
1400
40
EXTVCC OPEN
1200
0.60
INPUT CURRENT (μA)
gm (mS)
0.61
1.6
1.4
0.59
30
1000
25
800
15
400
–25
75
0
25
50
TEMPERATURE (°C)
100
125
1.0
–50
100
0
EXTVCC SWITCH RESISTANCE (Ω)
20
IEXTVCC (mA)
0.10
–0.10
15
10
–0.20
5
–0.30
40
10
20
30
INTVCC LOAD CURRENT (mA)
0
400
50
500
700
600
800
FREQUENCY (kHz)
900
6
4
2
0
–50
1000
–25
0
50
75
25
TEMPERATURE (°C)
Undervoltage Lockout Threshold
vs Temperature
2
PULL-DOWN CURRENT
1
0
–1
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
5.0
RUN/SS PIN CURRENT (μA)
RUN/SS PIN CURRENT (μA)
125
3610 G24
RUN/SS Pin Current
vs Temperature
3
4.5
LATCHOFF ENABLE
4.0
LATCHOFF THRESHOLD
3.5
PULL-UP CURRENT
0
50
75
25
TEMPERATURE (°C)
100
3610 G22
RUN/SS Pin Current
vs Temperature
–25
3610 G21
8
3610 G23
–2
–50
30
25
10
0.20
0
10
20
15
INPUT VOLTAGE (V)
EXTVCC Switch Resistance
vs Temperature
IEXTVCC vs Frequency
25
0
5
0
125
3610 G20
0.30
ΔINTVCC (%)
5
0
0
50
75
25
TEMPERATURE (°C)
–25
3610 G19
INTVCC Load Regulation
10
EXTVCC = 5V
200
0.58
–50
20
SHUTDOWN
600
1.2
–0.40
35
1.8
SHUTDOWN CURRENT (μA)
FEEDBACK REFERENCE VOLTAGE (V)
Input and Shutdown Currents
vs Input Voltage
Error Amplifier gm vs Temperature
100
125
3610 G25
3.0
–50
–25
75
0
25
50
TEMPERATURE (°C)
100
125
3610 G26
4.0
3.5
3.0
2.5
2.0
–50
–25
75
0
25
50
TEMPERATURE (°C)
100
125
3610 G27
3610fd
7
LTC3610
PIN FUNCTIONS
PGND (Pins 1, 2, 3, 56, 57, 58, 59, 60, 61, 62, 63, 64,
65): Power Ground. Connect this pin closely to the (–)
terminal of CVCC and the (–) terminal of CIN.
SW (Pins 4, 5, 6, 7, 8, 9, 10, 11, 26, 55, 66): Switch
Node Connection to the Inductor. The (–) terminal of the
bootstrap capacitor CB also connects here. This pin swings
from a diode voltage drop below ground up to VIN.
PVIN (Pins 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
23, 24, 25, 67): Main Input Supply. Decouple this pin to
power PGND with the input capacitance CIN.
NC (Pin 27): No Connection.
SGND (Pins 28, 31, 32, 33, 34, 40, 42, 45, 46, 47, 48,
49, 50, 68): Signal Ground. All small-signal components
and compensation components should connect to this
ground, which in turn connects to PGND at one point.
BOOST (Pin 29): Boosted Floating Driver Supply. The
(+) terminal of the bootstrap capacitor CB connects here.
This pin swings from a diode voltage drop below INTVCC
up to VIN + INTVCC.
RUN/SS (Pin 30): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp time to full
output current (approximately 3s/μF) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the device.
VON (Pin 35): On-Time Voltage Input. Voltage trip point for
the on-time comparator. Tying this pin to the output voltage or an external resistive divider from the output makes
the on-time proportional to VOUT. The comparator input
defaults to 0.7V when the pin is grounded and defaults to
2.4V when the pin is tied to INTVCC. Tie this pin to INTVCC
in high VOUT applications to use a lower RON value.
VRNG (Pin 37): Current Limit Range Input. The voltage at
this pin adjusts maximum valley current and can be set
from 0.5V to 0.7V by a resistive divider from INTVCC. It
defaults to 0.7V if the VRNG pin is tied to ground which
results in a typical 19A current limit.
ITH (Pin 38): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0V to 2.4V with 0.8V corresponding to zero sense
voltage (zero current).
FCB (Pin 39): Forced Continuous Input. Tie this pin to
ground to force continuous synchronous operation at low
load, to INTVCC to enable discontinuous mode operation at
low load or to a resistive divider from a secondary output
when using a secondary winding.
ION (Pin 41): On-Time Current Input. Tie a resistor from VIN
to this pin to set the one-shot timer current and thereby
set the switching frequency.
VFB (Pin 43): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
divider from VOUT.
EXTVCC (Pin 44): External VCC Input. When EXTVCC exceeds
4.7V, an internal switch connects this pin to INTVCC and
shuts down the internal regulator so that controller and
gate drive power is drawn from EXTVCC. Do not exceed
7V at this pin and ensure that EXTVCC < VIN.
SVIN (Pins 51, 52): Supply pin for internal PWM controller.
INTVCC (Pins 53, 54): Internal 5V Regulator Output. The
driver and control circuits are powered from this voltage.
Decouple this pin to power ground with a minimum of
4.7μF low ESR tantalum or ceramic capacitor.
PGOOD (Pin 36): Power Good Output. Open drain logic
output that is pulled to ground when the output voltage
is not within ± 10% of the regulation point.
3610fd
8
LTC3610
FUNCTIONAL DIAGRAM
RON
VON
ION
35
41
FCB
EXTVCC
39
44
SVIN
51, 52
4.7V
0.7V
PVIN
2.4V
+
1μA
–
12, 13, 14, 15,
16, 17, 18, 19,
20, 21, 22, 23,
24, 25, 67
0.6V
REF
0.6V
5V
REG
INTVCC
+
–
53, 54
F
29
VVON
tON =
(10pF)
IION
Q
FCNT
CB
M1
ON
20k
SW
+
ICMP
L1
DB
VOUT
4, 5, 6, 7, 8, 9,
10, 11, 26, 55,
66
SWITCH
LOGIC
IREV
–
–
+
SHDN
1.4V
COUT
OV
M2
CVCC
37
PGND
×
(0.5 TO 2)
1, 2, 3, 56, 57,
58, 59, 60, 61,
62, 63, 64, 65
0.7V
36 PGOOD
1
240k
+
1V
Q2 Q4
–
Q6
ITHB
R2
0.54V
UV
43
Q3 Q1
VFB
R1
+
OV
+
–
–
0.8V
–
SS
+
SGND
28, 31, 32, 33, 34,
40, 42, 45, 46, 47,
48, 49, 50, 68
0.66V
RUN
SHDN
1.2μA
EA
×3.3
+
–
–
+
VRNG
BOOST
R
S
+
CIN
27
NC
6V
0.6V
0.4V
38
ITH
30
3610 FD
RUN/SS
CSS
3610fd
9
LTC3610
OPERATION
Main Control Loop
The LTC3610 is a high efficiency monolithic synchronous,
step-down DC/DC converter utilizing a constant on-time,
current mode architecture. It operates from an input voltage
range of 4V to 24V and provides a regulated output voltage
at up to 12A of output current. The internal synchronous
power switch increases efficiency and eliminates the need
for an external Schottky diode. In normal operation, the
top MOSFET is turned on for a fixed interval determined
by a one-shot timer OST. When the top MOSFET is turned
off, the bottom MOSFET is turned on until the current
comparator ICMP trips, restarting the one-shot timer and
initiating the next cycle. Inductor current is determined
by sensing the voltage between the PGND and SW pins
using the bottom MOSFET on-resistance. The voltage on
the ITH pin sets the comparator threshold corresponding
to inductor valley current. The error amplifier EA adjusts
this voltage by comparing the feedback signal VFB from
the output voltage with an internal 0.6V reference. If the
load current increases, it causes a drop in the feedback
voltage relative to the reference. The ITH voltage then
rises until the average inductor current again matches
the load current.
At light load, the inductor current can drop to zero and
become negative. This is detected by current reversal
comparator IREV which then shuts off M2 (see Functional Diagram), resulting in discontinuous operation. Both
switches will remain off with the output capacitor supplying
the load current until the ITH voltage rises above the zero
current level (0.8V) to initiate another cycle. Discontinuous mode operation is disabled by comparator F when
the FCB pin is brought below 0.6V, forcing continuous
synchronous operation.
The operating frequency is determined implicitly by the top
MOSFET on-time and the duty cycle required to maintain
regulation. The one-shot timer generates an on-time that is
proportional to the ideal duty cycle, thus holding frequency
approximately constant with changes in VIN. The nominal
frequency can be adjusted with an external resistor RON.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage exits a ±10% window around the regulation point.
Furthermore, in an overvoltage condition, M1 is turned
off and M2 is turned on and held on until the overvoltage
condition clears.
Foldback current limiting is provided if the output is
shorted to ground. As VFB drops, the buffered current
threshold voltage ITHB is pulled down by clamp Q3 to
a 1V level set by Q4 and Q6. This reduces the inductor
valley current level to one sixth of its maximum value as
VFB approaches 0V.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing
the pin allows an internal 1.2μA current source to charge
up an external soft-start capacitor CSS. When this voltage
reaches 1.5V, the controller turns on and begins switching,
but with the ITH voltage clamped at approximately 0.6V
below the RUN/SS voltage. As CSS continues to charge,
the soft-start current limit is removed.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most of
the internal controller circuitry is derived from the INTVCC
pin. The top MOSFET driver is powered from a floating
bootstrap capacitor CB. This capacitor is recharged from
INTVCC through an external Schottky diode DB when
the top MOSFET is turned off. When the EXTVCC pin is
grounded, an internal 5V low dropout regulator supplies
the INTVCC power from VIN. If EXTVCC rises above 4.7V,
the internal regulator is turned off, and an internal switch
connects EXTVCC to INTVCC. This allows a high efficiency
source connected to EXTVCC, such as an external 5V supply or a secondary output from the converter, to provide
the INTVCC power. Voltages up to 7V can be applied to
EXTVCC for additional gate drive. If the input voltage is
low and INTVCC drops below 3.5V, undervoltage lockout
circuitry prevents the power switches from turning on.
3610fd
10
LTC3610
APPLICATIONS INFORMATION
The basic LTC3610 application circuit is shown on the
front page of this data sheet. External component selection
is primarily determined by the maximum load current.
The LTC3610 uses the on-resistance of the synchronous
power MOSFET for determining the inductor current. The
desired amount of ripple current and operating frequency
also determines the inductor value. Finally, CIN is selected
for its ability to handle the large RMS current into the
converter and COUT is chosen with low enough ESR to meet
the output voltage ripple and transient specification.
VON and PGOOD
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
The operating frequency of LTC3610 applications is determined implicitly by the one-shot timer that controls the
on-time tON of the top MOSFET switch. The on-time is set
by the current into the ION pin and the voltage at the VON
pin according to:
VVON
(10pF)
IION
The LTC3610 has an open-drain PGOOD output that
indicates when the output voltage is within ±10% of the
regulation point. The LTC3610 also has a VON pin that
allows the on-time to be adjusted. Tying the VON pin high
results in lower values for RON which is useful in high VOUT
applications. The VON pin also provides a means to adjust
the on-time to maintain constant frequency operation in
applications where VOUT changes and to correct minor
frequency shifts with changes in load current.
Tying a resistor RON from VIN to the ION pin yields an
on-time inversely proportional to VIN. The current out of
the ION pin is:
VRNG Pin and ILIMIT Adjust
For a step-down converter, this results in approximately
constant frequency operation as the input supply varies:
The VRNG pin is used to adjust the maximum inductor
valley current, which in turn determines the maximum
average output current that the LTC3610 can deliver. The
maximum output current is given by:
IOUT(MAX) = IVALLEY(MAX) + 1/2 ΔIL,
The IVALLEY(MAX) is shown in the figure “Maximum Valley
Current Limit vs VRNG Voltage” in the Typical Performance
Characteristics.
An external resistor divider from INTVCC can be used to
set the voltage on the VRNG pin from 0.5V to 1V, or it can
be simply tied to ground force a default value equivalent
to 0.7V. When setting current limit, ensure that the junction temperature does not exceed the maximum rating of
125°C. Do not float the VRNG pin.
tON =
IION =
f=
VIN
RON
VOUT
[ HZ ]
VVON RON(10pF)
To hold frequency constant during output voltage changes,
tie the VON pin to VOUT or to a resistive divider from VOUT
when VOUT > 2.4V. The VON pin has internal clamps that
limit its input to the one-shot timer. If the pin is tied below
0.7V, the input to the one-shot is clamped at 0.7V. Similarly,
if the pin is tied above 2.4V, the input is clamped at 2.4V.
In high VOUT applications, tying VON to INTVCC so that the
comparator input is 2.4V results in a lower value for RON.
Figures 1a and 1b show how RON relates to switching
frequency for several common output voltages.
3610fd
11
LTC3610
APPLICATIONS INFORMATION
SWITCHING FREQUENCY (kHz)
1000
VOUT = 3.3V
VOUT = 1.5V
VOUT = 2.5V
100
100
1000
RON (kΩ)
10000
3610 F01a
Figure 1a. Switching Frequency vs RON (VON = 0V)
Minimum Off-time and Dropout Operation
The minimum off-time tOFF(MIN) is the smallest amount of
time that the LTC3610 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
MOSFET back off. This time is generally about 250ns.
The minimum off-time limit imposes a maximum duty
cycle of tON/(tON + tOFF(MIN)). If the maximum duty cycle
is reached, due to a dropping input voltage for example,
then the output will drop out of regulation. The minimum
input voltage to avoid dropout is:
1000
SWITCHING FREQUENCY (kHz)
as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the ITH pin to the VON pin and VOUT. The values
required will depend on the parasitic resistances in the
specific application. A good starting point is to feed about
25% of the voltage change at the ITH pin to the VON pin
as shown in Figure 2a. Place capacitance on the VON pin
to filter out the ITH variations at the switching frequency.
The resistor load on ITH reduces the DC gain of the error
amp and degrades load regulation, which can be avoided
by using the PNP emitter follower of Figure 2b.
VOUT = 12V
VOUT = 5V
VOUT = 3.3V
VIN(MIN) = VOUT
100
100
1000
RON (kΩ)
tON + tOFF(MIN)
10000
3610 F01b
Figure 1b. Switching Frequency vs RON (VON = INTVCC)
Because the voltage at the ION pin is about 0.7V, the current into this pin is not exactly inversely proportional to
VIN, especially in applications with lower input voltages.
To correct for this error, an additional resistor RON2 connected from the ION pin to the 5V INTVCC supply will further
stabilize the frequency.
5V
RON2 =
RON
0.7 V
Changes in the load current magnitude will also cause
frequency shift. Parasitic resistance in the MOSFET
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
load current increases. By lengthening the on-time slightly
tON
A plot of maximum duty cycle vs frequency is shown in
Figure 3.
Setting the Output Voltage
The LTC3611 develops a 0.6V reference voltage between
the feedback pin, VFB, and the signal ground as shown in
Figure 6. The output voltage is set by a resistive divider
according to the following formula:
R2 VOUT = 0.6V 1+ R1
To improve the frequency response, a feedforward capacitor C1 may also be used. Great care should be taken to
route the VFB line away from noise sources, such as the
inductor or the SW trace.
3610fd
12
LTC3610
APPLICATIONS INFORMATION
RVON1
30k
VON
VOUT
RVON2
100k
CVON
0.01μF
LTC3610
RC
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). The largest ripple current
occurs at the highest VIN. To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
ITH
CC
(2a)
RVON1
3k
VOUT
10k
INTVCC
CVON
0.01μF
RVON2
10k
VON
LTC3610
V
VOUT OUT
1
L=
f IL(MAX) VIN(MAX) RC
Q1
2N5087
ITH
CC
3610 F02
(2b)
Figure 2. Correcting Frequency Shift with Load Current Changes
2.0
SWITCHING FREQUENCY (MHz)
frequency with small ripple current. However, achieving
this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency.
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores.
A variety of inductors designed for high current, low voltage applications are available from manufacturers such as
Sumida, Panasonic, Coiltronics, Coilcraft and Toko.
CIN and COUT Selection
The input capacitance CIN is required to filter the square
wave current at the drain of the top MOSFET. Use a low ESR
capacitor sized to handle the maximum RMS current.
1.5
DROPOUT
REGION
1.0
IRMS ≅IOUT(MAX)
0.5
0
0
0.25
0.50
0.75
DUTY CYCLE (VOUT/VIN)
1.0
3610 F03
Figure 3. Maximum Switching Frequency vs Duty Cycle
Inductor Selection
Given the desired input and output voltages, the inductor value and operating frequency determine the ripple
current:
V V IL = OUT 1 OUT VIN f L Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
VOUT
VIN
VIN
–1
VOUT
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT(MAX)/2. This simple worst-case condition is
commonly used for design because even significant deviations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to derate
the capacitor.
The selection of COUT is primarily determined by the
ESR required to minimize voltage ripple and load step
transients. The output ripple ΔVOUT is approximately
bounded by:
1 VOUT IL ESR +
8fCOUT 3610fd
13
LTC3610
APPLICATIONS INFORMATION
Since ΔIL increases with input voltage, the output ripple
is highest at maximum input voltage. Typically, once the
ESR requirement is satisfied, the capacitance is adequate
for filtering and has the necessary RMS current rating.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but
have lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications providing that consideration
is given to ripple current ratings and long term reliability.
Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible
piezoelectric effects. The high Q of ceramic capacitors with
trace inductance can also lead to significant ringing. When
used as input capacitors, care must be taken to ensure
that ringing from inrush currents and switching does not
pose an overvoltage hazard to the power switches and
controller. To dampen input voltage transients, add a small
5μF to 50μF aluminum electrolytic capacitor with an ESR in
the range of 0.5Ω to 2Ω. High performance through-hole
capacitors may also be used, but an additional ceramic
capacitor in parallel is recommended to reduce the effect
of their lead inductance.
Top MOSFET Driver Supply (CB, DB)
An external bootstrap capacitor CB connected to the BOOST
pin supplies the gate drive voltage for the topside MOSFET.
This capacitor is charged through diode DB from INTVCC
when the switch node is low. When the top MOSFET turns
on, the switch node rises to VIN and the BOOST pin rises
to approximately VIN + INTVCC. The boost capacitor needs
to store about 100 times the gate charge required by the
top MOSFET. In most applications an 0.1μF to 0.47μF, X5R
or X7R dielectric capacitor is adequate.
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.6V threshold enables discontinuous
operation where the bottom MOSFET turns off when inductor current reverses. The load current at which current
reverses and discontinuous operation begins depends on
the amplitude of the inductor ripple current and will vary
with changes in VIN. Tying the FCB pin below the 0.6V
threshold forces continuous synchronous operation, allowing current to reverse at light loads and maintaining
high frequency operation.
In addition to providing a logic input to force continuous
operation, the FCB pin provides a means to maintain a
flyback winding output when the primary is operating
in discontinuous mode. The secondary output VOUT2 is
normally set as shown in Figure 4 by the turns ratio N
of the transformer. However, if the controller goes into
discontinuous mode and halts switching due to a light
primary load current, then VOUT2 will droop. An external
resistor divider from VOUT2 to the FCB pin sets a minimum
voltage VOUT2(MIN) below which continuous operation is
forced until VOUT2 has risen above its minimum:
R4 VOUT2(MIN) = 0.6V 1+ R3 Fault Conditions: Current Limit and Foldback
The LTC3610 has a current mode controller which inherently limits the cycle-by-cycle inductor current not only
in steady state operation but also in transient. To further
limit current in the event of a short circuit to ground, the
LTC3610 includes foldback current limiting. If the output
falls by more than 25%, then the maximum sense voltage is
progressively lowered to about one sixth of its full value.
3610fd
14
LTC3610
APPLICATIONS INFORMATION
SW
GND
+
CIN
12
13
14
15
SGND
SVIN
SGND
SVIN
INTVCC
SW
INTVCC
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
SGND
SW
FCB
ITH
SW
PVIN
VRNG
PVIN
PGOOD
PVIN
VON
PVIN
SGND
PVIN
SGND
PVIN
16
ION
LTC3610
48
47
46
45
44
43
42
R4
41
40
OPTIONAL EXTVCC
CONNECTION
5V < VOUT2 < 7V
39
38
37
R3
36
35
34
33
SGND
VIN
SW
SGND
11
SGND
SW
RUN/SS
10
VFB
BOOST
9
EXTVCC
SW
SGND
8
SW
NC
7
SGND
SW
6
SW
PVIN
+
5
SGND
PVIN
COUT
T1
1:N
SGND
PGND
PVIN
VOUT1
PGND
PVIN
4
SGND
PVIN
•
3
PGND
PVIN
+
•
CSEC
1μF
2
PVIN
1
PVIN
IN4148
VOUT2
PGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
3610 F04
SGND
SW
Figure 4. Secondary Output Loop and EXTVCC Connection
INTVCC Regulator and EXTVCC Connection
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC3610. The INTVCC pin can supply up to 50mA
RMS and must be bypassed to ground with a minimum of
4.7μF tantalum or ceramic capacitor. Good bypassing is
necessary to supply the high transient currents required
by the MOSFET gate drivers.
The EXTVCC pin can be used to provide MOSFET gate drive
and control power from the output or another external
source during normal operation. Whenever the EXTVCC
pin is above 4.7V the internal 5V regulator is shut off and
an internal 50mA P-channel switch connects the EXTVCC
pin to INTVCC. INTVCC power is supplied from EXTVCC
until this pin drops below 4.5V. Do not apply more than
7V to the EXTVCC pin and ensure that EXTVCC ≤ VIN. The
following list summarizes the possible connections for
EXTVCC:
1. EXTVCC grounded. INTVCC is always powered from the
internal 5V regulator.
2. EXTVCC connected to an external supply. A high efficiency
supply compatible with the MOSFET gate drive requirements (typically 5V) can improve overall efficiency.
3. EXTVCC connected to an output derived boost network.
The low voltage output can be boosted using a charge
pump or flyback winding to greater than 4.7V. The
system will start-up using the internal linear regulator
until the boosted output supply is available.
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the
LTC3610 as well as a timer for soft-start and overcurrent
latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC3610 into a low quiescent current shutdown (IQ <
30μA). Releasing the pin allows an internal 1.2μA current
source to charge up the external timing capacitor CSS. If
RUN/SS has been pulled all the way to ground, there is a
delay before starting of about:
tDELAY =
1.5V
C = (1.3s/μF) CSS
1.2μA SS
3610fd
15
LTC3610
APPLICATIONS INFORMATION
When the voltage on RUN/SS reaches 1.5V, the LTC3610
begins operating with a clamp on ITH of approximately
0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH
is raised until its full 2.4V range is available. This takes an
additional 1.3s/μF, during which the load current is folded
back until the output reaches 75% of its final value.
After the controller has been started and given adequate
time to charge up the output capacitor, CSS is used as a
short-circuit timer. After the RUN/SS pin charges above 4V,
if the output voltage falls below 75% of its regulated value,
then a short-circuit fault is assumed. A 1.8μA current then
begins discharging CSS. If the fault condition persists until
the RUN/SS pin drops to 3.5V, then the controller turns
off both power MOSFETs, shutting down the converter
permanently. The RUN/SS pin must be actively pulled
down to ground in order to restart operation.
The overcurrent protection timer requires that the soft-start
timing capacitor CSS be made large enough to guarantee
that the output is in regulation by the time CSS has reached
the 4V threshold. In general, this will depend upon the
size of the output capacitance, output voltage and load
current characteristic. A minimum soft-start capacitor
can be estimated from:
CSS > COUT VOUT RSENSE (10 –4 [F/V s])
Generally 0.1μF is more than sufficient.
Overcurrent latchoff operation is not always needed or desired. Load current is already limited during a short-circuit
by the current foldback circuitry and latchoff operation can
prove annoying during troubleshooting. The feature can
be overridden by adding a pull-up current greater than
5μA to the RUN/SS pin. The additional current prevents
the discharge of CSS during a fault and also shortens the
soft-start period. Using a resistor to VIN as shown in Figure 5a is simple, but slightly increases shutdown current.
Connecting a resistor to INTVCC as shown in Figure 5b
eliminates the additional shutdown current, but requires
a diode to isolate CSS. Any pull-up network must be able
to pull RUN/SS above the 4.2V maximum threshold of the
latchoff circuit and overcome the 4μA maximum discharge
current.
INTVCC
RSS*
VIN
3.3V OR 5V
D1
RUN/SS
RSS*
D2*
RUN/SS
2N7002
CSS
CSS
3610 F05
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
(5a)
(5b)
Figure 5. RUN/SS Pin Interfacing with Latchoff Defeated
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3610 circuits:
1. DC I2R losses. These arise from the resistance of the
internal resistance of the MOSFETs, inductor and PC
board traces and cause the efficiency to drop at high
output currents. In continuous mode the average output
current flows through L, but is chopped between the top
and bottom MOSFETs. The DC I2R loss for one MOSFET
can simply be determined by [RDS(ON) + RL] • IO.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region during switch node transitions. It depends upon
the input voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss
is significant at input voltages above 20V and can be
estimated from:
Transition Loss ≅ (1.7A–1) VIN2 IOUT CRSS f
3. INTVCC current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by supplying INTVCC current through the EXTVCC pin from a
high efficiency source, such as an output derived boost
network or alternate supply if available.
3610fd
16
LTC3610
APPLICATIONS INFORMATION
4. CIN loss. The input capacitor has the difficult job of filtering
the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I2R loss and sufficient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
Selecting a standard value of 0.82μH results in a maximum
ripple current of:
2.5V
2.5V IL =
1–
= 4.4A
(550kHz )(0.82μH) 12V Other losses, including COUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
Next, set up VRNG voltage and check the ILIMIT. Tying VRNG
to 0.5V will set the typical current limit to 16A, and tying
VRNG to GND will result in a typical current around 19A.
CIN is chosen for an RMS current rating of about 5A at
85°C. The output capacitors are chosen for a low ESR
of 0.013Ω to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
ΔVOUT(RIPPLE) = ΔIL(MAX) (ESR)
= (4.4A) (0.013Ω) = 57mV
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problem. The ITH
pin external components shown in Figure 6 will provide
adequate compensation for most applications. For a
detailed explanation of switching control loop theory see
Application Note 76.
However, a 0A to 10A load step will cause an output
change of up to:
Design Example
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with the
LTC3610.
As a design example, take a supply with the following
specifications: VIN = 5V to 24V (12V nominal), VOUT =
2.5V ± 5%, IOUT(MAX) = 12A, f = 550kHz. First, calculate
the timing resistor with VON = VOUT:
1
RON =
= 182k
(550kHz )(10pF )
and choose the inductor for about 40% ripple current at
the maximum VIN:
2.5V
2.5V L=
1
= 0.86μH
(550kHz )(0.4)(12A ) 28V ΔVOUT(STEP) = ΔILOAD (ESR) = (10A) (0.013Ω) = 130mV
An optional 22μF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 6.
PC Board Layout Checklist
When laying out a PC board follow one of the two suggested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents, a
multilayer board is recommended to help with heat sinking
of power components.
• Place CIN and COUT all in one compact area, close to
the LTC3610. It may help to have some components
on the bottom side of the board.
• Keep small-signal components close to the LTC3610.
• Ground connections (including LTC3610 SGND and
PGND) should be made through immediate vias to
the ground plane. Use several larger vias for power
components.
3610fd
17
LTC3610
APPLICATIONS INFORMATION
INTVCC
CVCC
4.7μF
6.3V
CF
0.1μF
25V
SW
GND
VIN
RF1
1Ω
11
VIN
VIN
5V TO 24V
CIN
10μF
35V
3×
GND
C6
10μF
35V
+
(OPTIONAL)
12
13
14
15
16
SGND
SVIN
SGND
SVIN
INTVCC
SW
INTVCC
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SGND
SW
ION
LTC3610
SW
SGND
SW
FCB
SW
ITH
PVIN
VRNG
PVIN
PGOOD
PVIN
VON
PVIN
SGND
47
46
EXTVCC
C4
0.01μF
(OPTIONAL)
R1
9.5k
1%
45
44
R2
30.1k
1%
C1
C2
(OPTIONAL)
43
VOUT
RON
182k
1%
42
41
VIN
40
CON
0.01μF
39
(OPTIONAL)
R5
31.84k
38
CC1
470pF
37
36
R3
0Ω
35
RPG1
100k
34
33
PVIN
RX1
0Ω
48
SGND
10
SW
SGND
9
VFB
RUN/SS
8
SW
BOOST
(OPTIONAL)
GND
EXTVCC
SGND
7
SGND
SW
NC
6
SW
SW
5
PVIN
L1
0.8μH
PVIN
+
PVIN
COUT1
220μF
2×
SGND
PVIN
C5
22μF
6.3V
PGND
PVIN
4
SGND
PVIN
VOUT
2.5V AT
12A
SGND
PGND
PVIN
3
PGND
PVIN
2
PVIN
1
PGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
INTVCC
C3
CC2
100pF
(OPTIONAL)
RVON
0Ω
VOUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
SW
CIN: TAIYO YUDEN GMK325BJ106MM-B
COUT: SANYO 10TPE220ML
L1: CDEP85NP-R80MC-50
C5: MURATA GRM31CR60J226KE19
INTVCC
RSS1
510k
CB1
0.22μF
DB
CMDSH-3
CSS
0.1μF
3610 F06
VIN
(OPTIONAL)
SW
Figure 6. Design Example: 5V to 24V Input to 2.5V/12A at 550kHz
• Use a compact plane for the switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
• Use planes for VIN and VOUT to maintain good voltage
filtering and to keep power losses low.
• Flood all unused areas on all layers with copper. Flooding with copper reduces the temperature rise of power
components. Connect these copper areas to any DC
net (VIN, VOUT, GND or to any other DC rail in your
system).
When laying out a printed circuit board without a ground
plane, use the following checklist to ensure proper operation of the controller. These items are also illustrated in
Figure 7.
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
one point, which is then tied to the PGND pin.
• Connect the input capacitor(s) CIN close to the IC. This
capacitor carries the MOSFET AC current.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Connect the INTVCC decoupling capacitor CVCC closely
to the INTVCC and PGND pins.
• Connect the top driver boost capacitor CB closely to
the BOOST and SW pins.
• Connect the VIN pin decoupling capacitor CF closely to
the VIN and PGND pins.
3610fd
18
LTC3610
APPLICATIONS INFORMATION
CVCC
SW
16
SGND
SVIN
SGND
SVIN
INTVCC
SW
INTVCC
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
LTC3610
SW
SGND
SW
FCB
SW
ITH
PVIN
VRNG
PVIN
PGOOD
PVIN
VON
PVIN
SGND
48
47
46
45
R1
44
R2
43
42
41
RON
40
39
RC
38
37
36
35
34
CC2
33
PVIN
CC1
SGND
15
ION
SGND
14
SW
RUN/SS
CIN
SGND
BOOST
13
SW
SGND
12
VFB
NC
11
EXTVCC
SW
SW
9
10
SW
PVIN
VOUT
SGND
PVIN
8
SW
PVIN
7
SGND
PVIN
6
PGND
PVIN
COUT
5
SGND
PVIN
4
PGND
PVIN
3
SGND
PVIN
2
PGND
PVIN
1
PGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
DB
CB
CSS
RF
3610 F07
Figure 7. LTC3610 Layout Diagram
3610fd
19
LTC3610
TYPICAL APPLICATIONS
3.3V Input to 1.5V/12A at 750kHz
INTVCC
VIN2 = 5V
CVCC
4.7μF
6.3V
CF
0.1μF
25V
SW
GND
VIN
VIN
3.3V
CIN
10μF
3×
GND
C6
10μF
35V
+
(OPTIONAL)
12
13
14
15
16
SGND
SVIN
SGND
SVIN
INTVCC
SW
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
INTVCC
ION
LTC3610
SW
SGND
SW
FCB
SW
ITH
PVIN
VRNG
PVIN
PGOOD
PVIN
VON
PVIN
SGND
46
EXTVCC
C4
0.01μF
(OPTIONAL)
R1
20.43k
1%
45
44
43
R2
30.1k
1%
C1
C2
(OPTIONAL)
VOUT
RON
113k
1%
42
41
VIN
40
CON
0.01μF (OPTIONAL)
39
38
R5
11.15k
CC1
470pF
37
36
35
CC2
100pF
RPG1
100k
34
33
PVIN
RX1
0Ω
48
47
INTVCC
(OPTIONAL)
SGND
11
SGND
SW
SGND
10
SW
RUN/SS
9
VFB
BOOST
8
SW
SGND
(OPTIONAL)
GND
EXTVCC
NC
7
SGND
SW
SW
6
SW
PVIN
5
PVIN
L1
0.36μH
PVIN
+
SGND
PVIN
COUT1
220μF
2×
PGND
PVIN
C5
22μF
6.3V
SGND
PVIN
4
PGND
PVIN
3
VOUT
1.5V AT
12A
SGND
PGND
PVIN
2
PVIN
1
PGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
RVON
VOUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
CB1
0.22μF
CIN: TAIYO YUDEN TMK432BJ106MM
COUT1: SANYO 10TPE220ML
L1: TOKO FDH1040-36M
C5: TAIYO YUDEN JMK316BJ226ML-T
INTVCC
RSS1
510k
CSS
0.1μF
(OPTIONAL)
CVON
3610 TA02
VIN
(OPTIONAL)
3610fd
20
LTC3610
TYPICAL APPLICATIONS
5V to 24V Input to 1.2V/12A at 550kHz
INTVCC
CVCC
4.7μF
6.3V
CF
0.1μF
25V
SW
GND
VIN
RF1
1Ω
VIN
VIN
5V TO 24V
CIN
10μF
25V
3×
GND
C6
10μF
35V
+
(OPTIONAL)
12
13
14
15
16
SGND
SVIN
SGND
SVIN
INTVCC
SW
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
INTVCC
ION
LTC3610
SW
SGND
SW
FCB
SW
ITH
PVIN
VRNG
PVIN
PGOOD
PVIN
VON
PVIN
SGND
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
CB1
0.22μF
C5: TAIYO YUDEN JMK316BJ226ML-T
CIN: TAIYO YUDEN TMK432BJ106MM
COUT1: SANYO 10TPE220ML
L1: WURTH 744310055
46
EXTVCC
C4
0.01μF
INTVCC
DB
CMDSH-3
(OPTIONAL)
R1
30k
1%
45
44
R2
30.1k
1%
C1
VOUT
RON
301k
1%
42
41
VIN
40
CON
0.01μF (OPTIONAL)
39
38
R5
31.84k
CC1
470pF
37
36
35
CC2
100pF
RPG1
100k
34
INTVCC
RVON
VOUT
SGND
SGND
RSS1
510k
CSS
0.1μF
C2
(OPTIONAL)
43
33
PVIN
RX1
0Ω
48
47
SGND
11
SGND
SW
SGND
10
SW
RUN/SS
9
VFB
BOOST
8
SW
SGND
(OPTIONAL)
GND
EXTVCC
NC
7
SGND
SW
SW
6
SW
PVIN
5
PVIN
L1
0.52μH
PVIN
+
SGND
PVIN
COUT1
220μF
2×
PGND
PVIN
C5
22μF
6.3V
SGND
PVIN
4
PGND
PVIN
3
VOUT
1.2V AT
12A
SGND
PGND
PVIN
2
PVIN
1
PGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
(OPTIONAL)
CVON
3610 TA03
VIN
(OPTIONAL)
3610fd
21
LTC3610
TYPICAL APPLICATIONS
5V to 24V Input to 1.8V/12A All Ceramic 1MHz
INTVCC
CVCC
4.7μF
6.3V
CF
0.1μF
25V
SW
GND
VIN
RF1
1Ω
13
CIN
10μF
25V
3×
14
15
16
SGND
SVIN
SGND
SVIN
INTVCC
SW
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
INTVCC
SGND
SW
FCB
SW
ITH
PVIN
VRNG
PVIN
PGOOD
PVIN
VON
PVIN
SGND
46
EXTVCC
C4
0.01μF
(OPTIONAL)
R1
10k
1%
45
44
R2
20k
1%
C1
C2
(OPTIONAL)
43
VOUT
RON
102k
1%
42
41
VIN
40
CON
0.01μF (OPTIONAL)
39
38
R5
18.7k
CC1
560pF
37
36
35
CC2
100pF
RPG1
100k
34
33
PVIN
RX1
0Ω
48
47
INTVCC
(OPTIONAL)
SGND
12
LTC3610
SW
SGND
VIN
VIN
5V TO 24V
ION
RUN/SS
11
SGND
SW
BOOST
10
SW
SGND
9
VFB
NC
8
SW
SW
7
(OPTIONAL)
GND
EXTVCC
PVIN
6
SW
PVIN
5
SGND
PVIN
L1
0.47μH
SGND
SW
PVIN
COUT
100μF
2×
PGND
PVIN
C5
22μF
6.3V
SGND
PVIN
4
SGND
PGND
PVIN
3
VOUT
1.8V AT
12A
PGND
PVIN
2
PVIN
1
PGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
RVON
VOUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
CB1
0.22μF
COUT: TAIYO YUDEN JMK325BJ107MY
L1: TOKIN MPLC0730
C5: TAIYO YUDEN JMK316BJ226ML-T
INTVCC
DB
CMDSH-3
RSS1
510k
CSS
0.1μF
(OPTIONAL)
CVON
3610 TA04
VIN
(OPTIONAL)
3610fd
22
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
2.04
1.81
1.30
2.98
3.60
PIN 1
0.30 – 0.50
aaa C 2x
0.87
aaa C 2x
PAD 1
CORNER
1.42
1.17
1.39
0.30
(2x)
0.53
(2x)
2.30
0.20 – 0.30
0.95
RECOMMENDED SOLDER PAD LAYOUT
TOP VIEW
3.85
3.99
4.53
3.50
3.30
0.50
TOP VIEW
9.00
BSC
3.30
2.01
4.10
1.92
3.06
// ccc C
0.90 ± 0.10
0.20 REF
0.00 – 0.05
5
SEATING PLANE
3.06
4.10
1.92
2.01
33
3.30
48
1.19
0.20 – 0.30
32
0.95
0.30
(2x)
0.53
(2x)
1.39
DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED
BETWEEN 0.15mm AND 0.30mm FROM THE TERMINAL TIP.
COPLANARITY APPLIES TO THE TERMINALS AND ALL OTHER SURFACE
METALLIZATION
5
6
SYMBOL TOLERANCE
0.15
aaa
0.10
bbb
0.10
ccc
3.85
3.99
4.53
3.50
3.30
0.50
BOTTOM VIEW
(BOTTOM METALLIZATION DETAILS)
1.42
1.17
49 50 51 52 53 54
NOTE:
1. DIMENSIONING AND TOLERANCING CONFORM TO ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES (°)
3. N IS THE TOTAL NUMBER OF TERMINALS
4. THE LOCATION OF THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING
CONVENTION CONFORMS TO JEDEC PUBLICATION 95 SPP-002
6
NX
0.08 C
NX b
bbb M C A B
B
9.00
BSC
1.19
A
(Reference LTC DWG # 05-08-1812 Rev A)
WP Package
64-Lead QFN Multipad (9mm × 9mm)
17
0.87
64
1.30
2.04
1.81
WP64 QFN REV A 0707
16
3.60
2.98
0.30 – 0.50
1
LTC3610
PACKAGE DESCRIPTION
3610fd
23
LTC3610
TYPICAL APPLICATION
14V to 24V Input to 12V/5A at 500kHz
CVCC
4.7μF
6.3V
INTVCC
SW
GND
VIN
CF
0.1μF
25V
RF1
1Ω
C6
10μF
35V
12
13
+
14
15
16
(OPTIONAL)
SGND
SVIN
SGND
SVIN
INTVCC
SW
INTVCC
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
FCB
SW
ITH
PVIN
VRNG
PVIN
PGOOD
PVIN
VON
PVIN
SGND
PVIN
RX1
0Ω
46
EXTVCC
C4
0.01μF
(OPTIONAL)
R1
1.58k
1%
45
44
R2
30.1k
1%
C1
C2
(OPTIONAL)
43
VOUT
RON
1M
1%
42
41
VIN
40
CON
0.01μF (OPTIONAL)
39
38
R5
20k
CC1
560pF
37
36
35
CC2
100pF
RPG1
100k
34
33
PVIN
CIN
10μF
25V
3×
GND
SGND
48
47
INTVCC
(OPTIONAL)
SGND
VIN
VIN
14V TO 24V
ION
LTC3610
SW
SGND
11
SGND
SW
RUN/SS
10
SW
BOOST
9
VFB
SGND
8
SW
NC
(OPTIONAL)
GND
EXTVCC
SW
7
SGND
SW
PVIN
6
SW
PVIN
5
SGND
PVIN
L1
5.7μH
+
PGND
PVIN
COUT
180μF
16V
C5
22μF
25V
SGND
PVIN
4
PGND
PVIN
3
VOUT
12V AT
5A
SGND
PGND
PVIN
2
PVIN
1
PGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
RVON
INTVCC
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
RSS1
510k
CB1
0.22μF
CIN: TAIYO YUDEN TMK432BJ106MM
COUT: SANYO 16SVP180MX
L1: SUMIDA CDEP1055R7
INTVCC
DB
CMDSH-3
CSS
0.1μF
(OPTIONAL)
CVON
3610 TA05
VIN
(OPTIONAL)
RUN/SS
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3610fd
24 Linear Technology Corporation
LT 0808 REV D • PRINTED IN USA
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