AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 FEATURES DESCRIPTION/ORDERING INFORMATION 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 4A 4Y 4Z G 3Z 3Y 3A NC V CC 3 2 1 20 19 4A 1A FK PACKAGE (TOP VIEW) 1Z 4 18 4Y G 5 17 4Z NC 6 16 NC 2Z 7 15 G 2Y 8 14 3Z 3Y 10 11 12 13 3A 9 NC The AM26LS31 is a quadruple complementary-output line driver designed to meet the requirements of ANSI TIA/EIA-422-B and ITU (formerly CCITT) Recommendation V.11. The 3-state outputs have high-current capability for driving balanced lines such as twisted-pair or parallel-wire transmission lines, and they are in the high-impedance state in the power-off condition. The enable function is common to all four drivers and offers the choice of an active-high or active-low enable (G, G) input. Low-power Schottky circuitry reduces power consumption without sacrificing speed. 1 GND • 1A 1Y 1Z G 2Z 2Y 2A GND 1Y • • • • D, DB, N, NS, J, OR W PACKAGE (TOP VIEW) Meets or Exceeds the Requirements of ANSI TIA/EIA-422-B and ITU Operates From a Single 5-V Supply TTL Compatible Complementary Outputs High Output Impedance in Power-Off Conditions Complementary Output-Enable Inputs 2A • ORDERING INFORMATION PACKAGE (1) TA PDIP – N 0°C to 70°C –55°C to 125°C (1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube AM26LS31CN Tube AM26LS31CD Tape and reel AM26LS31CDR SOP – NS Tape and reel AM26LS31CNSR 26LS31 SSOP – DB Tape and reel AM26LS31CDBR SA31C CDIP – J Tube AM26LS31MJB AM26LS31MJB LCCC – FK Tube AM26LS31MFKB AM26LS31MFKB CFP – W Tube AM26LS31MWB AM26LS31MWB SOIC – D AM26LS31CN AM26LS31C Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1979–2006, Texas Instruments Incorporated AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 FUNCTION TABLE (1) (EACH DRIVER) INPUT A (1) ENABLES OUTPUTS G G Y Z H H X H L L H X L H H X L H L L X L L H X L H Z Z H = high level, L = low level, X = irrelevant, Z = high impedance (off) LOGIC DIAGRAM (POSITIVE LOGIC) G G 4 12 2 1A 1 3 6 2A 7 5 10 3A 9 11 14 4A 2 15 13 Submit Documentation Feedback 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 SCHEMATIC (EACH DRIVER) Input A V 22 kΩ 9Ω 9Ω Output Z Output Y Common to All Four Drivers VCC 22 kΩ V 22 kΩ To Three Other Drivers Enable G Enable G GND All resistor values are nominal. Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN voltage (2) VCC Supply VI Input voltage Output off-state voltage θJA Package thermal impedance (3) Tstg (1) (2) (3) Storage temperature range V 7 V 5.5 V 73 DB package 82 N package 67 NS package 64 J package –65 UNIT 7 D package Lead temperature 1,6 mm (1/16 in) from case for 10 s Lead temperature 1,6 mm (1/16 in) from case for 60 s MAX °C/W 260 °C 300 °C 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential output voltage VOD, are with respect to network GND. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback 3 AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 Recommended Operating Conditions MIN NOM MAX AM26LS31C 4.75 5 5.25 AM26LS31M 4.5 5 5.5 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current –20 mA IOL Low-level output current 20 mA TA Operating free-air temperature 2 V V AM26LS31C 0 70 AM26LS31M –55 125 °C Electrical Characteristics (1) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT –1.5 V VIK Input clamp voltage VCC = MIN, II = –18 mA VOH High-level output voltage VCC = MIN, IOH = –20 mA VOL Low-level output voltage VCC = MIN, IOL = 20 mA 0.5 IOZ Off-state (high-impedance-state) output current VCC = MIN, VO = 0.5 V –20 VO = 2.5 V 20 II Input current at maximum input voltage VCC = MAX, VI = 7 V 0.1 IIH High-level input current VCC = MAX, VI = 2.7 V 20 µA IIL Low-level input current VCC = MAX, VI = 0.4 V –0.36 mA IOS Short-circuit output current (3) VCC = MAX –150 mA ICC Supply current VCC = MAX, 80 mA (1) (2) (3) 2.5 V –30 All outputs disabled 32 V µA mA For C-suffix devices, VCC min = 4.75 V and VCC max = 5.25 V. For M-suffix devices, VCC min = 4.5 V and VCC max = 5.5 V. All typical values are at VCC = 5 V and TA = 25°C. Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second. Switching Characteristics VCC = 5 V (see Figure 1) PARAMETER tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output tPZH Output enable time to high level tPZL Output enable time to low level tPHZ Output disable time from high level tPLZ Output disable time from low level tSKEW Output-to-output skew 4 TEST CONDITIONS CL = 30 pF, CL = 30 pF TA = 25°C MIN AM26LS31M TYP MAX MIN MAX 14 20 30 14 20 30 RL = 75 Ω 25 40 60 RL = 180 Ω 37 45 68 21 30 45 23 35 53 1 6 9 S1 and S2 open CL = 10 pF, S1 and S2 closed CL = 30 pF, S1 and S2 open Submit Documentation Feedback UNIT ns ns ns ns AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 PARAMETER MEASUREMENT INFORMATION Input A (see Notes B and C) Test Point 3V 1.3 V 1.3 V 0V VCC tPLH tPHL 180 Ω VOH 1.5 V Output Y S1 From Output Under Test VOL Skew 75 Ω CL (see Note A) Skew tPLH tPHL S2 VOH 1.5 V Output Z VOL PROPAGATION DELAY TIMES AND SKEW Enable G (see Note D) Enable G TEST CIRCUIT 3V 1.5 V 1.5 V See Note D 0V tPZL tPLZ ≈4.5 V Waveform 1 (see Note E) S1 Closed S2 Open S1 Closed S2 Closed ≈1.5 V 1.5 V VOL 0.5 V tPZH tPHZ 0.5 V Waveform 2 (see Note E) S1 Open S2 Closed 1.5 V VOH ≈1.5 V ≈0 V S1 Closed S2 Closed ENABLE AND DISABLE TIME WAVEFORMS NOTES: A. B. C. D. E. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 15 ns, tf ≤ 6 ns. When measuring propagation delay times and skew, switches S1 and S2 are open. Each enable is tested separately. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. Figure 1. Test Circuit and Voltage Waveforms Submit Documentation Feedback 5 AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs ENABLE G INPUT VOLTAGE 4 VO − Y Output Voltage − V Load = 470 Ω to GND TA = 25°C See Note A 3 4 VCC = 5 V Load = 470 Ω to GND See Note A VCC = 5.25 V VCC = 5 V VO − Y Output Voltage − V OUTPUT VOLTAGE vs ENABLE G INPUT VOLTAGE VCC = 4.75 V 2 1 0 3 TA = 70°C TA = 0°C TA = 25°C 2 1 0 0 1 2 3 0 1 VI − Enable G Input Voltage − V 2 3 VI − Enable G Input Voltage − V Figure 2. Figure 3. OUTPUT VOLTAGE vs ENABLE G INPUT VOLTAGE OUTPUT VOLTAGE vs ENABLE G INPUT VOLTAGE 6 6 VCC = 5.25 V 5 VCC = 5 V VCC = 4.75 V 4 VO − Output Voltage − V VO − Output Voltage − V 5 3 2 1 Load = 470 Ω to VCC TA = 25°C See Note B 0 0 1 4 TA = 70°C 3 TA = 25°C TA = 0°C 2 1 VCC = 5 V Load = 470 Ω to VCC See Note B 0 2 3 0 VI − Enable G Input Voltage − V Figure 4. 6 1 2 VI − Enable G Input Voltage − V Figure 5. A. The A input is connected to VCC during testing of the Y outputs and to ground during testing of the Z outputs. B. The A input is connected to ground during testing of the Y outputs and to VCC during testing of the Z outputs. Submit Documentation Feedback 3 AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS (continued) HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 4 VCC = 5.25 V VOH − High-Level Output Voltage − V VOH − High-Level Output Voltage − V VCC = 5 V See Note A 4 IOH = −20 mA 3 IOH = −40 mA 2 1 VCC = 5 V 3 VCC = 4.75 V 2 1 TA = 25°C See Note A 0 0 0 25 50 75 0 −20 TA − Free-Air Temperature − °C −40 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1 VCC = 5 V IOL = 40 mA See Note B 0.9 VOL− Low-Level Output Voltage − V VOL− Low-Level Output Voltage − V −100 Figure 7. LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 0.4 −80 IOH − High-Level Output Current − mA Figure 6. 0.5 −60 0.3 0.2 0.1 TA = 25°C See Note B 0.8 0.7 0.6 0.5 VCC = 4.75 V 0.4 VCC = 5.25 V 0.3 0.2 0.1 0 0 0 25 50 75 0 TA − Free-Air Temperature − °C Figure 8. 20 40 60 80 100 120 IOL − Low-Level Output Current − mA Figure 9. A. The A input is connected to VCC during testing of the Y outputs and to ground during testing of the Z outputs. B. The A input is connected to ground during testing of the Y outputs and to VCC during testing of the Z outputs. Submit Documentation Feedback 7 AM26LS31C, AM26LS31M QUADRUPLE DIFFERENTIAL LINE DRIVER www.ti.com SLLS114I – JANUARY 1979 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS (continued) Y OUTPUT VOLTAGE vs DATA INPUT VOLTAGE 5 4 5 VCC = 5.25 V 4 VCC = 5 V VCC = 4.75 V 3 2 1 TA = 70°C TA = 0°C 3 TA = 25°C 2 1 0 0 0 1 2 3 0 VI − Data Input Voltage − V 1 2 VI − Data Input Voltage − V Figure 10. 8 No Load VO − Y Output Voltage − V VO − Y Output Voltage − V No Load TA = 25°C Y OUTPUT VOLTAGE vs DATA INPUT VOLTAGE Figure 11. Submit Documentation Feedback 3 PACKAGE OPTION ADDENDUM www.ti.com 7-Aug-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 5962-7802301M2A ACTIVE LCCC FK 20 1 TBD 5962-7802301MEA ACTIVE CDIP J 16 1 TBD 5962-7802301MFA ACTIVE CFP W 16 1 AM26LS31CD ACTIVE SOIC D 16 40 AM26LS31CDBR ACTIVE SSOP DB 16 AM26LS31CDBRE4 ACTIVE SSOP DB 16 AM26LS31CDE4 ACTIVE SOIC D 16 AM26LS31CDR ACTIVE SOIC D AM26LS31CDRE4 ACTIVE SOIC AM26LS31CN ACTIVE AM26LS31CNE4 Lead/Ball Finish MSL Peak Temp (3) POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type TBD A42 SNPB N / A for Pkg Type Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type AM26LS31CNSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LS31CNSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LS31MFKB ACTIVE LCCC FK 20 1 TBD AM26LS31MJB ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type AM26LS31MWB ACTIVE CFP W 16 1 TBD A42 SNPB N / A for Pkg Type 40 POST-PLATE N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 7-Aug-2006 accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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