PD - 96204
IRFS5615PbF
IRFSL5615PbF
DIGITAL AUDIO MOSFET
Features
Key Parameters
• Key Parameters Optimized for Class-D Audio
VDS
RDS(ON) typ. @ 10V
Qg typ.
Qsw typ.
RG(int) typ.
TJ max
Amplifier Applications
• Low RDSON for Improved Efficiency
• Low QG and QSW for Better THD and Improved
Efficiency
• Low QRR for Better THD and Lower EMI
150
34.5
26
11
2.7
175
V
m:
nC
nC
Ω
°C
• 175°C Operating Junction Temperature for
D
Ruggedness
D
D
• Can Deliver up to 300W per Channel into 4Ω Load in
Half-Bridge Configuration Amplifier
S
G
G
D2 Pak
IRFS5615PbF
S
Description
G
D
S
TO-262
IRFSL5615PbF
G
D
S
Gate
Drain
Source
This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes
the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode
reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance
factors such as efficiency, THD and EMI. Additional features of this MOSFET are 175°C operating junction
temperature and repetitive avalanche capability. These features combine to make this MOSFET a highly efficient,
robust and reliable device for ClassD audio amplifier applications.
Absolute Maximum Ratings
Parameter
VDS
VGS
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
PD @TC = 100°C
TJ
TSTG
Max.
Drain-to-Source Voltage
150
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
±20
33
24
140
Power Dissipation
Power Dissipation
144
72
f
f
c
Units
V
A
W
0.96
-55 to + 175
Linear Derating Factor
Operating Junction and
W/°C
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
(1.6mm from case)
300
Thermal Resistance
RθJC
RθJA
Junction-to-Case
f
Parameter
Junction-to-Ambient (PCB Mount)
h
Typ.
–––
Max.
1.045
–––
40
Units
°C/W
Notes through are on page 2
www.irf.com
1
12/18/08
IRFS/SL5615PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Min.
Typ. Max. Units
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Parameter
150
–––
–––
0.18
–––
–––
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
3.0
34.5
–––
42
5.0
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
-13
–––
–––
20
IGSS
Gate-to-Source Forward Leakage
–––
–––
–––
–––
250
100
Gate-to-Source Reverse Leakage
Forward Transconductance
–––
35
–––
–––
-100
–––
Total Gate Charge
Pre-Vth Gate-to-Source Charge
–––
–––
26
6.4
40
–––
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
2.2
9.0
–––
–––
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
8.9
11
–––
–––
Internal Gate Resistance
Turn-On Delay Time
–––
–––
2.7
8.9
5.0
–––
Rise Time
Turn-Off Delay Time
–––
–––
23.1
17.2
–––
–––
Fall Time
Input Capacitance
–––
–––
13.1
1750
–––
–––
Output Capacitance
Reverse Transfer Capacitance
–––
–––
155
40
–––
–––
Effective Output Capacitance
Internal Drain Inductance
–––
175
–––
LD
–––
4.5
–––
LS
Internal Source Inductance
BVDSS
∆ΒVDSS/∆TJ
RDS(on)
gfs
Qg
Qgs1
Qgs2
Qgd
Qgodr
Qsw
RG(int)
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
e
mV/°C
µA
nA
S
7.5
VDS = 150V, VGS = 0V
VDS = 150V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VDS = 50V, ID = 21A
VDS =75V
nC
VGS = 10V
ID = 21A
See Fig. 6 and 19
Ω
e
VDD = 75V, VGS = 10V
ns
ID = 21A
RG = 2.4Ω
VGS = 0V
pF
VDS = 50V
ƒ = 1.0MHz,
See Fig.5
VGS = 0V, VDS = 0V to 120V
Between lead,
nH
–––
Conditions
V VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 21A
V VDS = VGS, ID = 100µA
–––
6mm (0.25in.)
from package
D
G
S
and center of die contact
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
g
Avalanche Current
Repetitive Avalanche Energy
d
Typ.
Max.
Units
–––
109
mJ
See Fig. 14, 15, 17a, 17b
g
A
mJ
Diode Characteristics
Parameter
IS @ TC = 25°C Continuous Source Current
ISM
VSD
trr
Qrr
(Body Diode)
Pulsed Source Current
c
Min.
–––
–––
33
A
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 21A, VGS = 0V
TJ = 25°C, IF = 21A, VR =120V
di/dt = 100A/µs
–––
–––
140
–––
–––
–––
80
1.3
120
V
ns
Reverse Recovery Charge
–––
312
468
nC
Notes:
Conditions
MOSFET symbol
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.51mH, RG = 25Ω, IAS = 21A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Rθ is measured at TJ of approximately 90°C.
2
Typ. Max. Units
e
e
Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive
avalanche information
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to
application note #AN-994.
www.irf.com
IRFS/SL5615PbF
1000
1000
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
ID, Drain-to-Source Current (A)
100
BOTTOM
10
1
5.0V
0.1
100
BOTTOM
10
5.0V
1
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
0.1
0.01
0.1
1
10
0.1
100
10
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
3.0
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
TJ = 175°C
TJ = 25°C
10
1
VDS = 50V
≤60µs PULSE WIDTH
ID = 21A
VGS = 10V
2.5
2.0
1.5
1.0
0.5
0.1
2
4
6
8
10
12
14
16
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
100000
Fig 4. Normalized On-Resistance vs. Temperature
14.0
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = C gs + C gd, C ds SHORTED
Crss = C gd
Coss = C ds + C gd
10000
C, Capacitance (pF)
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
ID, Drain-to-Source Current (A)
TOP
Ciss
1000
Coss
Crss
100
ID= 21A
12.0
VDS= 120V
VDS= 75V
10.0
VDS= 30V
8.0
6.0
4.0
2.0
0.0
10
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
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0
5
10
15
20
25
30
35
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
3
IRFS/SL5615PbF
1000
100
T J = 175°C
T J = 25°C
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
100µsec
1msec
10
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1.0
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1
10
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
1000
Fig 8. Maximum Safe Operating Area
6.0
35
5.5
VGS(th) , Gate threshold Voltage (V)
40
30
ID, Drain Current (A)
100
VDS, Drain-to-Source Voltage (V)
25
20
15
10
5
5.0
4.5
4.0
3.5
ID = 100µA
3.0
ID = 250uA
ID = 1.0mA
ID = 1.0A
2.5
2.0
1.5
0
1.0
25
50
75
100
125
150
175
-75 -50 -25
T C , Case Temperature (°C)
0
25 50 75 100 125 150 175
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Threshold Voltage vs. Temperature
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
τJ
0.01
0.001
1E-006
R1
R1
τJ
τ1
R2
R2
R3
R3
τC
τ
τ1
τ2
τ2
τ3
τ3
Ci= τi/Ri
Ci i/Ri
0.0001
τ4
τ4
Ri (°C/W)
τi (sec)
0.02324
0.000008
0.26212
0.000106
0.50102
0.001115
0.25880
0.005407
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
R4
R4
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
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0.4
500
EAS , Single Pulse Avalanche Energy (mJ)
RDS(on), Drain-to -Source On Resistance ( Ω)
IRFS/SL5615PbF
ID = 21A
0.35
0.3
0.25
0.2
0.15
0.1
TJ = 125°C
0.05
T J = 25°C
0
4
6
8
10
12
14
ID
TOP
2.8A
5.3A
BOTTOM 21A
450
400
350
300
250
200
150
100
50
0
16
18
20
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
VGS, Gate -to -Source Voltage (V)
Fig 12. On-Resistance Vs. Gate Voltage
Fig 13. Maximum Avalanche Energy Vs. Drain Current
100
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
120
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 21A
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long as neither
Tjmax nor Iav (max) is exceeded
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
5
IRFS/SL5615PbF
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
V DD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
InductorCurrent
Curent
ISD
Ripple ≤ 5%
*
VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
+
V
- DD
IAS
20V
A
0.01Ω
tp
I AS
Fig 17a. Unclamped Inductive Test Circuit
RD
V DS
Fig 17b. Unclamped Inductive Waveforms
VDS
90%
V GS
D.U.T.
RG
+
- V DD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 18a. Switching Time Test Circuit
tr
t d(off)
Fig 18b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2µF
.3µF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 19a. Gate Charge Test Circuit
6
Qgs1 Qgs2
Qgd
Qgodr
Fig 19b. Gate Charge Waveform
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IRFS/SL5615PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
7+,6,6$1,5)6:,7+
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(/
,17(51$7,21$/
5(&7,),(5
/2*2
3$57180%(5
)6
'$7(&2'(
<($5 :((.
/,1(/
$66(0%/<
/27&2'(
25
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
)6
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7 237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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7
IRFS/SL5615PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
(;$03/( 7+,6,6$1,5//
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(&
3$57180%(5
,17(51$7,21$/
5(&7,),(5
/2*2
'$7(&2'(
<($5 :((.
/,1(&
$66(0%/<
/27&2'(
25
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7 237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFS/SL5615PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/2008
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9